Pipeline Processors Patents (Class 345/506)
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Patent number: 9842376Abstract: Techniques are described with respect to preemption in which a graphics processing unit (GPU) may execute a first set of commands in response to receiving a draw call, the draw call defining a plurality of primitives that are to be rendered by the first set of commands, receive a preemption notification during execution of the first set of commands, and preempt the execution of the first set of commands, prior to completing the execution of the first set of commands to render the plurality of primitives of the draw call, for executing a second set of commands.Type: GrantFiled: February 2, 2016Date of Patent: December 12, 2017Assignee: QUALCOMM IncorporatedInventors: Anirudh Rajendra Acharya, Gang Zhong, Vineet Goel
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Patent number: 9792722Abstract: A depth processing method and associated graphic processing circuit is provided. The method comprises loading geometry data of a scene and performing a vertex transformation thereof. After the geometry data is segmented in a tile resolution, pre-depth data of the scene are obtained. After the geometry data are segmented in a bin resolution, plural bin tables are generated. Then, the plural bin tables are converted into plural tiles, the plural converted tiles are classified into a first portion of tiles and a second portion of tiles according to depth data of the converted tiles and the pre-depth data of the scene, and the second portion of tiles are discarded. After the first portion of tiles are processed, a color value and a depth value of each pixel of the scene are generated.Type: GrantFiled: December 18, 2014Date of Patent: October 17, 2017Assignee: MediaTek Inc.Inventors: Ming-Hao Liao, Chih-Ching Chen, Hung-Wei Wu
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Patent number: 9779469Abstract: Techniques are described for copying data only from a subset of memory locations allocated to a set of instructions to free memory locations for higher priority instructions to execute. Data from a dynamic portion of one or more general purpose registers (GPRs) allocated to the set of instructions may be copied and stored to another memory unit while data from a static portion of the one or more GPRs allocated to the set of instructions may not be copied and stored to another memory unit.Type: GrantFiled: August 17, 2015Date of Patent: October 3, 2017Assignee: QUALCOMM IncorporatedInventors: Lee Howes, Maxim Kazakov
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Patent number: 9767770Abstract: A computer system for processing of data received from a remote device. The computer system includes a master device and at least one slave device. The master device is communicably coupled to the remote device and has a display and a memory. The master device partitions the data into one or more sub data. The at least one slave device is coupled to the master device. The master device delegates processing of the one or more sub data to one or more of the at least one slave device, and the one or more of the at least one slave device correspondingly to the one or more sub data generate processed sub data. The master device stores the processed sub data and outputs the processed sub data to the display.Type: GrantFiled: December 28, 2015Date of Patent: September 19, 2017Assignee: AMERICAN MEGATRENDS INC.Inventors: Chih-Kai Hu, Xuan-Ming Huang
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Patent number: 9760376Abstract: An apparatus may include a processor and storage to store instructions that cause the processor to perform operations including: in response to a determination that a GPU of a node device is available, determine whether a task routine can be compiled to generate a GPU task routine for execution by the GPU to cause performance of multiple instances of a task of the task routine at least partially in parallel without dependencies thereamong; and in response to a determination that the task routine is able to be compiled to generate the GPU task routine: employ a conversion rule to convert the task routine into the GPU task routine; compile the GPU task routine for execution by the GPU; and assign performance of the task with a data set partition to the node device to enable performance of the multiple instances with the data set partition by the GPU.Type: GrantFiled: February 1, 2017Date of Patent: September 12, 2017Assignee: SAS Institute Inc.Inventors: Henry Gabriel Victor Bequet, Huina Chen
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Patent number: 9741156Abstract: A materials trouble shooter is provided for use with 3D models in computer graphics. An error texture is displayed that is distinguishable from textures without errors. If a texture is missing or is applied incorrectly to the 3D model, an error texture is displayed using an error shader instead of a regular shader for the texture for which an error in loading or application has been detected.Type: GrantFiled: September 8, 2011Date of Patent: August 22, 2017Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.Inventors: Scott Marison, Jean-Pierre Duplessis, Jacob Meyer, Tito Pagán, Boris S. Jabes
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Patent number: 9734545Abstract: One embodiment of the present invention sets forth a technique for executing a software method within a graphics processing unit (GPU) that minimizes the number of clock cycles during which the graphics engine is idled. The function of the software method is performed by a firmware method that is executed by a processor within the GPU. The firmware method is executed to access and optionally update the state stored in the GPU. Unlike execution of a conventional software method, execution of the firmware method does not require an exchange of information between a CPU and the GPU. Therefore, the CPU is not interrupted and throughput of the CPU is not reduced.Type: GrantFiled: October 7, 2010Date of Patent: August 15, 2017Assignee: NVIDIA CorporationInventors: Jerome F. Duluk, Jr., John Christopher Cook, Fred Gruner, Gregory Scott Palmer
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Patent number: 9727944Abstract: Techniques are disclosed relating to low-level instruction storage in a graphics unit. In some embodiments, a graphics unit includes execution circuitry, decode circuitry, hazard circuitry, and caching circuitry. In some embodiments the execution circuitry is configured to execute clauses of graphics instructions. In some embodiments, the decode circuitry is configured to receive graphics instructions and a clause identifier for each received graphics instruction and to decode the received graphics instructions. In some embodiments, the hazard circuitry is configured to generate hazard information that specifies dependencies between ones of the decoded graphics instructions in the same clause. In some embodiments, the caching circuitry includes a plurality of entries each configured to store a set of decoded instructions in the same clause and hazard information generated by the decode circuitry for the clause.Type: GrantFiled: June 22, 2015Date of Patent: August 8, 2017Assignee: Apple Inc.Inventors: Andrew M. Havlir, Dzung Q. Vu, Liang Kai Wang
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Patent number: 9720769Abstract: A method of operating a data storage device having a memory includes reading error location data associated with a first region of the memory. The memory includes the first region and a second region. The method also includes generating one or more parameters based on the error location data. The method includes receiving data to be written to the memory and encoding the data to produce a codeword. The method also includes partitioning the codeword based on the one or more parameters to generate a first portion and a second portion. The method further includes performing a write operation to store the first portion at the first region and to store the second portion at the second region.Type: GrantFiled: March 16, 2015Date of Patent: August 1, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Abhijeet Manohar, Daniel Edward Tuers, Dana Lee
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Patent number: 9696993Abstract: A processing device to provide vectorization of conditional loops includes vector physical registers to store a source vector having a first plurality of n data fields, and a destination vector comprising a second plurality of data fields corresponding to the first plurality of data fields, wherein each of the second plurality of data fields corresponds to a mask value in a vector conditions mask. The processing device includes a decode stage to decode a first processor instruction specifying a vector expand operation and a data partition size, and execution units to set elements of the source vector to n count values, obtain a decisions vector, generate the vector conditions mask according to the decisions vector, and copy data from consecutive vector elements in the source vector, into unmasked vector elements of the destination vector, without copying data from the source vector into masked vector elements of the destination vector.Type: GrantFiled: November 7, 2016Date of Patent: July 4, 2017Assignee: Intel CorporationInventors: Tal Uliel, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll
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Patent number: 9699426Abstract: A method and device for processing a picture comprises estimating a color mapping between a first and a second color-graded version of the picture by estimating a color mapping function that maps the color values of the first color-graded version of the picture onto the color values of the second color-graded version of the picture.Type: GrantFiled: December 1, 2015Date of Patent: July 4, 2017Assignee: THOMSON LICENSINGInventors: Philippe Bordes, Sebastien Lasserre, Pierre Andrivon
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Patent number: 9659340Abstract: A graphics processing chip includes multiple graphics pipeline cores and multi-pipeline core logic circuitry to process graphic data streams received from a processor and to drive multiple GPUs on the multiple graphics pipeline cores.Type: GrantFiled: June 16, 2014Date of Patent: May 23, 2017Assignee: LUCIDLOGIX TECHNOLOGIES LTDInventors: Offir Remez, Yoel Shoshan, Guy Sela
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Patent number: 9652239Abstract: A method decodes instructions based in part on one or more decode-related attributes stored in a memory address translation data structure such as an Effective To Real Translation (ERAT) or Translation Lookaside Buffer (TLB). A memory address translation data structure may be accessed, for example, in connection with a decode of an instruction stored in a page of memory, such that one or more attributes associated with the page in the data structure may be used to control how that instruction is decoded.Type: GrantFiled: February 26, 2016Date of Patent: May 16, 2017Assignee: International Business Machines CorporationInventors: Adam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
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Patent number: 9542189Abstract: One embodiment of the present invention includes a technique for processing graphics primitives in a tile-based architecture. The technique includes storing, in a buffer, a first plurality of graphics primitives and a first plurality of state bundles received from a world-space pipeline, and transmitting the first plurality of graphics primitives to a screen-space pipeline for processing while a tiling function is enabled. The technique further includes storing, in the buffer, a second plurality of graphics primitives and a second plurality of state bundles received from the world-space pipeline. The technique further includes determining, based on a first condition, that the tiling function should be disabled and that the second plurality of graphics primitives should be flushed from the buffer, and transmitting the second plurality of graphics primitives to the screen-space pipeline for processing while the tiling function is disabled.Type: GrantFiled: October 4, 2013Date of Patent: January 10, 2017Assignee: NVIDIA CorporationInventors: Ziyad S. Hakura, Cynthia Ann Edgeworth Allison, Joseph Cavanaugh, Dale L. Kirkland, Emmett M. Kilgariff
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Patent number: 9535560Abstract: Examples of methods, systems, apparatus, and machine-readable storage media are provided to facilitate access and control of a remote desktop of a remote machine by a web browser of a client device through a web server without installing proprietary plug-ins or protocols on the client device. A web server may translate user input requests from a windows web browser into input calls compatible with a remote desktop display protocol. The web server may receive remote desktop drawing commands from the remote machine and translate the remote desktop drawing commands into web browser drawing updates compatible with the windows web browser. A web server may communicate with the windows web browser and a remote machine via HTTP and a remote desktop display protocol, accordingly.Type: GrantFiled: July 24, 2012Date of Patent: January 3, 2017Assignee: WYSE TECHNOLOGY L.L.C.Inventors: Stevan Kominac, Curtis Schwebke
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Patent number: 9536341Abstract: One embodiment of the present invention sets forth a technique for parallel distribution of primitives to multiple rasterizers. Multiple, independent geometry units perform geometry processing concurrently on different graphics primitives. A primitive distribution scheme delivers primitives from the multiple geometry units concurrently to multiple rasterizers at rates of multiple primitives per clock. The multiple, independent rasterizer units perform rasterization concurrently on one or more graphics primitives, enabling the rendering of multiple primitives per system clock.Type: GrantFiled: October 19, 2009Date of Patent: January 3, 2017Assignee: NVIDIA CorporationInventors: Johnny S. Rhoades, Emmett M. Kilgariff, Michael C. Shebanow, Ziyad S. Hakura, Dale L. Kirkland, James Daniel Kelly
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Patent number: 9501847Abstract: One embodiment of the present invention sets forth a technique for computing line stipple using a parallel rasterizer. Stipple phases are computed in parallel for individual line segments of a line strip during the viewport scale, cull, and clipping operations. The line segments are distributed to multiple parallel rasterizers. Each line segment may be sent to only one of the parallel rasterizers. Update phase messages that include an accumulated stipple phase for a batch of line segments are broadcast to all of the multiple parallel rasterizers. The update phase messages are used by the multiple parallel rasterizers to reconstruct the stipple phases for each line segment of a line strip in order to correctly render stippled line strips and produce a continuous stippled line.Type: GrantFiled: December 14, 2009Date of Patent: November 22, 2016Assignee: NVIDIA CorporationInventors: Timothy John Purcell, Ziyad S. Hakura
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Patent number: 9501276Abstract: Instructions and logic provide vectorization of conditional loops. A vector expand instruction has a parameter to specify a source vector, a parameter to specify a conditions mask register, and a destination parameter to specify a destination vector to hold n consecutive vector elements, each of the plurality of n consecutive vector elements having a same variable partition size of m bytes. In response to the processor instruction, data is copied from consecutive vector elements in the source vector, and expanded into unmasked vector elements of the specified destination vector, without copying data into masked vector elements of the destination vector, wherein n varies responsive to the processor instruction executed. The source vector may be a register and the destination vector may be in memory. Some embodiments store counts of the condition decisions. Alternative embodiments may store other data, for example such as target addresses, or table offsets, or indicators of processing directives, etc.Type: GrantFiled: December 31, 2012Date of Patent: November 22, 2016Assignee: Intel CorporationInventors: Tal Uliel, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll
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Patent number: 9454844Abstract: An apparatus for processing graphics primitives for display includes rasterization, depth testing, and rendering circuitry. The depth testing circuitry determines if a selected graphics fragment would be obscured when displayed by comparing a depth comparison function and a depth value associated with the selected graphics fragment with a stored depth value. The depth testing circuitry suppresses rendering operations for the fragment if the selected fragment would be obscured. An update indication shows a possible change direction due to the updating for a stored depth value which depends on a received depth comparison function. The depth testing for the selected fragment is performed using the possible change direction shown by the update indication to modify the depth comparison function to allow for updating of the stored depth value by the rendering operations.Type: GrantFiled: October 2, 2014Date of Patent: September 27, 2016Assignee: ARM LimitedInventor: Reimar Gisbert Döffinger
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Patent number: 9437040Abstract: A system, method, and computer program product are provided for implementing anti-aliasing operations using a programmable sample pattern table. The method includes the steps of receiving an instruction that causes one or more values to be stored in one or more corresponding entries of the programmable sample pattern table and performing an anti-aliasing operation based on at least one value stored in the programmable sample pattern table. At least one value is selected from the programmable sample pattern table based on, at least in part, a location of one or more corresponding pixels.Type: GrantFiled: November 15, 2013Date of Patent: September 6, 2016Assignee: NVIDIA CorporationInventors: Eric B. Lum, Jeffrey Alan Bolz, Timothy Paul Lottes, Rui Manuel Bastos, Barry Nolan Rodgers, Gerald F. Luiz
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Patent number: 9430036Abstract: Examples of methods, systems, apparatus, and machine-readable storage media are provided to facilitate access and control of a remote desktop of a remote machine by a web browser at a client device through a web server without installing proprietary plug-ins or protocols on the client device. A web server may translate user input requests from a windows web browser into input calls compatible with a remote desktop display protocol. The web server may receive remote desktop drawing commands from the remote machine and translate the remote desktop drawing commands into web browser drawing updates compatible with the windows web browser. A web server may communicate with the windows web browser via HTTP and communicate with a remote machine via a remote desktop display protocol.Type: GrantFiled: July 24, 2012Date of Patent: August 30, 2016Assignee: WYSE TECHNOLOGY L.L.C.Inventors: Stevan Kominac, Curtis Schwebke
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Patent number: 9432614Abstract: Implementations include video image processing systems, methods, and apparatus for integrated video downscale in a video core. The downscaler computes and writes a display frame to an external memory. This frame may have the same resolution as a target display device (e.g., mobile device). The target display device then reads this display frame, rather than the original higher resolution frame. By enabling downscale during encoding/decoding, the device can conserve resources such as memory bandwidth, memory access, bus bandwidth, and power consumption associated with separately downscaling a frame of video data.Type: GrantFiled: March 13, 2013Date of Patent: August 30, 2016Assignee: QUALCOMM IncorporatedInventors: Feng Ge, Hariharan G. Lalgudi, Sumit Mohan, Kai Wang, Narendranath Malayath
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Patent number: 9411408Abstract: According to one exemplary embodiment, a method for load optimization using cable-associated voltage drop is provided. The method may include receiving a plurality of tasks for processing by a plurality of electronic devices. The method may also include determining a power loss value for one or more power cables powering each of the plurality of electronic devices. The method may further include assigning the plurality of tasks to one or more of the plurality of electronic devices based on the power loss value for the one or more power cables powering each of the plurality of electronic devices.Type: GrantFiled: April 30, 2014Date of Patent: August 9, 2016Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.Inventors: Gary D. Cudak, Michael DeCesaris, Luke D. Remis, Brian C. Totten
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Patent number: 9406099Abstract: The present disclosure is directed towards methods and systems for maintaining state in a virtual machine when disconnected from graphics hardware. The virtual machine is one of a plurality of virtual machines hosted by a hypervisor executing on a computing device. A control virtual machine may be hosted by a hypervisor executing on a computing device. The control virtual machine may store state information of a graphics processing unit (GPU) of the computing device. The GPU may render an image from a first virtual machine. The control virtual machine may remove, from the first virtual machine, access to the GPU. The control virtual machine may redirect the first virtual machine to a GPU emulation program. The GPU emulation program may render the image from the first virtual machine using at least a portion of the stored state information.Type: GrantFiled: February 26, 2015Date of Patent: August 2, 2016Assignee: Citrix Systems, Inc.Inventors: James McKenzie, Jean Guyader
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Patent number: 9395885Abstract: Examples of methods, systems, apparatus, and machine-readable storage media are provided to facilitate access and control of a remote desktop of a remote machine by a web browser of a client device through a web server without installing proprietary plug-ins or protocols on the client device. A web server may translate user input requests from a web browser into input calls compatible with a remote desktop display protocol. The web server may receive remote desktop drawing commands from the remote machine and translate the remote desktop drawing commands into web browser drawing updates compatible with the web browser. A web server may communicate with the web browser and the remote machine via HTTP and a remote desktop display protocol, respectively.Type: GrantFiled: July 24, 2012Date of Patent: July 19, 2016Assignee: WYSE TECHNOLOGY L.L.C.Inventors: Stevan Kominac, Curtis Schwebke
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Patent number: 9392257Abstract: An image processing device includes a viewpoint separating unit configured to separate multi-viewpoint image data, including images of multiple viewpoints and representing intensity distribution of light and the direction of travel of light according to positions and pixel values of pixels, into a plurality of single-viewpoint image data for each of the individual viewpoints; and a parallax control unit configured to control amount of parallax between the plurality of single-viewpoint image data obtained by separation into individual viewpoints by the viewpoint separating unit.Type: GrantFiled: November 12, 2012Date of Patent: July 12, 2016Assignee: Sony CorporationInventors: Takefumi Nagumo, Jun Murayama, Toshio Yamazaki, Ken Tamayama
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Patent number: 9378536Abstract: Systems, methods, and computer programs are disclosed for minimizing power consumption in graphics frame processing. One such method comprises: initiating graphics frame processing to be cooperatively performed by a central processing unit (CPU) and a graphics processing unit (GPU); receiving CPU activity data and GPU activity data; determining a set of available dynamic clock and voltage/frequency scaling (DCVS) levels for the GPU and the CPU; and selecting from the set of available DCVS levels an optimal combination of a GPU DCVS level and a CPU DCVS level, based on the CPU and GPU activity data, which minimizes a combined power consumption of the CPU and the GPU during the graphics frame processing.Type: GrantFiled: April 30, 2014Date of Patent: June 28, 2016Assignee: QUALCOMM INCORPORATEDInventors: Hee Jun Park, Young Hoon Kang, Mriganka Mondal
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Patent number: 9355257Abstract: Sanitizing a virtual machine image of sensitive data is provided. A label for a sensitivity level is attached to identified sensitive data contained within each software component in a plurality of software components of a software stack in a virtual machine image based on labeling policies. In response to receiving an input to perform a sanitization of the identified sensitive data having attached sensitivity level labels contained within software components of the software stack in the virtual machine image, the sanitization of the identified sensitive data having the attached sensitivity level labels contained within the software components of the software stack in the virtual machine image is performed based on sanitization policies.Type: GrantFiled: August 12, 2013Date of Patent: May 31, 2016Assignee: International Business Machines CorporationInventors: Suresh N. Chari, Ashish Kundu
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Patent number: 9355256Abstract: Sanitizing a virtual machine image of sensitive data is provided. A label for a sensitivity level is attached to identified sensitive data contained within each software component in a plurality of software components of a software stack in a virtual machine image based on labeling policies. In response to receiving an input to perform a sanitization of the identified sensitive data having attached sensitivity level labels contained within software components of the software stack in the virtual machine image, the sanitization of the identified sensitive data having the attached sensitivity level labels contained within the software components of the software stack in the virtual machine image is performed based on sanitization policies.Type: GrantFiled: July 24, 2013Date of Patent: May 31, 2016Assignee: International Business Machines CorporationInventors: Suresh N. Chari, Ashish Kundu
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Patent number: 9342311Abstract: One embodiment of the present invention includes a method for generating accumulated bounding boxes for graphics primitives. The method includes generating a first bounding box associated with a first graphics primitive. The method further includes, for each graphics primitive included in a first set of one or more additional graphics primitives, determining that the graphics primitive is within a threshold distance of the first bounding box, and adding the graphics primitive to the first bounding box. The method further includes determining not to add a second graphics primitive to the first bounding box. The method further includes generating a second bounding box associated with the second graphics primitive. Finally, the method includes transmitting the first bounding box to a tiling unit via a crossbar. One advantage of the disclosed embodiments is that multiple bounding boxes are combined to generate an accumulated bounding box that is then transferred across the crossbar.Type: GrantFiled: August 14, 2013Date of Patent: May 17, 2016Assignee: NVIDIA CorporationInventors: Ziyad S. Hakura, Pierre Souillot, Cynthia Allison, Dale L. Kirkland, Rouslan Dimitrov
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Patent number: 9313486Abstract: Disclosed are techniques for encoding and decoding layered video where the non-temporal enhancement layers and their respective temporal enhancement layers, comply with a scalable video coding standard or technology, and the base layer and its respective temporal enhancement layers does not comply with the same scalable video coding standard or technology. A Video Parameter Set that comprises information about the relationship of layers includes a syntax element indicative of the derivation mechanism for a temporal layer associated with a NAL unit coded in a first coding technology, for example HEVC. For one value of the syntax element, the derivation mechanism is to set the temporal layer of the base layer NAL unit to the value coded in the header of the encapsulating NAL unit, which can be an HEVC NAL unit. For another value, the derivation mechanism is to imply the value of temporal base layer for the first NAL unit.Type: GrantFiled: September 13, 2013Date of Patent: April 12, 2016Assignee: VIDYO, INC.Inventors: Jill Boyce, Stephan Wenger, Danny Hong
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Patent number: 9313228Abstract: Systems, devices and methods are described including receiving a policy from a secure storage device, where the policy may be used to implement collaborative rendering of image content. The image content may include multiple portions of image content. The policy may be used to determining rendering assignments for multiple mobile devices where the assignments may specify that a mobile device is to render one content portion while another mobile device is to render another content portion. The rendering assignments may be provided to the mobile devices and rendered output corresponding to the different content portions may be received from the mobile devices. The rendered output may then be assembled into one or more image frames and wirelessly communicated to a remote display.Type: GrantFiled: September 27, 2013Date of Patent: April 12, 2016Assignee: Intel CorporationInventors: Rajesh Poornachandran, Michael Daniel Rosenzweig, Prakash N. Iyer
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Patent number: 9293109Abstract: A graphics processing unit includes a set of geometry processing units each configured to process graphics primitives in parallel with one another. A given geometry processing unit generates one or more graphics primitives or geometry objects and buffers the associated vertex data locally. The geometry processing unit also buffers different sets of indices to those vertices, where each such set represents a different graphics primitive or geometry object. The geometry processing units may then stream the buffered vertices and indices to global buffers in parallel with one another. A stream output synchronization unit coordinates the parallel streaming of vertices and indices by providing each geometry processing unit with a different base address within a global vertex buffer where vertices may be written. The stream output synchronization unit also provides each geometry processing unit with a different base address within a global index buffer where indices may be written.Type: GrantFiled: December 20, 2012Date of Patent: March 22, 2016Assignee: NVIDIA CorporationInventors: Jerome F. Duluk, Jr., Ziyad S. Hakura, Henry Packard Moreton
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Patent number: 9269181Abstract: An area information generating unit generates plural pieces of area information each showing a partial area of a texture image. A polygon information generating unit generates polygon information including plural pieces of vertex information and an area ID. A rendering unit carries out interpolation on the texture coordinates of the vertices of a polygon on an output image to assign texture coordinates to each pixel located inside the polygon, and further acquires area information by referring to the area ID added to the polygon information and converts the texture coordinates assigned to each pixel of the output image in such a way that the texture coordinates fall within the area.Type: GrantFiled: April 4, 2011Date of Patent: February 23, 2016Assignee: Mitsubishi Electric CorporationInventor: Satoshi Sakurai
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Patent number: 9244912Abstract: Examples of methods, systems, apparatus, and machine-readable storage media are provided to facilitate access and control of a remote desktop of a remote machine by a windows web browser of a client device through a web server without installing proprietary plug-ins or protocols on the client device. A web server may translate user input requests from a web browser into input calls compatible with a remote desktop display protocol. The web server may receive remote desktop drawing commands from the remote machine and translate the remote desktop drawing commands into web browser drawing updates compatible with the windows web browser. A web server may communicate with the windows web browser via HTTP and communicate with the remote machine via a remote desktop display protocol.Type: GrantFiled: July 24, 2012Date of Patent: January 26, 2016Assignee: WYSE TECHNOLOGY L.L.C.Inventors: Stevan Kominac, Curtis Schwebke
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Patent number: 9245047Abstract: Examples of methods, systems, apparatus, and machine-readable storage media are provided to facilitate access and control of a remote desktop of a remote machine by a web browser at a client device through a transcoding server without installing proprietary plug-ins or protocols on the client device. A transcoding server may translate user input requests from a web browser into input calls compatible with a remote desktop display protocol. The transcoding server may receive remote desktop drawing commands from the remote machine and translate the remote desktop drawing commands into web browser drawing updates compatible with the web browser. A transcoding server may communicate with a web browser via HTTP and communicate with a remote machine via a remote desktop display protocol. A web browser may be an HTML5 browser. A transcoding server may send drawing coordinates to the web browser via an HTTP header and may use long polling.Type: GrantFiled: December 10, 2010Date of Patent: January 26, 2016Assignee: WYSE TECHNOLOGY L.L.C.Inventors: Stevan Kominac, Jeremy Michael Stanley, Curtis Schwebke
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Patent number: 9214007Abstract: Graphics processing units (GPUs) are used, for example, to process data related to three-dimensional objects or scenes and to render the three-dimensional data onto a two-dimensional display screen. One embodiment, among others, of a unified cache system used in a GPU comprises a data storage device and a storage device controller. The data storage device is configured to store graphics data processed by or to be processed by one or more shader units. The storage device controller is placed in communication with the data storage device. The storage device controller is configured to dynamically control a storage allocation of the graphics data within the data storage device.Type: GrantFiled: January 25, 2008Date of Patent: December 15, 2015Assignee: VIA TECHNOLOGIES, INC.Inventors: Jeff Jiao, Timour Paltashev
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Patent number: 9208170Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for computerized travel services. One of the methods includes receiving natural feature mapping data, the natural feature mapping data representing geographic footprints of multiple natural features; receiving political feature mapping data, the political feature mapping data representing geographic footprints of multiple political features; classifying the natural features as a destination or not a destination, including: classifying at least one of the natural features as a destination based at least in part on determining that the geographic footprint of the natural feature overlaps with more than one of the geographic footprints of the political features, and storing data representing the natural features classified as a destination in a geographic data store.Type: GrantFiled: March 29, 2013Date of Patent: December 8, 2015Assignee: GOOGLE INC.Inventors: Bala Venkata Sai Ravi Krishna Kolluri, Vikram Sahai
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Patent number: 9204038Abstract: Cell phones and other portable devices are equipped with a variety of technologies by which existing functionality is improved, and new functionality is provided. Some aspects relate to imaging architectures, in which a cell phone's image sensor is one in a chain of stages that successively act on instructions/data, to capture and later process imagery. Other aspects relate to distribution of processing tasks between the device and remote resources (“the cloud”). Elemental image processing, such as filtering and edge detection—and even some simpler template matching operations—may be performed on the cell phone. Other operations are referred out to remote service providers. The remote service providers can be identified using techniques such as a reverse auction, through which they compete for processing tasks. Other aspects of the disclosed technologies relate to visual search capabilities, and determining appropriate actions responsive to different image inputs.Type: GrantFiled: October 6, 2014Date of Patent: December 1, 2015Assignee: Digimarc CorporationInventors: John D. Lord, Geoffrey B. Rhoads, Tony F. Rodriguez
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Patent number: 9142040Abstract: A system, method, and computer program product are provided for processing graphics data associated with shading. In operation, a first fragment is received. Further, the first fragment is shaded. While the first fragment is being shaded, a second fragment is received and it is determined whether at least one aspect of the second fragment conflicts with the first fragment. If it is determined that the at least one aspect of the second fragment does not conflict with the first fragment, the second fragment is shaded. If it is determined that the at least one aspect of the second fragment conflicts with the first fragment, information associated with the second fragment is stored, a third fragment is received, and the third fragment is shaded, if it is determined that at least one aspect of the third fragment does not conflict with the first fragment.Type: GrantFiled: March 15, 2013Date of Patent: September 22, 2015Assignee: NVIDIA CorporationInventors: Emmett M. Kilgariff, Tyson Bergland, Dale L. Kirkland, Rui Manuel Bastos, Christian Jean Rouet
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Patent number: 9064324Abstract: An image processing device, in a case in which an image processing module, uses in image processing a processor that is different than a processor used in image processing by an image processing module of a preceding stage, is connected at a subsequent stage, carries out transfer processing that transfers image data, that has been written into a buffer by the image processing module of the preceding stage, to a buffer for transfer that is reserved in a memory space corresponding to the processor that the image processing module of the subsequent stage uses in image processing, and carries out processing that causes the image processing module of the subsequent stage to read-out the image data transferred to the buffer for transfer.Type: GrantFiled: February 26, 2013Date of Patent: June 23, 2015Assignee: FUJIFILM CORPORATIONInventor: Toshihiro Ooguni
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Patent number: 9064333Abstract: Techniques for handling an interrupt in the rasterizer, in accordance with embodiment of the present technology, start with rasterizing one or more primitives of a first context. If an interrupt is received, the tile count of tiles of a current primitive that have been coarse rasterized is saved in a backing store. After storing the tile count, the one or more primitives of a second context are rasterized. After the second context is served, the coarse rasterization of the current primitive of the previous context is rerun without output until the tile corresponding to the stored tile count is coarse rasterized. Thereafter, rasterization of the current primitive of the first context from the next tile beyond the stored tile count is continued until rasterization is completed or another interrupt is received and the above described process is repeated.Type: GrantFiled: December 17, 2007Date of Patent: June 23, 2015Assignee: NVIDIA CORPORATIONInventors: Franklin C. Crow, Jeffrey R. Sewall
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Patent number: 9064336Abstract: A machine readable storage media containing executable program instructions which when executed cause a digital processing system to set a plurality of operands and operators. A plurality of texture maps are sent to a processor for texture compositing. Operands are selected for a texture operation. A first logic is used wherein if the circulation of blend stages is equal to a number of blend stages, then a color saturation is performed, and a second logic that if the circulation number of blend stages does not equal the number of blend stages then at least one operand is selected for another texture compositing operation.Type: GrantFiled: August 24, 2007Date of Patent: June 23, 2015Assignee: Intel CorporationInventors: Kam Leung, Val G. Cook, Peter L. Doyle, Wing Hang Wong
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Publication number: 20150145873Abstract: Techniques are described that can delay or even prevent use of memory to store triangles associated with tiles as well as processing resources associated with vertex shading and binning triangles. The techniques can also provide better load balancing among a set of cores, and hence provide better performance. A bounding volume is generated to represent a geometry group. Culling takes place to determine whether a geometry group is to have triangles rendered. Vertex shading and association of triangles with tiles can be performed across multiple cores in parallel. Processing resources are allocated for rasterizing tiles that have been vertex shaded and binned triangles over tiles that have yet to be vertex shaded and binned triangles. Rasterization of triangles of different tiles can be performed by multiple cores in parallel.Type: ApplicationFiled: December 23, 2009Publication date: May 28, 2015Inventors: Tomas G. Akenine-Moller, Robert M. Toth, Jon N. Hasselgren, Carl J. Munkberg, Franz P. Clarberg
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Publication number: 20150145874Abstract: A method and system may identify a video data block using a video codec and apply a transform kernel of a butterfly asymmetric discrete sine transform (ADST) to the video data block in a pipeline.Type: ApplicationFiled: November 22, 2013Publication date: May 28, 2015Applicant: GOOGLE INC.Inventors: Jingning Han, Yaowu Xu, Debargha Mukherjee
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Publication number: 20150138210Abstract: A method and a system for controlling display parameters through multiple inter-integrated circuit (I2C) pipelines are provided. The method includes creating the multiple I2C pipelines to control the display parameters in one or more of the display devices. The method also includes sending control data to graphic cards associated with one or more display devices through the multiple I2C pipelines. Further, the method includes forwarding the control data from the graphic cards to the associated one or more display devices. Additionally, the method includes applying the display parameters automatically based on the control data.Type: ApplicationFiled: November 6, 2014Publication date: May 21, 2015Inventor: Srivastava AMAR
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Patent number: 9035957Abstract: An efficient pipeline debug statistics system and method are described. In one embodiment, an efficient pipeline debug is utilized in a graphics processing pipeline of a handheld device. In one embodiment, a pipeline debug statistics system includes a plurality of pipeline stages with probe points, a central statistic component, and a debug control component. The plurality of pipeline stages with probe points perform pipeline operations. The central statistic block gathers information from the probe points. The debug control component directs the gathering of information from the probe points. In one exemplary implementation, debug control component can direct gathering of information at a variety of levels and abstraction.Type: GrantFiled: August 15, 2007Date of Patent: May 19, 2015Assignee: NVIDIA CORPORATIONInventors: Justin Michael Mahan, Christopher J. Mills, Edward A. Hutchins
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Patent number: 9035851Abstract: A portable terminal, a display apparatus, a luminance control method and a control program are provided. The portable terminal includes a plurality of display units, and a luminance control unit which, in response to an input operation performed for a first display unit of the plurality of display units at a state where images are visibly displayed on the respective display units, performs a luminance control of decreasing a display luminance of a second display unit of the plurality of display units to be lower than a current luminance thereof, the second display unit being different from the first display unit.Type: GrantFiled: April 5, 2012Date of Patent: May 19, 2015Assignee: KYOCERA CorporationInventor: Kenichi Noma
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Patent number: 9035991Abstract: A network apparatus in a collaboration system with a plurality of participants, the apparatus comprising: a processing structure; and a memory including computer program code, wherein the memory and the computer program code are configured, with the processing structure, to cause the network apparatus to at least: present content on a display coupled to the processing structure; select a portion of the display for sharing, the portion having the shared content; simultaneously send said shared content to said display and to an encoder for encoding; automatically discover a network server configured to distribute the shared content with the plurality of participants; couple the apparatus to the network server and transmit the shared content to the network server for distribution to at least one of the plurality of participants, such that the shared content is encoded and decoded, and displayed in real-time.Type: GrantFiled: December 6, 2012Date of Patent: May 19, 2015Assignee: Mitel Networks CorporationInventors: Francis Shen, Paulo Francisco
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Patent number: 9035956Abstract: In an embodiment, a processor that includes multiple cores may implement a power/performance-efficient stop mechanism for power gating. One or more first cores of the multiple cores may have a higher latency stop than one or more second cores of the multiple cores. The power control mechanism may permit continued dispatching of work to the second cores until the first cores have stopped. The power control mechanism may prevent dispatch of additional work once the first cores have stopped, and may power gate the processing in response to the stopping of the second cores. Stopping a core may include one or more of: requesting a context switch from the core or preventing additional work from being dispatched to the core and permitting current work to complete normally. In an embodiment, the processor may be a graphics processing unit (GPU).Type: GrantFiled: May 8, 2012Date of Patent: May 19, 2015Assignee: Apple Inc.Inventors: Richard W. Schreyer, Jason P. Jane, Michael J. E. Swift, Gokhan Avkarogullari, Luc R. Semeria