Abstract: A memory type alternating current plasma display panel has two pixel blocks on both sides of a spacer wall, and scanning/sustain electrode pairs for the two pixel blocks respectively have the innermost sustain electrodes closer to the spacer wall than the associated scanning electrodes so as to increase an offset margin during assemblage of panel structures.

Abstract: A PDP drive method capable of restraining the generation of contour noise and making to be high a brightness level. In the PDP drive method, discharging cells on the plasma display panel start simultaneously on a radio frequency discharge by row lines. Next, the radio frequency discharge, which is caused in each discharging cell on the row line, is erased by applying an erasing pulse corresponding to a brightness level of video to the discharging cells on a row line.

Abstract: Provided is an electrical circuit that provides a boosting circuit that all in one provides a regulated step-up voltage to a non-linear device such as an array of light emitting diodes (LEDs) used in a liquid crystal display (LCD). The unique placement of the current sensing circuit within the boosting circuitry eliminates the need for a separate current regulating circuit, thus minimizing the circuitry needed to provide a constant back lighting LED array of constant luminosity.

Abstract: In an address-while-display (AWD) driving method in which addressing and sustaining are simultaneously performed, a plasma display panel (PDP) is driven with an automatic power control function for reducing power consumption when there are lots of ON pixels over the entire PDP, that is, the brightness of the screen of the PDP is higher than a predetermined level. In the PDP driving method, in order to suppress power consumption for maintaining a bright state of the screen, discharge sustain pulses at respective sub-fields for implementing gray scale display of each frame are invalidated using erase pulses in a constant ratio for each sub-field, while all the video signals applied in the form of the AWD driving waveforms are continuously applied to the respective frame periods in which all the video signals are displayed without interruption, that is, irrespective of whether discharge is performed.

Abstract: A PALC panel is operated by increasing the voltage between the channel electrodes to a firing voltage to create a plasma in the channel, reducing the voltage between the channel electrodes to a sustaining voltage to sustain the plasma for an interval during which a selected drive voltage is applied to the data drive electrode to establish an electric field in the layer of electro-optic material, and reducing the voltage between the channel electrodes to a bias voltage, which is insufficient to sustain the plasma but provides an electric field having a component parallel to the cover sheet in the layer of electro-optic material.

Abstract: In a drive apparatus of a self-scanning type light emission element array, a first bit light emission thyristor is surely set into an ON state, thereby stabilizing shift of a light emitting operation from the first bit light emission thyristor. In the light emission element array drive apparatus which drives a light emission element array having plural light emission thyristors arranged in array and plural shift thyristors arranged in array (each gate of shift thyristors is connected to each gate of light emission thyristors), the apparatus comprises: a generation unit for generating a shift signal to sequentially shift ON states of the shift thyristors; and a generation unit for generating a start signal to start drive of the light emission element array, wherein a gate voltage of the first light emission thyristor is supplied according to the start signal without setting the first shift thyristor into an ON state according to the shift signal.

Abstract: A data interfacing apparatus for interfacing a frame memory with upper and lower address electrode drivers in an alternating current type plasma display panel system is disclosed. The data interfacing apparatus includes a pair of provisional storing sections for provisionally storing RGB data supplied from the frame memory and a shift signal generator for generating a clock signal to provide the clock signal to the respective provisional storing sections. Each of the provisional storing sections includes N shift registers consisting of M delayed flip-flops. Respective input terminals of the shift registers are connected to N output terminals of the frame memory one-to-one. The respective shift registers shift M times the RGB data, which is transferred to the respective input terminals by one bit from the frame memory, and provisionally latch N×M bits RGB data in response to a clock signal.

Abstract: This invention relates to a driving method for reducing the dynamic image false contour for display panels, and more particularly, to a driving method that is useful in the display technique of plasma display panels in this method, the erase period of the driving signal is separated and a display electrode and a data electrode are utilized to compose a pair of erasing signals and thus realize the separated erasing signal periods. The present invention further provides a signal process circuit device of the driving method which comprises a plurality of scanning IC's including a plurality of connected transistor switches in order to achieve the division of erasing signal period in the mentioned driving method, It can prevent the abrupt changes of image brightness and the distortion of dynamic image false contour and effectively improve the moving picture quality when the dynamic image is moving.

Abstract: A plasma display device having three-electrode pixels. Each pixel may be set either in a write state or in a sustain state by a pair of select electrodes. In the write state the pixel may be set either ON or OFF. A pixel is put in a write state when the AC signals applied to the select electrodes are in phase. Once the signals applied to the select electrodes are in phase, the pixel may be set ON or OFF depending on the phase of the signal applied to a data electrode. In the sustain state the pixel remains either ON or OFF regardless of the signal applied to the data electrode. A pixel is put in a sustain state when out-of-phase signals are applied to the pair of select electrodes. The pixels in the display are arranged in rows and columns. Each pixel column has a single data electrode, and each pixel row has a pair of select electrodes associated with it. Pixels in unselected rows may be illuminated concurrently with the writing into pixels in selected rows.

Abstract: In a plasma display device having a three-dimensional matrix wiring arrangement of anodes, cathodes and address electrodes, writing discharge is caused between anodes and address electrodes to temporarily store writing charge on a dielectric layer, and the writing charge is discharged as an auxiliary discharge by applying a sustaining voltage to the cathodes, thereby inducing main discharge between the anodes and the cathodes.

Abstract: The present invention relates to a plasma display device which limits a generation of electromagnetic wave. The plasma display device has first and second drive circuits for applying a drive voltage to first and second display electrode pair. Further, a direction of a charge current flowing at said first display electrode pair when said drive voltage is applied by said first drive circuit is opposite on said plasma display panel to a direction of a charge current flowing at said second display electrode pair when said drive voltage is applied by said second drive circuit. According to the present invention, a transitional charge/discharge current, which is generated upon the application of a drive voltage to one of the display electrodes, and a light emission discharge current flow in opposite directions on the panel. Thus, electromagnetic waves that are generated by the inductances of the display electrode pair cancel each other out.

Abstract: A display panel driving circuit includes a plurality of elementary driver circuits each provided for each one of drive electrodes, an electric power recovery common line, an electric power release common line, first and second coils having one end thereof connected to the electric power recovery common line and the electric power release common line, respectively, and a capacitor having one end connected in common to the other end of the first and second coils.

Abstract: A novel drive system is described for AC plasma (ACP) gas discharge flat bistable matrix panels on which real-time video and computer graphics, both with pixel by pixel gray scale are displayed. The drive scheme increases scan speed, reduces complexity and minimizes circuitry required to operate the video and computer graphics gray scale images on the ACP display through: a) unique application of standard high density memory IC architecture, and b) unique panel drive waveform technique. Flicker is avoided with an interlaced framerate of 46 Hz and non-sequential pixel row scanning. The unique panel drive scheme allows high speed operation to avoid flicker in the ACP panel for real time gray scale video and graphic images. Because of the high speed addressing requirements, the panel waveform techniques apply all of the drive voltages to the ACP panel from the row (Y) axis and only selective cancellation voltage from the column (X) axis.

Abstract: A circuit for driving a plasma display panel includes a scan pulse drive integrated circuit having a plurality of output terminals, and a diode array composed of a corresponding number of diodes each having a cathode connected to a corresponding one of the plurality of output terminals. Anodes of all the diodes are connected in common to one end of a first switch having the other end connected to ground. A high voltage side power supply terminal of the scan pulse driving circuit is connected through a second switch to a negative power supply. During a hold period, the first switch is turned on, but the second switch is turned off, so that a discharge current flows through the diode array to display cells of the plasma display panel, without passing through the inside of the scan pulse driving circuit.

Abstract: A single-line 16 character display is driven using a display driver designed to drive two independent 8 character single-line displays. Conceptually, the 16 character display is treated as the two independent 8 character displays placed side by side. The message for display is placed in a first area of driver memory corresponding to the first 8 character display. A truncated version of the same message for display, with an offset at the beginning equal to the number of characters in the first display line, is stored in a second area of driver memory corresponding to the second 8 character display line. When the message and the truncated version thereof are simultaneously displayed, an observer views a single, coherent 16 character single line display. If the message is greater than 16 characters, the driver scrolls both the message for display and the truncated version thereof, creating a single scrolled message from the point of view of the observer.

Abstract: A method for driving a gas discharge display panel consists of the steps of applying a writing pulse on a specific display electrode line selected from display electrode lines arranged side by side in the panel, applying a scanning pulse on a specific scanning electrode line selected from scanning electrode lines which are arranged side by side and cross the display electrode lines to produce writing gas discharge in cooperation with the writing pulse in a specific discharge cell arranged at an intersection space between the specific display electrode and the specific scanning electrode line, and applying a series of maintaining pulses subsequent to the scanning pulse on the specific scanning electrode during only a maintaining period to produce maintaining gas discharge subsequent to the writing gas discharge in the specific discharge cell, the maintaining gas discharge being intermittently produced in synchronism with the maintaining pulses.

Abstract: A cathode driving circuit for a plasma display panel includes first, second and third storing means, first, second and third AND gates, a first transistor, a first diode, a bias resistor, a first resistor, a second diode, second and third transistors, and third and fourth diodes. Therefore, the configuration of a cathode driving circuit is simplified.