Abstract: A gate driver includes a first shift register connected to gate lines, and configured to supply a gate signal to the gate lines in response to a first start pulse, and a second shift register connected to the gate lines and sensing control lines, and configured to supply the gate signal and a sensing signal to the gate lines and the sensing control lines in response to a second start pulse, in which the second shift register is configured to supply the second start pulse at different times in sequential frames.

Abstract: A display substrate and a display device are provided. The display substrate includes sub-pixels and a light emitting control signal line. The sub-pixel includes an organic light emitting element and a pixel circuit, the organic light emitting element includes a second electrode, the pixel circuit includes a driving transistor and a first light emitting control transistor, and the pixel circuit further includes a connection structure. In the second color sub-pixel, a first electrode of the first light emitting control transistor is electrically connected with the connection structure through a first connection hole, and the connection structure is electrically connected with the second electrode through a second connection hole, the first connection hole and the second connection hole are located on both sides of the light emitting control signal line. In the third color sub-pixel, the second electrode does not overlap with a channel of the driving transistor.

Abstract: A display panel, a manufacturing method of the display panel, and a display device are disclosed. The display panel includes a first substrate and a second substrate. The first substrate includes a first base, a light-shielding layer disposed on the first base, and a color filter layer disposed on the first base, and a common electrode layer disposed on the light-shielding layer and the color filter layer. The common electrode layer is provided with an opening at a position opposite to the color filter layer.

Abstract: A display device can include a display panel including a plurality of subpixels; a feedback part; and a power source configured to output a first power voltage to the feedback part and the display panel, in which the feedback part is configured to output a virtual feedback voltage to the power source, the virtual feedback voltage being based on the first power, and the power source is further configured to adjust a magnitude of the first power voltage to generate an adjusted first power voltage based on the virtual feedback voltage.

Abstract: The present application provides a control component, a display screen, and a control device. The control component is integrated in a display screen and includes a substrate and a light control structure and a touch control structure arranged side by side on the substrate; the light control structure includes a signal input line, a signal output line, and a photosensitive circuit electrically connected between the signal input line and the signal output line; the touch control structure includes a plurality of receiving electrodes and a plurality of transmitting electrodes; and the receiving electrodes are multiplexed as the signal output line.

Abstract: A display device includes a display panel having scan lines, data lines, and sub-pixels disposed therein; a scan driver which drives the scan lines; and a data driver which drives the data lines. Each of the sub-pixels includes: a light emitting element; a driving transistor which drives the light emitting element; a 3-1th transistor electrically connected between a first node of the driving transistor and a high potential voltage; a 1-1th transistor and a 1-2th transistor each electrically connected between a second node of the driving transistor and a 1-1th or 1-2th data line, respectively; a second transistor electrically connected between a third node of the driving transistor and an initialization voltage line; a first capacitor connected between the second node and an anode electrode of the light emitting element; and a second capacitor connected between the high potential voltage and the anode electrode.

Abstract: According to an exemplary embodiment, a display device includes: a plurality of gate lines; a plurality of data lines; and a plurality of pixels connected to the gate lines and the data lines, wherein each of the pixels includes: a transistor configured to include a gate electrode, a first electrode, a second electrode, and a channel semiconductor; a pixel electrode connected to the second electrode and including a plurality of fine branch portions and a connector connected to the second electrode; and a target pattern overlapping a fine slit dispose between adjacent fine branch portions. At least one of the adjacent fine branch portions is directly connected to the connector.

Abstract: A pixel includes a switching transistor transmitting a data voltage to a first node, a storage capacitor electrically connected between a first power supply line and the first node and storing the data voltage, first and second driving transistors electrically connected to the first power supply line, the first node, and a second node, and first and second light emitting elements electrically connected between the second node and a second power supply line. An anode of the first light emitting element and a cathode of the second light emitting element are electrically connected to the second node, a cathode of the first light emitting element and an anode of the second light emitting element are electrically connected to the second power supply line, the first driving transistor is a P-type transistor, and the second driving transistor is an N-type transistor.

Abstract: Gate Driver on Array (GOA) circuit and display device solving problem of electrical stress easily biasing threshold voltage of thin film transistor (TFT), are provided. The GOA circuit including m cascaded GOA units, wherein an nth GOA unit includes a pull-up control unit, a pull-up unit, a compensation control unit, and a pull-down unit.

Abstract: A display panel includes a substrate, a first thin film transistor including a first semiconductor layer and a first gate electrode, a data line extending in a first direction, a scan line extending in a second direction, a second thin film transistor electrically connected to the data line and including a second semiconductor layer and a second gate electrode, a third thin film transistor including a third semiconductor layer and a first upper gate electrode arranged on the third semiconductor layer, a node connection line electrically connecting the first thin film transistor and the third thin film transistor, and a shield line located between the data line and the node connection line in a plan view and including the same material as the first upper gate electrode of the third thin film transistor. The first semiconductor layer includes a silicon semiconductor, and the third semiconductor layer includes an oxide semiconductor.

Abstract: An electronic device includes a display panel, a scan driving circuit, and a data driving circuit. The display panel includes a plurality of scan lines, a plurality of data lines, and a plurality of pixels. The scan driving circuit is configured to apply a scan signal to the scan lines. The data driving circuit is configured to apply a data signal to the data lines. The scan lines extend in a first direction. The scan driving circuit and the data driving circuit are arranged in the first direction.

Abstract: An organic light emitting diode (OLED) display is disclosed. In one aspect, the display includes a scan line transmitting a scan signal, a data line crossing the scan line and transmitting a data voltage, and a driving voltage line crossing the scan line and configured to transmit a driving voltage. The display also includes a switching transistor electrically connected to the scan line and the data line. The display further includes a driving transistor and a compensation transistor. A driving gate electrode and a driving drain electrode are respectively connected to a compensation source electrode and a compensation drain electrode. The display also includes a light blocking layer at least partially covering the compensation transistor and an OLED electrically connected to the driving transistor.

Abstract: A display device includes a display panel and an input sensor on the display panel, the input sensor including sensing electrodes, signal lines connected to the sensing electrodes, an insulating layer on the signal lines, and inspection lines on the insulating layer and electrically connected to each other, each of the inspection lines respectively overlapping a corresponding one of the signal lines.

Abstract: A light shielding area including a first conductive layer, a second conductive layer, a first conductor part disposed between the first conductive layer and the second conductive layer, and a transistor surrounded by the first conductive layer, the second conductive layer, and the first conductor part, and a light transmission area surrounded by the light shielding area are provided, wherein an edge of the first conductor part forms a part of a boundary between the light shielding area and the light transmission area.

Abstract: A panel control circuit for controlling a display panel comprising a first data line and a second data line includes a timing controller configured to generate input data comprising a first input data and a second input data, a first driving circuit configured to output a first video signal corresponding to the first input data into the first data line, and a second driving circuit configured to output a second video signal corresponding to the second input data into the second data line, wherein the timing controller is configured to turn off the second driving circuit based on a first deviation, a second deviation, or a third deviation.

Abstract: Disclosed are an array substrate drive circuit, a display module and a display device. The array substrate drive circuit includes: a signal driver configured for receiving a test signal, and generating a drive signal for driving a pixel array according to the test signal; and a signal isolator configured for dividing the drive signal into an even-numbered row drive signal and an odd-numbered row drive signal for driving the pixel array according to a preset control signal to drive the pixel array in rows. Since adjacent metal conductive layers will not output drive signals at the same time, even if the adjacent metal conductive layers are short-circuited, it can be detected during the test, thus improving the yield of the display panel.

Abstract: A driving circuit for a display panel includes a common voltage generating circuit. The common voltage generating circuit is coupled to multiple common electrodes of the display panel and configured to provide multiple common voltages respectively to the common electrodes. During a frame period, the common voltage generating circuit respectively changes a voltage level of the common voltages at different time.

Abstract: An array substrate includes a plurality of driving units, where each of the plurality of driving units includes a first electrode, a second electrode and at least one thin film transistor; the first electrode and the second electrode are configured to be connected to an anode and a cathode of a light-emitting diode, respectively, such that a vertical projection of the light-emitting diode on the array substrate overlaps with the at least one thin film transistor, and in a light-emitting direction of the light-emitting diode, the at least one thin film transistor is disposed on a backlight side of the light-emitting diode; and each of the plurality of driving units controls the light-emitting diode to be turned on or off according to a driving signal.

Abstract: A display device is provided and includes first and second pixel electrodes in first direction; first and second signal lines in first direction configured to be supplied with first or second binary signals inverted relative to each other; first potential line in second direction crossing first direction configured to be supplied with first potential; second potential line extending in second direction and configured to be supplied with second potential; first switching circuit configured to couple first pixel electrode to first or second potential lines; and second switching circuit configured to couple second pixel electrode to first or second potential lines.

Abstract: A display device includes: a panel including a plurality of panel pads; a circuit board including a plurality of connection pads corresponding to the plurality of panel pads, respectively; and a layer disposed between the panel and the circuit board and including a plurality of conductive particles. The layer includes: an overlapping portion that overlaps the plurality of panel pads and the plurality of connection pads in a first direction; and a non-overlapping portion that does not overlap the plurality of panel pads and the plurality of connection pads in the first direction. In the non-overlapping portion, the conductive particles are adjacent to one side of one panel pad of adjacent panel pads in a second direction intersecting the first direction.

Abstract: A display device is disclosed. Plural sub-pixels of display panel are electrically connected to a gate line set of corresponding row. Each data line is electrically connected to two adjacent sub-pixels of same pixel. The first gate line of each gate line set is electrically connected to one of odd-numbered and even-numbered ones of sub-pixels of pixels of same row. The second gate line of each gate line set is electrically connected to the other one of the odd-numbered and even-numbered ones of sub-pixels of pixels of same row. In one frame time, the data signal drives the two adjacent sub-pixels of same pixel through the nth and (n+1)th data lines using opposite polarities, and the data signal drives the column-direction adjacent two sub-pixels through the nth and (n+1)th data lines using opposite polarities.

Abstract: Provided are a shift register unit circuit and drive method, and a gate driver and a display device. The shift register unit circuit includes a first sub-unit circuit, a second sub-unit circuit, a third sub-unit circuit, and a fourth sub-unit circuit. Responsive to providing a corresponding input pulse and clock signal, the shift register unit circuit is configured output first, second, third, and fourth output signals. The shift register unit circuit is configured such that a fifth node is in conduction with a second node at least while the reset pulse is active.

Abstract: A pixel circuit, which may include a first pixel unit having a first display driving circuit (12), a first pixel electrode (P1), and a first control circuit (11), and a second pixel unit having a second display driving circuit (22), a second pixel electrode (P2), and a second control circuit (21). The first control circuit (11) may be configured to adjust and latch a voltage of a first positive phase node (Q1) and the first display driving circuit (12). The first display driving circuit (12) may be configured to provide a first display driving voltage to the first pixel electrode (P1). The second control circuit (21) may be configured to adjust and latch a voltage of a second positive phase node (Q2) and the second display driving circuit (22). The second display driving circuit (22) may be configured to provide a second display driving voltage to the second pixel electrode (P2).

Abstract: A pixel unit circuit includes a light emitting element, a first end thereof being coupled to a low level input end; a storage capacitor module, a first end thereof being coupled to a direct current voltage input end; a driving transistor, a gate electrode thereof being coupled to a second end of the storage capacitor module, and a first electrode thereof being coupled to a second end of the light emitting element; a first control module, coupled to a gate line, a data line and the gate electrode of the driving transistor, configured to control whether the gate electrode of the driving transistor is connected to the data line under the control of the gate line; and a potential control transistor, a gate electrode and a first electrode thereof being coupled to the first electrode of the driving transistor, the second electrode thereof being grounded.

Abstract: A display device includes a substrate including a display area having a plurality of pixel areas and a non-display area located at at least one side of the display area; a pixel in each of the pixel areas; and a plurality of fan-out lines in the non-display area to form a first conductive layer. The pixel includes a pixel circuit layer including at least one transistor and a first bridge line and a second bridge line; and a display element layer on the pixel circuit layer. Each of the first and second bridge lines is electrically connected to a corresponding fan-out line from among the fan-out lines.

Abstract: The present application discloses a shift-register unit. The shift-register unit includes a first sub-unit including a first input circuit coupled via a first node to a first output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal and the first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. Additionally, the shift-register unit includes a second sub-unit including a second input circuit coupled via a second node to a second output circuit. The second input circuit is configured to control a voltage level of the second node in response to the first input signal and the second output circuit is configured to output a second output signal in response to the voltage level of the second node.

Abstract: A display device according to an embodiment of the disclosure includes a timing controller, a scan driver including a plurality of stages connected to a plurality of clock signal lines and generating a plurality of scan signals in response to the scan start signal, a data driver configured to generate a plurality of data signals based on the image data, and a pixel portion including a plurality of pixels. One stage in the scan driver transmits a carry signal to 2n-th next stage. The timing controller selects any one of a normal frequency and low frequencies lower than the normal frequency as a driving frequency based on the input image data, and adjusts a clock duty of the plurality of clock signals so that a time required to output all of the plurality of scan signals during one frame is constant irrespective of the driving frequency.

Abstract: A shift register unit, a gate drive circuit, a display device and a method of driving a gate drive circuit are provided. The shift register unit includes a shift register circuit and an output control circuit. The shift register circuit is configured to output a valid output level at a first output terminal according to a first input signal received by a first input terminal, and is configured to reset according to a first reset signal received by a first reset terminal. The output control circuit is configured to output an invalid output level at the second output terminal according to a second input signal received by the second input terminal, thereby controlling a level of the first output terminal to the invalid output level, and is configured to reset according to a second reset signal received by the second reset terminal.

Abstract: A liquid crystal layer as a member of a liquid crystal element is disposed between a first resin film substrate and a second resin film substrate. A first/second conductive film is attached to one side of the first/second resin film substrate. A blade is inserted into the liquid crystal layer. The blade is moved while being inserted in the liquid crystal layer, thus making an incision in the liquid crystal layer. Then, the incision location is widened in the first resin film substrate and in the second resin film substrate, forming an opening in the surface of the liquid crystal layer. This also forms a space inside the liquid crystal layer, allowing the opening to communicate with the space. Part of an electrode is then inserted into the space of the liquid crystal layer and the liquid crystal layer is bonded with part of the electrode.

Abstract: The present disclosure provides a pixel compensation driving circuit, which compensates an actual threshold voltage of a driving transistor, and finally makes current flowing through a light-emitting element independent from the actual threshold voltage of the driving transistor, thereby eliminating a drift of the actual threshold voltage of the driving transistor which causes uneven display of a display device, and improving display effect of a screen. The present disclosure also provides a pixel compensation driving method for driving the pixel compensation driving circuit, and a display device including the pixel compensation driving circuit.

Abstract: A multiplexer circuit includes a first switch unit and a second switch unit. The first switch unit is electrically connected to a first data line and a first pixel circuit, and configured to turn on according to a first signal in a first time duration. The second switch unit is electrically connected to the first data line and a second pixel circuit, and configured to turn on according to a second signal in a second time duration. The first time duration and the second time duration substantially start or end at a same time, so that the first time duration and the second time duration have overlap.

Abstract: A display may include an array of pixels, where each pixel in the array includes an organic light-emitting diode coupled to associated thin-film transistors. The thin-film transistors may be controlled using at least first and second horizontal scan line signals. Loading different data values into any given row in the array may cause the scan line signals to exhibit varying rise/fall times, which results in horizontal crosstalk and luminance non-uniformity across the display. The rise and fall times of the second scan line signal are crucial, so the second scan line signal is driven by two separate scan line drivers formed on both sides of the display. Only the fall time of the first scan line signal is crucial, so the first scan line signal is driven by only one peripheral scan line driver and is coupled to an auxiliary pull-down circuit that is only activated during the pull-down transition.

Abstract: A display device according to an embodiment of the disclosure includes a timing controller, a scan driver including a plurality of stages connected to a plurality of clock signal lines and generating a plurality of scan signals in response to the scan start signal, a data driver configured to generate a plurality of data signals based on the image data, and a pixel portion including a plurality of pixels. One stage in the scan driver transmits a carry signal to 2n-th next stage. The timing controller selects any one of a normal frequency and low frequencies lower than the normal frequency as a driving frequency based on the input image data, and adjusts a clock duty of the plurality of clock signals so that a time required to output all of the plurality of scan signals during one frame is constant irrespective of the driving frequency.

Abstract: The present disclosure provides an array substrate, a liquid crystal light control structure and a liquid crystal display panel. The array substrate includes: a base substrate; a plurality of data lines arranged on the base substrate along a first direction; and a plurality of pixel electrodes arranged in an array. Two of the plurality of pixel electrodes, which are adjacent in the first direction, are provided in different layers and insulated from each other. Orthographic projections of the two of the plurality of pixel electrodes, which are adjacent in the first direction, to the base substrate, adjoin each other with an adjoiner therebetween being covered by an orthographic projection of one of the plurality of data lines to the base substrate.

Abstract: A backlight device includes a substrate and a plurality of light emitters on the substrate. Each of the plurality of light emitters includes a brightness controller disposed on the substrate, and a pad unit disposed on the substrate. The brightness controller generates a light-emission current, a light-emitting diode is allowed to be disposed on the pad unit, and the light-emitting diode emits light based on the light-emission current.

Abstract: A display device system circuit and a display device are provided. The display device system circuit includes a power supply, a plurality of functional circuit modules and a plurality of ground wires corresponding to the plurality of functional circuit modules, respectively. Operating current input ends of the plurality of functional circuit modules are electrically connected to a positive electrode of the power supply, respectively. An operating current output end of each of the functional circuit modules is electrically connected to a negative electrode of the power supply via a corresponding ground wire. The functional circuit modules will not be interfered with each other, avoiding causing abnormal displaying by signal coupling between the functional circuit modules.

Abstract: Provided are a driving method and driving device of a display panel, and a display device. A sub-display region in which gray scale values of first sub-pixels are 0 and gray scale values of second sub-pixels are less than a first preset gray scale value is determined as a first sub-display region, and a sub-display region in which not all of the gray scale values of the first sub-pixels are 0 and not all of the gray scale values of the second sub-pixels are less than the first preset gray scale value is determined as a second sub-display region. In a reset stage, a first reset signal is provided to an anode of an organic light emitting element of a sub-pixel of the first sub-display region and a second reset signal is provided to an anode of an organic light emitting element of a sub-pixel of the second sub-display region.

Abstract: A display device may include a first pixel, a second pixel, a first data line electrically connected to the first pixel, a second data line electrically connected to the second pixel and electrically insulated from the first data line, a first signal wire electrically connected to the first data line, a second signal wire electrically connected to the second data line, and a connecting wire electrically connecting the second data line to the second signal wire. The connecting wire may include a first section and a second section. The second section may be directly connected to the first section, may overlap the first pixel, may overlap the first data line, and may be oblique relative to each of the first data line and the second data line in a plan view of the display device.

Abstract: To improve viewing angle characteristics by varying voltage which is applied between liquid crystal elements. A liquid crystal display device in which one pixel is provided with three or more liquid crystal elements and the level of voltage which is applied is varied between the liquid crystal elements is varied. In order to vary the level of the voltage which is applied between the liquid crystal elements, an element which divides the applied voltage is provided. In order to vary the level of the applied voltage, a capacitor, a resistor, a transistor, or the like is used. Viewing angle characteristics can be improved by varying the level of the voltage which is applied between the liquid crystal elements.

Abstract: A display substrate and a display device are provided. The display substrate includes sub-pixels and a light emitting control signal line. The sub-pixel includes an organic light emitting element and a pixel circuit, the organic light emitting element includes a second electrode, the pixel circuit includes a driving transistor and a first light emitting control transistor, and the pixel circuit further includes a connection structure. In the second color sub-pixel, a first electrode of the first light emitting control transistor is electrically connected with the connection structure through a first connection hole, and the connection structure is electrically connected with the second electrode through a second connection hole, the first connection hole and the second connection hole are located on both sides of the light emitting control signal line. In the third color sub-pixel, the second electrode does not overlap with a channel of the driving transistor.

Abstract: This disclosure discloses a shift register element, a method for driving the same, a gate driver circuit, and a display device. The shift register element comprises a first input circuit, a second input circuit, a first node control circuit, a second node control circuit, a third node control circuit, and N output circuits, where the first input circuit, the second input circuit, and the first node control circuit are configured to control a first node, the second node control circuit is configured to control a second node so that the third node control circuit controls the third node according to the first node and the second node, and the N output circuits control corresponding output terminals according to corresponding clock signal terminals under the control of the first node.

Abstract: A display device includes: a substrate including a main display portion, edge portions disposed at edges of the main display portion and including rounded corners, first side portions bent from the edge portions, and second side portions bent from the main display portion; scan lines and data lines that are disposed on the substrate; transistors connected to the scan lines and the data lines; and a data voltage transmission line connected to data lines that are disposed in the first side portions and the edge portions.

Abstract: A display apparatus including a display panel, a gate driver, a data driver, an emission driver, and a driving controller. The display panel includes a pixel including a switching element of a first type and a switching element of a second type. The driving controller determines a driving frequency of the switching element of the first type to be a first driving frequency and a driving frequency of the switching element of the second type to be a second driving frequency less than the first driving frequency in a low frequency driving mode. The driving controller determines the second driving frequency based on a difference of a luminance of a writing frame in which the data voltage is written in the pixel and a luminance of a holding frame in which the written data voltage in the pixel is maintained without writing the data voltage.

Abstract: A display device includes a substrate, a first data line, a scan line, a first sub-pixel, a passivation layer, and a common electrode. The first sub-pixel includes a first main-driving element, a first sub-driving element, a first capacitor electrode, and a first pixel electrode. The first main-driving element includes a first main-gate, a first main-channel layer, a first main-source, and a first main-drain. The first sub-driving element includes a first sub-gate, a first sub-channel layer, a first sub-source, and a first sub-drain. The first capacitor electrode is electrically connected with the first main-drain and the first sub-source. The first pixel electrode is electrically connected with the first sub-drain. The common electrode and the first capacitor electrode have a first main capacitor therebetween. The common electrode and the first pixel electrode have a first sub capacitor therebetween.

Abstract: A display device is disclosed. In an embodiment a display device includes a plurality of image points, each image point comprising at least one active region configured to generate first radiation, a carrier including a drive circuit for the plurality of image points and a detector assigned to at least some image points, the detector configured to receive second radiation, wherein at least some image points are configured to act either as an emitter or as a detector during operation of the display device.

Abstract: Provided are a display panel (10) and the driving method thereof. The display panel (10) may include a first substrate (110) and a second substrate (120) opposite the first substrate (110). The first substrate (110) may include a pixel unit (100), and the pixel unit (100) may include a light emitting element (101) and a first transistor (112) for driving the light emitting element (101) to emit light. The second substrate (120) may include a second transistor (122). The second transistor (122) may be configured to have a second drift value of a second threshold voltage which has a specific relationship with a first drift value of a first threshold voltage of the first transistor (112) under same ambient condition.

Abstract: Provided is a touch-panel-integrated display device in which influences of noises due to voltages of data lines can be reduced, or noise correction can be easily performed. A touch-panel-integrated display device 1 includes a display panel that has a display area that includes a plurality of pixels defined by a plurality of gate lines 101 and a plurality of data lines 102. In the display area, a plurality of electrodes 111, and a plurality of lines 112 connected with the electrodes, are provided. A predetermined voltage is applied to each line 112 every fixed time period, and changes in the capacitance at each electrode 111 are detected. To each data line 102, a voltage having a polarity different from that for an adjacent one of the data lines 102 is applied. Each of the electrodes 111 is connected with at least one of the plurality of lines 112.

Abstract: A display device includes a display panel and a level shifter. The display panel displays images. The level shifter includes a signal pad through which a clock signal to drive the display panel is output and a reverse signal pad through which a reverse clock signal different from the clock signal is output, and the reverse signal pad is in an electrically floated state.

Abstract: An OLED display and a method of manufacturing thereof are disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to transfer a scan signal, a data line and a driving voltage line crossing the scan line and respectively configured to transfer a data voltage and a driving voltage, and a switching transistor electrically connected to the scan line and the data line and including a switching drain electrode configured to output the data voltage. The display also includes a driving transistor including a driving gate electrode, a driving drain electrode, and a driving source electrode electrically connected to the switching drain electrode. The display further includes a storage capacitor including a first storage electrode electrically connected to the driving gate electrode and a second storage electrode formed on the same layer as the driving voltage line.

Abstract: A display device includes a substrate, a plurality of pixel columns, and a lighting test circuit unit. The lighting test circuit unit is disposed in a non-display area on the substrate, includes a plurality of lighting test transistors, and provides a lighting test voltage to the pixel columns. Each of the lighting test transistors includes an active pattern including a source area, a drain area, and a channel area, a gate electrode disposed in the channel area, an interlayer insulating layer including a first contact hole spaced apart from a first side of the gate electrode by about 7 um or more, and a source electrode contacting the source area of the active pattern through the first contact hole.