Abstract: An organic light emitting display device including a dam structure disposed in a non-display area of a substrate and an alignment mark disposed outside the dam structure. The alignment mark is not covered by, and does not overlap with, the dam structure, because the alignment mark is disposed outside the dame structure. Thus, a scribing process may be performed smoothly.

Abstract: A common electrode driver includes an inverting amplifier including a first resistor, a second resistor, and an operational amplifier, and a resistance ratio adjustment circuit that adjusts, in accordance with a length of one horizontal scan period, a resistance ratio being a ratio of a resistance value of the second resistor to a resistance value of the first resistor. A feedback voltage is provided to one end of the first resistor. The resistance ratio adjustment circuit sets the resistance ratio when second driving is performed, in which a length of one horizontal scan period is a second time longer than a first time, to be smaller than the resistance ratio when first driving is performed, in which a length of one horizontal scan period is the first time.

Abstract: A display device includes: a plurality of backlight modules, where each backlight module includes a plurality of light sources capable of emitting light in at least three different colors; a color-filter-less liquid crystal display module including a plurality of pixel units arranged in an array form and a plurality of scanning lines coupled to the pixel units; where the plurality of backlight modules are arranged in parallel with the liquid crystal display module; where an orthogonal projection of each backlight module onto a plane where the liquid crystal display module is located corresponds to at least two rows of pixel units, where the pixel units in one row are along an length extension direction of each scanning line; and a driving circuit coupled to each backlight module and configured to apply a backlight driving signal to each backlight module.

Abstract: A display device includes a pixel, wherein the pixel has a driving transistor, a monitoring transistor connected to the driving transistor, and a resistor provided in the pixel, and having one end connected between the driving transistor and the monitoring transistor, and the display device is capable of detecting a temperature of the pixel in accordance with a value of current that flows through the resistor and the monitoring transistor.

Abstract: An electro-optical device is provided and includes a plurality of first signal lines extending in a first direction on a substrate; a plurality of second signal lines extending in a second direction on the substrate, the second direction intersecting the first direction; a pixel area in which a plurality of pixel electrodes are disposed; an outer peripheral edge of the pixel area having a curved portion or a bent portion; and a first circuit block, a second circuit block, and a third circuit block arranged along the outer peripheral edge, wherein the second circuit block is arranged between the first circuit block and the first circuit block, and a first gap between the first circuit bock and the second circuit block is different from a second gap between the second circuit block and the third circuit block.

Abstract: A display device comprises a substrate, a semiconductor layer thereon, a first insulating layer on the semiconductor layer, a first conductive layer on the first insulating layer and including a first electrode pattern, a second insulating layer on the first insulating layer and including first and second conductive patterns, a third insulating layer on the second conductive layer, and a display element layer on the third insulating layer and including a first pixel electrode connected to the first conductive pattern through a first via hole, a second pixel electrode connected to the second conductive pattern through a second via hole, and a micro light-emitting element between the pixel electrodes, the first conductive pattern contacting the semiconductor layer through a first contact hole and the first electrode pattern through a second contact hole, and the second conductive pattern overlapping the first electrode pattern to form a first capacitor therewith.

Abstract: The present disclosure provides a flexible display device. The flexible display device has different base materials for the back supporting film at the bonding region and the non-bonding region, so that it can satisfy the requirements for AOI and bending resistance respectively. The present disclosure also provides a back film for a flexible display device and a preparation method thereof.

Abstract: The disclosure provides an output circuit, a display driver including the output circuit and a display device. The disclosure includes a PMOS transistor switch that outputs a positive voltage signal from an output terminal when it is turned on, an NMOS transistor switch that outputs a negative voltage signal from the output terminal when it is turned on, and a voltage control circuit that supplies a voltage obtained by shifting the level of a voltage of a source or a drain when the PMOS transistor switch is turned on to a high potential side to a back gate of the PMOS transistor switch and supplies a voltage obtained by shifting the level of a voltage of a source or a drain when the NMOS transistor switch is turned on to a low potential side to a back gate of the NMOS transistor switch.

Abstract: To prevent an electrostatic damage on a display device formed with a driving circuit. Protective circuits are provided not only at input terminal parts, but also at intermediate parts of a circuit or at the ends of wiring lines. Otherwise, the protective circuits are provided at the ends of the wiring lines and at the places immediately before and after the input terminals, respectively, and then the circuit is interposed therebetween. Further, the protective circuits are provided around a circuit with a large current consumption.

Abstract: A power circuit and a testing device are provided. A first voltage output circuit of the power circuit provides normal working voltage to electronic device, and a second voltage output circuit provides aging voltage to electronic device. The aging voltage is greater than the normal working voltage, and a controller stores a preset failure rate curve of an electronic device and controls switching of output voltages of the first voltage output circuit and the second voltage output circuit according to the preset failure rate curve.

Abstract: A source driver includes a first DAC for driving a first-color subpixel and a second DAC for driving a second-color subpixel. Each DAC is configured to output at least one output voltage according to an N-bit data code, and includes a plurality of sub-DACs, an interpolation circuit and a switch circuit. Each sub-DAC receives m bits of the N-bit data code and generates a set of intermediate voltages accordingly. The interpolation circuit performs an interpolation on a selected set of intermediate voltages according to k bits of the N-bit data code and at least one interpolation control signal, to generate the output voltage. The switch circuit electrically connects the interpolation circuit and a selected sub-DAC which outputs the selected set of intermediate voltages. The interpolation circuit of the first DAC and the interpolation circuit of the second DAC respectively perform the interpolation according to different numbers of interpolation bits.

Abstract: A display apparatus includes: a display panel including: a gate line; a data line; and a pixel electrically connected to the gate line and the data line, and to display a normal image and a compensation image; a gate driver to output a gate signal to the gate line; a data driver to output a data voltage to the data line; and a power voltage generator to vary a level of a gate power voltage based on a compensation duty ratio corresponding to a ratio between a display duration of the normal image and a display duration of the compensation image.

Abstract: It is an object to provide a display device which can favorably display a image without delayed or distorted signals. The display device includes a first gate driver and a second gate driver. The first gate driver and the second gate driver each include a plurality of flip flop circuits and a plurality of transfer signal generation circuits. Both the flip flop circuit and the transfer signal generation circuit are circuits which output a signal inputted to a first input terminal with a half clock cycle delay. In addition, an output terminal of the transfer signal generation circuit is directly connected to a first input terminal of the flip flop circuit in the next stage. Therefore, delay and distortion of the signal which is inputted from the transfer signal generation circuit to the flip flop circuit can be reduced.

Abstract: A driving method of a display device and a display device are disclosed, the driving method including: detecting current pixel inversion mode; determining pixel polarities and first data signals for a next frame based on pixel polarities of a current frame and the inversion mode; determining whether the next frame is an overload image based on pixel bright-or-dark values and grayscale values corresponding to the next frame and those corresponding to the overload image; when the next frame is an overload image, modifying a pixel polarity order corresponding to the first data signals, and generating and outputting second data signals to drive the display device to display the next frame; otherwise outputting the first data signals to drive the display device to display the next frame. The pixel polarities corresponding to the first data signals are in a different order than those corresponding to the second data signals.

Abstract: The present disclosure relates to a pixel circuit and pixel driving apparatus technology. In this technology, two LEDs are arranged in parallel and selectively used in a hybrid manner in which a PWM (pulse width modulation) scheme for supplying a ramp voltage as a gate voltage for a transistor arranged within a pixel and for turning off the LEDs at the moment when the gate voltage becomes equal to a threshold voltage and a PAM (pulse amplitude modulation) scheme for determining a starting value of the ramp voltage based on a grayscale value of the pixel are combined.

Abstract: A frame generation subsystem renders a sequence of frames and a display control subsystem provides a brightness control signal configured to control a brightness of frames displayed at a display panel via pulse width modulation (PWM) of the brightness control signal and determines a deviation in a duty cycle of a first PWM period of the brightness control signal from a default duty cycle resulting from a delayed rendering of a frame. The display control subsystem adjusts a duty cycle of at least a second PWM period to compensate for the deviation in the duty cycle of the first PWM period. The resulting average duty cycle of the brightness control signal over the two frame periods is approximately equal to a default duty cycle and thereby mitigates viewable flicker resulting from the duty cycle change caused by the delayed rendering.

Abstract: An apparatus for manufacturing a display device comprises a stage, a panel cell disposed on the stage and including a first alignment line, and a second alignment line extending parallel to the first alignment line, a field application part providing an alignment signal to the first alignment line and the second alignment line of the panel cell, and light-emitting elements aligned between the first alignment line and the second alignment line. The field application part provides an alignment signal to the first alignment line and the second alignment line, the alignment signal having the same positive integral value and negative integral value, having a different positive peak voltage from the alignment signal's negative peak voltage, and having a different positive pulse width from the alignment signal's negative pulse width.

Abstract: A display apparatus includes a backlight module with backlight zones, a panel over the backlight module, and a circuit configured to generate compensated pixel data for the panel based on image data and an arrangement of the zones of the backlight module, in which the image data has image areas respectively corresponding to the backlight zones. For a first image area being a low-luminance image area and a luminance intensity of a first zone of the zones corresponding to the first image area being less than a luminance intensity of a second zone corresponding to a second image area neighboring the first image area, the circuit performs first pixel compensation for high-luminance pixels in the second image area and second pixel compensation on low-luminance pixels in the second image area, in which the second pixel compensation is greater than the first pixel compensation.

Abstract: An emissive display device includes a display area which includes a plurality of pixels, and a driver disposed at a side of the display area, where the driver includes at least two emission signal stages disposed in one row, and an input signal line connected to the emission signal stages, and the at least two emission signal stages are connected to the same input signal line.

Abstract: A liquid crystal display device having an outer shape of a display region formed other than a rectangle. A driver for supplying a video signal is disposed outside the display region. A selector with selector TFT is disposed between the display region and the driver. A video signal line is disposed between the driver and the selector, and a drain line is disposed between the selector and the display region. A scanning circuit for supplying a scanning signal to the scanning line is disposed outside the display region. The selector is disposed between the scanning line and the display region, and covered with ITO as the common electrode. The common bus wiring is disposed outside the selector.

Abstract: A display device, a display driving integrated circuit (DDIC), and an operation method are provided. The display device includes a display panel, a first DDIC, and a second DDIC. The first DDIC generates a display synchronization signal, and drives a first display area of a display panel according to the display synchronization signal. The second DDIC is coupled to the first DDIC to receive the display synchronization signal. The second DDIC performs a frequency tracking operation on an internal clock signal of the second DDIC by selectively using the display synchronization signal. The second DDIC drives a second display area of the display panel according to the internal clock signal and the display synchronization signal.

Abstract: A display device includes a display panel including a pixel, a driving controller that receives an image signal and outputs an image data signal in which the image signal is compensated, and a data driving circuit that provides the pixel with a data signal corresponding to the image data signal. The driving controller includes a memory, a hysteresis calculator that calculates a current hysteresis state value of a current frame based on the image signal and a previous hysteresis state value of a previous frame, which is stored in the memory, and stores the current hysteresis state value in the memory, and a compensator that calculates a compensation value based on the image signal and the previous hysteresis state value stored in the memory and compensates for the image signal depending on the compensation value to output the image data signal.

Abstract: A display apparatus includes a plurality of pixels arranged in rows and columns, each pixel column extends in a first direction and each pixel row extends in a second direction crossing the first direction, a first data line extending in the first direction and configured to transfer a data voltage to pixels included in at least two pixel columns, and for each pixel row, a first gate line extending in the second direction and disposed at a first side of the pixel row, and a second gate line extending in the second direction and disposed at a second side of the pixel row, the first and second sides of the pixel row are opposite to each other. In a pair of adjacent pixel columns, pixels, which are connected to the first gate line of their respective pixel row, are arranged in a zigzag arrangement in the first direction.

Abstract: An information handling system presents visual images at a display through a scalar that adjusts the visual images with a gamma lookup table selected from plural gamma lookup tables based upon a refresh rate of the display. As a graphics processor commands variable refresh rates, a blanking period is used to adjust the refresh rates and a gamma lookup table selection is applied during the blanking period to encourage uniform luminance. Each gamma lookup table is stored in a separate SRAM and input to a multiplexor that uses the refresh rate to select which gamma adjusted visual image is presented at the display.

Abstract: A demultiplexer is provided. The demultiplexer includes a plurality of demultiplexer units. Each of the demultiplexer units includes two first type thin film transistors sharing a source electrode, and two second type thin film transistors are disposed between two of the demultiplexer units adjacent to each other. Space utilization of the demultiplexer is improved. A display panel and a display device having the demultiplexer are also provided.

Abstract: The display device includes: a display panel, having a plurality of pixel assemblies each including a power supply end; a timing control circuit, having a first signal output end configured to output a selection instruction signal, and a second signal output end configured to output a clock signal; and a power circuit, including a voltage generation assembly configured to generate a plurality of step voltages, a voltage selection assembly configured to select at least one step voltage from the plurality of step voltages in response to the selection instruction signal, and a voltage conversion assembly configured to determine a power supply voltage on the basis of the step voltage in response to the clock signal and to output the power supply voltage to the power supply end.

Abstract: The disclosure provides an array substrate, a manufacturing method thereof and a display device. The array substrate includes a plurality of conductive lines and an electrostatic protection circuit on a base substrate. At least some of the conductive lines are connected through the electrostatic protection circuit. Two conductive lines connected with the electrostatic protection circuit are respectively a first conductive line and a second conductive line. The electrostatic protection circuit includes a first transistor, a second transistor, and a first capacitor. A first electrode of the first transistor, a first electrode of the second transistor and a gate electrode of the second transistor are connected to the second conductive line, and a second electrode of the first transistor, a second electrode of the second transistor and a gate electrode of the first transistor are connected to the first conductive line.

Abstract: An electronic device includes a housing structure including a plurality of antennas; a hinge; a first housing connected to the hinge and including a first surface and a second surface opposite to the first surface; and a second housing connected to the hinge and including a third surface and a fourth surface opposite to the third surface, a sensor module; and a processor operatively connected to the sensor module. The processor detects an unfolding operation or a folding operation between the first housing and the second housing using the sensor module, generate folding information on the unfolding operation or the folding operation based on a folding angle formed between the first housing and the second housing, when the unfolding operation or the folding operation is detected, and control an output of at least one antenna based on the folding information.

Abstract: A shift register unit includes an input circuit, a first control circuit, a second control circuit, and an output circuit. The input circuit is configured to provide a signal of a first clock signal line or a first power line to a first control node. The first control circuit is configured to provide a signal of the first power line or a second power line to a first output terminal. The second control circuit is configured to provide a signal of the first power line or the second power line to a second output terminal. The output circuit is configured to output an effective level signal of the first power line or the second power line to a third output terminal.

Abstract: A display panel and a driving method thereof, and a display device are provided. The display panel includes a first display region, a second display region, and a control device. The first display region is on a side of the second display region, and the second display region includes N display sub-regions; and the control device is connected to the first display region and the second display region, respectively, and configured to control display of the first display region and display of the second display region in i time intervals within one frame period, and sequentially control the display of the first display region and display of an i-th display sub-region in the second display region in an i-th time interval, wherein 1?i?N, and N is a positive integer greater than or equal to 3.

Abstract: It is an object to provide a display device which can favorably display a image without delayed or distorted signals. The display device includes a first gate driver and a second gate driver. The first gate driver and the second gate driver each include a plurality of flip flop circuits and a plurality of transfer signal generation circuits. Both the flip flop circuit and the transfer signal generation circuit are circuits which output a signal inputted to a first input terminal with a half clock cycle delay. In addition, an output terminal of the transfer signal generation circuit is directly connected to a first input terminal of the flip flop circuit in the next stage. Therefore, delay and distortion of the signal which is inputted from the transfer signal generation circuit to the flip flop circuit can be reduced.

Abstract: The present invention provides a chipset for FRC, wherein the chipset includes a first FRC chip and a second FRC chip. The first FRC chip is configured to receive a first part of input image data, and perform a motion compensation on the first part of the input image data to generate a first part of an output image data, wherein a frame rate of the output image data is greater than or equal to a frame rate of the input image data. The second FRC chip is configured to receive a second part of the input image data, and perform the motion compensation on the second part of the input image data to generate a second part of the output image data; wherein the first part and the second part of the output image data are combined into the complete output image data for displaying on a display panel.

Abstract: Disclosed are a gate driving circuit including a first gate output buffer circuit and a control circuit, and a display device including the same. The control circuit may include a first transistor connected between a first driving voltage node and a QB node, two second transistors connected in series between the QB node and a second low level voltage node, a third transistor connected between a connection node of the two second transistors and the first driving voltage node, a fourth transistor connected between the gate node of the first transistor and the first driving voltage node, and two fifth transistors connected in series between the gate node of the first transistor and the second low level voltage node. A connection node of the two fifth transistors may be electrically connected to the source node or the drain node of the third transistor.

Abstract: A display device is provided. The display device includes a display panel and a plurality of driving chips. A detection circuit of each of the driving chips includes a plurality of sub-detection circuits. Each of the sub-detection circuits is correspondingly coupled to one data line through a control switch corresponding to each of the sub-detection circuits. The display panel further has a plurality of detection pads. A plurality of detection signals received by the detection pads are transmitted to the data lines through the sub-detection circuits. A portion of the data lines correspondingly coupled to each of the driving chips is grouped into a data line group. Resistance of the sub-detection circuits correspondingly coupled to the portion of the data lines in the data line group is caused to continuously gradually vary.

Abstract: A head-up display system includes a first projection module, a second projection module, and a first reflective optical element. The first projection module projects a first image. The second projection module projects a second image. The first reflective optical element reflects at least a part of the first image and at least a part of the second image. The first projection module includes a first display panel that displays the first image and projects the first image toward the first reflective optical element. The second projection module includes a second display panel that displays the second image, and an optical system that directs the second image toward the first reflective optical element.

Abstract: A polymer dispersion type liquid crystal device includes a pair of transparent substrates; a pair of transparent electrodes provided between the pair of transparent substrates; a liquid crystal layer formed by filling a polymer dispersion type liquid crystal between the pair of transparent electrodes; and a driving circuit that applies a voltage between the pair of transparent electrodes to set the liquid crystal layer to a non-scattering state or a scattering state. The driving circuit applies a direct current voltage that periodically inverts a polarity between the pair of transparent electrodes.

Abstract: Disclosed are a display panel and a display apparatus. The display panel includes an opposing substrate, an array substrate and a liquid crystal layer. The array substrate includes: a first base substrate; a color film layer, includes a black matrix and a plurality of color resistors, the black matrix includes a plurality of pixel openings and a plurality of first light transmitting holes, and color resistors is arranged one pixel opening correspondingly; and photosensitive sensors, arranged between the color film layer and the first base substrate, orthographic projections of the plurality of photosensitive sensors on the first base substrate are in an orthographic projection of the black matrix on the first base substrate, and the orthographic projection of each of the plurality of photosensitive sensors on the first base substrate covers an orthographic projection of at least one the plurality of first light transmitting holes on the first base substrate.

Abstract: A method of driving a light emitting diode (LED) backlight unit, which includes a plurality of LED elements that are connected to a plurality of gate lines and a plurality of source lines, includes generating a plurality of gate signals applied to the plurality of gate lines. While the plurality of gate signals are generated, a non-overlap interval between activation intervals of two adjacent gate signals is generated. All of the plurality of gate signals are deactivated during the non-overlap interval. A plurality of source signals applied to the plurality of source lines are generated. While the plurality of source signals are generated, a high-impedance (Hi-Z) interval included in the non-overlap interval is generated. At least some of the plurality of source signals have a high-impedance state during the high-impedance interval.

Abstract: A display device includes a display panel and the display panel includes a pixel. The pixel includes a light emitting unit including at least one light emitting element, a driving transistor providing a driving current corresponding to a data signal to the light emitting unit, and a first transistor electrically connected between both ends of the light emitting unit. A driver provides the data signal to the pixel and provides a duty control signal to the first transistor. The driver varies a voltage level of the data signal in a first grayscale section in which a grayscale corresponding to the data signal is greater than or equal to a reference grayscale, and varies a duty ratio of the duty control signal in a second grayscale section in which the grayscale is less than the reference grayscale.

Abstract: Provided is an array substrate, a manufacturing method for an array substrate, and a display panel. The array substrate includes a first substrate base, common electrode lines, a color filter layer, and a planarization layer; the color filter layer includes first color filters and a second color filters, forming color filter channels therebetween on the common electrode lines, so as to avoid overlapping between the first color filters and the second color filters. The width of the common electrode lines is relatively small, ensuring a high aperture rate of the array substrate. Additionally, the array substrate further includes a planarization layer filled in the color filter channels, this minimizes the color filter channels to ensure flatness between the first color filters and the second color filters, so that etching residues in the color filter channels can be avoided when forming the pixel electrode layer.

Abstract: A backlight module and a display device having same are provided in the present disclosure. The backlight module includes a plurality of backplanes that are combined, where a plurality of light-emitting units are disposed. Each of the light-emitting units includes a first light-emitting unit located in the combining areas of the adjacent backplanes, and a second light-emitting unit located in the other areas of the backplanes. In at least one backplane, a first resistance between the first light-emitting unit and the corresponding power source high-potential signal input terminal is smaller than a second resistance between the second light-emitting unit and the corresponding power source high-potential signal input terminal.

Abstract: In an embodiment, a terminal device includes a display unit having a display screen, and a light sensing unit located below the display unit and configured to sense incident light transmitted through the display screen. The display unit includes a transparent electrode, an opaque electrode, and an organic layer sandwiched between the two electrodes. The organic layer spontaneously emits light when a voltage difference is applied between the two electrodes. The second electrode has a semi-transparent area disposed corresponding to the light sensing unit and a remaining area which is an area of the second electrode except for the semi-transparent area. Also, an image capturing method is provided.

Abstract: A plasma process monitoring device capable of monitoring plasma light distributed in a certain area in a chamber includes a selection area light transmitter and a monitor. The selection area light transmitter is disposed to face a viewport formed in a chamber and includes a plurality of selective light blockers for selectively blocking plasma light emitted through the viewport. The monitor receives plasma light transmitted through at least one of a plurality of selective light blockers to acquire information on the plasma light, and monitors the uniformity of plasma generated in the chamber based on the information on the plasma light.

Abstract: A display device includes a first gamma line providing a first gamma voltage; a second gamma line providing a second gamma voltage; a local tab point line; a first switch configured to connect the first gamma line to the local tab point line based on a tab division enable signal; and a second switch configured to connect the second gamma line to the local tab point line based on the tab division enable signal.

Abstract: A cholesteric liquid crystal display device includes a solar cell, a first substrate, a shielding layer, a first electrode layer, a cholesteric liquid crystal layer, a second electrode layer and a second substrate stacked sequentially from bottom to top. The solar cell includes a metal wiring pattern layer. The shielding layer corresponds to the upper side of the metal wiring pattern layer, and is used to reduce the reflection of light from the metal circuit pattern layer. In this way, the cholesteric liquid crystal display device replaces the traditional black absorbing layer with the black material of the solar cell, which can not only absorb light, but also display the image with self-sustaining power. The cholesteric liquid crystal display device shields the arrangement of the metal wiring pattern layer through the shielding layer, which can ensure the image quality of the display panel.

Abstract: The present application discloses an over-current protection circuit, a driving method for the over-current protection circuit and a display device. The over-current protection circuit includes a detection circuit, a first protection branch and a comparison circuit; where the detection circuit detects the current of a preset detection point in real time and obtains a detection voltage based on the current passing through the detection point; the first protection branch includes a delayer which delays the detection voltage obtained by the detection circuit for a preset time and then outputs a first reference voltage; and the comparison circuit compares the detection voltage with the first reference voltage.

Abstract: A display device including: a substrate; a first thin film transistor of polysilicon semiconductor, a second thin film transistor of oxide semiconductor; a first light shading film opposing to the polysilicon semiconductor, and a second light shading film opposing to the oxide semiconductor; a first insulating film, a second insulating film which is constituted from plural insulating films, and a third insulating film superposed in this order; a first through hole penetrating the second insulating film and not penetrating the first insulating film and the third insulating film; a second through hole penetrating the first insulating film and the third insulating film; the first light shading film connects with a first conductive component, a part of the first conductive component exists on the third insulating film, through the second through hole.

Abstract: A display device can include a display panel having sub pixels configured to emit light of different colors, a data driver configured to output a data voltage to the sub pixels via data lines, and a timing controller configured to output power control signals for controlling a driving current which drives the data driver. The data driver can include source driving integrated circuits, each including power control circuits configured to generate the driving current in accordance with each of the power control signals, and amplifiers configured to be applied with the driving current to output the data voltage to each of the data lines.

Abstract: Disclosed systems and methods for off-axis color correction in dynamic image capture of video wall displays involve measuring color performance of specific LED tiles or video walls and providing a database to store the characteristics of these off-axis measurements for use in color correction. The database is accessible by a color correction engine associated directly or indirectly with the video rendering engine so that when combined with real-time information on camera view angle and field of view relative to the display, a color correction function can be incorporated into the rendering of the display portion within the field of view of the camera so as to reduce or eliminate off-axis color variations/distortions in the captured image.

Abstract: When, in a liquid crystal projector, optical responsiveness of a liquid crystal panel corresponding to G is better than optical responsiveness of a liquid crystal panel corresponding to R, a display control circuit performs a tr correction and a tf correction of overdrive processing for R, and performs only the tr correction of the overdrive process for G, and does not perform the tf correction for G. The display control circuit performs a black floating process for R, G, and B.