Abstract: Provided is a liquid crystal handwriting board. The liquid crystal handwriting board includes: a liquid crystal panel, a photosensitive assembly, and a control assembly; wherein the liquid crystal panel includes a first substrate and a second substrate that are opposite; the photosensitive assembly includes a plurality of photosensitive elements; and the control assembly is electrically connected to the liquid crystal panel and the photosensitive assembly, and is configured to determine position information of a pixel region for erasure by detecting position information of target light irradiated to the liquid crystal panel by the photosensitive assembly and supply a pixel voltage to the plurality of pixel electrodes in the pixel region for erasure, such that a voltage difference is present between the plurality of pixel electrodes in the pixel region for erasure and the common electrode.

Abstract: A switchable privacy display device comprises a spatial light modulator and a switchable diffractive view angle control retarder arrangement arranged between a display polariser of the spatial light modulator and an additional polariser. The display achieves high image visibility to an off-axis user in a share mode of operation and high image security to an off-axis snooper in privacy mode of operation.

Abstract: A head-mountable device can operate in concert with one or more optical assemblies thereof to provide multiple users with shared experiences and content enjoyment. Such operations can be facilitated by a connection between the head-mountable device and one or both of its optical assemblies to allow different users to receive content. Such a connection can be made possible by a communication link that directly and/or physically connects the head-mountable device and one or both of its optical assemblies when the one or both of the optical assemblies is removed from the head-mountable device for operation by a separate user. The ability to provide multiple outputs on separate components allows separate users to participate in a shared experience.

Abstract: A semiconductor device includes a gradation voltage generation circuit, output amplifier circuits, a drive control circuit, and a delay time measurement circuit. The gradation voltage generation circuit converts, according to a load signal, pixel data pieces into gradation voltages and outputs the gradation voltages. The output amplifier circuits generate drive signals by individually amplifying the gradation voltages, and output the drive signals to data lines. The drive control circuit outputs the load signal to the gradation voltage generation circuit according to a horizontal synchronization signal. The delay time measurement circuit obtains, as a measured delay time, a time from receiving the measurement start signal until a voltage value of the drive signal outputted from one of the output amplifier circuits exceeds a predetermined threshold voltage. The drive control circuit shifts a timing of outputting the load signal by a difference between the measured delay time and a reference delay time.

Abstract: According to an aspect, a display device includes: a substrate having a display region; and a plurality of temperature detection wiring lines each having a conductive thin wiring line arranged at a position overlapping with the display region in plan view. A light shielding layer is arranged so as to extend in a first direction in the display region, and the conductive thin wiring line is arranged at a position overlapping with the light shielding layer and extends in the first direction along the light shielding layer in plan view.

Abstract: Systems and methods for a digital pixel circuit for liquid crystal displays are provided. The design includes a dual-voltage pixel design, a two-transistor level-shift circuit design, self-adjusting transistor bias circuitry; and an optional on-chip test-array to determine die-specific design-center values for critical transistor leakage and threshold parameters. Level shift design simplicity, small pixel pitch, and applicability for small display applications such as microdisplays, are among the various benefits and advantages obtained.

Abstract: The disclosure provides a panel, a motherboard, and a display device. The panel has an active area and an inactive area surrounding the active area. The panel includes: a plurality of groups of signal lines positioned in the active area; a plurality of groups of bonding pins distributed in portions, on two opposite sides of the active area, of the inactive area, different groups of bonding pins on the same side of the active area being arranged in a row; and a plurality of groups of trace lines distributed in the inactive area surrounding the active area, one end of the trace line being electrically connected with the signal line, the other end of the trace line being electrically connected with the bonding pin, and two ends of the same signal line being electrically connected with two trace lines.

Abstract: A display device includes a window; a display panel including: a flat portion corresponding to the display area, and a bending portion extending from the flat portion and at which the display panel is bendable; a circuit substrate connected to the display panel at the bending portion; and a protection film disposed facing the window with the display panel therebetween. The window and the display panel each include a first side surface corresponding to the bending portion, and remaining side surfaces except for the first side surface, and the remaining side surfaces of the window and the display panel are respectively aligned with each other to define a total planar area of the window being equal to a total planar area of the flat portion.

Abstract: Disclosed is a pixel circuit including a drive sub-circuit, a writing sub-circuit, a reset sub-circuit, a coupling sub-circuit, a storage sub-circuit, and a light emitting element, wherein the drive sub-circuit is configured to provide a drive current to the light emitting element under control of signals of a first node and a second node; the writing sub-circuit is configured to write a signal of a data signal terminal to the second node under control of a signal of a scan signal terminal; the coupling sub-circuit is configured to raise the voltage of the first node through a coupling action; the reset sub-circuit is configured to reset an anode terminal of the light emitting element under control of a signal of the scan signal terminal and reset a control terminal of the drive sub-circuit under control of a signal of a reset control signal terminal.

Abstract: A display panel and a display device are provided. The display panel includes pixel circuits arranged in an array and scan lines. Each pixel circuit in a N-th row of pixel circuits includes a driving transistor, a writing transistor, and a sensing transistor. A N-th scan line is configured to control charging of the N-th row of pixel circuits, a (N+1)-th scan line is configured to control the charging of a (N+1)-th row of pixel circuits, a gate of the writing transistor in each pixel circuit of the N-th row of pixel circuits is electrically connected to the N-th scan line, and a gate of the sensing transistor in each pixel circuit of the N-th row of pixel circuits is electrically connected to the (N+1)-th scan line.

Abstract: A display apparatus and an electronic device are provided, and belong to the field of display technology. The display apparatus includes a display module and a plurality of antenna units integrated on the display module. The display module includes a first substrate and a second substrate opposite to each other and a liquid crystal layer between the first substrate and the second substrate; each antenna unit includes a first radiation portion and a first reference electrode opposite to each other; the first radiation portion is on a light outgoing side of the display module; and the first substrate includes a first base substrate and a driving layer on a side of the first base substrate close to the liquid crystal layer; and the driving layer is also used as the first reference electrode of each antenna unit.

Abstract: A display device and a backlight control method of the display device are provided. When a duration of an image occlusion period is shorter than a preset duration, a backlight driving circuit is controlled to respectively provide a first pulse current and a second pulse current in a first light emitting period and a second light emitting period in each frame period, so as to drive a backlight unit to provide a first backlight and a second backlight. Here, the first pulse current is greater than the second pulse current.

Abstract: The present invention relates to a cholesteric liquid crystal display device, and a control method. The cholesteric liquid crystal display device includes a cholesteric liquid crystal display module, a solar battery unit, and a control unit. The control unit further includes an ambient energy management module and an energy storage module. The solar battery unit provides electrical energy to the management module. And the ambient energy management module stores electrical energy in the energy storage module. When it is necessary to refresh the images of the cholesteric liquid crystal display module, and the potential difference of the energy storage module reaches the charging cut-off voltage. The energy storage module can discharge the stored electrical energy to provide the electrical energy required by the cholesteric liquid crystal display module to refresh the image.

Abstract: A controller of an in-cell type liquid crystal display device is provided. The controller controls first and second electrodes that intersect each other, supplies a pixel driving voltage to the first electrodes during a pixel driving period, and detects a stylus position using the first and second electrodes during a stylus detection period different from the pixel driving period. The controller transmits, using the second electrodes, a command requesting a transmission of a downlink signal to the stylus. The controller detects, using the first and second electrodes, the downlink signal transmitted from the stylus in response to the command, and detects the stylus position based on the detected downlink signal.

Abstract: Techniques and systems for enhanced detection and correlation of transient anomalies in frames or graphics displayed on a display screen, such as flicker events. In one example, a method includes obtaining luminosity measurements of a display acquired over a series of frames depicted on the display, processing the luminosity measurements to form a luminosity signature for the series of frames, and detecting transient anomalies for the display based at least on the luminosity signature.

Abstract: It is possible to reduce a size of a lower frame region to ensure a wiring corrosion margin equivalent to that of a conventional technique. In a display device, a video signal wiring arranged in the lower frame region includes, in a region between a terminal section (terminal) and a video signal line, a first wiring formed on a first wiring layer and having one end connected to the terminal section to which a video signal line driving circuit is connected, a second wiring formed on a second wiring layer different from the first wiring layer and having one end connected to the other end of the first wiring, and a third wiring formed on the first wiring layer and having one end connected to the other end of the second wiring. The other end of the third wiring is connected to the video signal line via a fourth wiring formed on the second wiring layer, and the first wiring layer is formed on the side closer to an array substrate than to the second wiring layer.

Abstract: A method for driving a pixel array, a device, and a display panel are provided. The data lines electrically connected to the sub-pixels are electrically connected with data signal terminals through switch modules, respectively. The switch modules receive selection control signals to switch connection states of the data lines with the data signal terminals. The method includes: applying gate signals to a gate line corresponding to the first row of sub-pixels and a gate line corresponding to the second row of sub-pixels, respectively; and during a period of applying the gate signals to the second row of sub-pixels to control the second row of sub-pixels, after a first duration length of the gate signals applied to the first row of sub-pixels being switched from the on-state to the off-state, a selection control signal corresponding to the second row of sub-pixels controlling the switch modules to switch the connection states.

Abstract: A display device includes a first display area including a plurality of first pixel areas, a second display area including a plurality of second pixel areas and a plurality of transmission areas, a plurality of pixels arranged in a matrix form in the first and second display areas, and a first signal line and a second signal line disposed to correspond to each pixel column in the plurality of pixels. In each pixel column, one of the first and second signal lines may extend over the first and second display areas, and a remaining one of the first and second signal lines may not be disposed in the second display area.

Abstract: A scan circuit is provided. The scan circuit includes a plurality of stages. A respective stage of the scan circuit includes a respective scan unit configured to provide a control signal to one or more rows of subpixels. A respective scan unit includes a first subcircuit, a second subcircuit, a third subcircuit, a fourth subcircuit. A pull-up node is coupled to the second subcircuit, the third subcircuit, and the fourth subcircuit. A pull-down node is coupled to the second subcircuit, the third subcircuit. The denoising subcircuit is coupled to a pull-up node and the input terminal, or coupled between a third power supply voltage terminal and the pull-down control node.

Abstract: An electronic device may include a display module for displaying image data, and a processor operatively connected to the display module to provide the image data to the display module, and the display module may include a display panel including a plurality of pixel lines including a plurality of pixels, and a display driving circuit for driving a plurality of pixels of the display panel. Various other embodiments are possible.

Abstract: The disclosure discloses an image display method, an image display device and a display system. The method includes: according to a image to be displayed, determining a maximum brightness value of pixel points in a panel partition to obtain a backlight brightness value corresponding to a backlight partition; acquiring a light diffusion curve of the backlight of the backlight partition incident on the panel partition corresponding to the backlight partition; calculating a compensation ratio of a target pixel to the light diffusion curve, the compensation ratio is a ratio of the maximum brightness value to an actual brightness value; calculating a pixel compensation value of the target pixel according to the image to be displayed and the compensation ratio; adjusting a pixel value of the target pixel point according to the pixel compensation value.

Abstract: A positive electrode layer for an all-solid-state battery, includes a first phase including a positive electrode active material containing Li, a second phase including a garnet-type solid electrolyte containing Li, Bi, M2, and O, and a third phase different from the first phase and the second phase. The third phase includes a Li—Bi-M2-O-based compound containing Li, Bi, M2, and O, and M2 is at least one element selected from the group consisting of Ca, Sr, Ba, Mg, Y, and Rb.

Abstract: Disclosed are a dimmable panel (001) and a display device. The dimmable panel includes a first substrate (101) and a second substrate (102) that are arranged opposite each other; a first electrode (103) and a second electrode (104) that are insulated from each other and located between the first substrate (101) and the second substrate (102), where the first electrode (103) and the second electrode (104) are located in a dimmable area (AA), at least one of the first electrode (103) and the second electrode (104) includes a plurality of strip-shaped electrodes, extension trends of all the strip-shaped electrodes are approximately the same, and orthographic projections of the strip-shaped electrodes on the first substrate (101) do not overlap each other; and a liquid crystal layer (105) located between the first substrate (101) and the second substrate (102), where the liquid crystal layer (105) is located in the dimmable area (AA).

Abstract: A timing controller circuit is arranged to control at least a gate in panel (GIP) circuit in a display panel, and includes a data receiving circuit, a timing detection circuit, a control circuit, and a data transmitting circuit, wherein the data receiving circuit is arranged to receive an image data, the timing detection circuit is coupled to the data receiving circuit, and is arranged to detect an input timing of the image data, the control circuit is coupled to the timing detection circuit, and is arranged to determine a GIP timing of the GIP circuit according to the input timing of the image data, and generate a timing control output according to the GIP timing, and the data transmitting circuit is coupled to the control circuit, and is arranged to transmit the timing control output to the GIP circuit.

Abstract: Provided is a display device including a display panel and a plurality of photoelectric sensor assemblies. The display panel includes a display region, a first region disposed outside the display region and extending along a first direction, and a second region disposed outside the display region and extending along a second direction, wherein the first direction is intersected with the second direction. Each of the photoelectric sensor assemblies is provided with a strip-shaped photosensitive region. One portion of the plurality of photoelectric sensor assemblies are disposed in the first region, the other portion of the photoelectric sensor assemblies are disposed in the second region. Each of the photoelectric sensor assemblies is configured to receive an optical signal reflected via eyes of a user and convert the optical signal into an electric signal.

Abstract: A tiling device with a driving method having a low number of data pins is provided. The tiling device includes a first substrate, a second substrate and a data driving circuit. The first substrate includes a plurality of first semiconductor units. The second substrate includes a plurality of second semiconductor units. The data driving circuit simultaneously provides first data signals to the plurality of first semiconductor units and the plurality of second semiconductor units, and simultaneously provides second data signals to the plurality of first semiconductor units and the plurality of second semiconductor units.

Abstract: A securement arm for an optical device includes a first portion having a first electronic component, the first portion connected to a viewing frame of the optical device. The securement arm also includes a second portion having a second electronic component coupled to the first portion by a spring element. The spring element can include a plastic deformation element and an elastic element. The securement arm also includes an electrical connector extending through the spring element and electrically connecting the first electronic component and the second electronic component.

Abstract: An embodiment of the present application discloses a display panel including an array substrate including a common wiring. The common wiring includes a first wiring, the first wiring is disposed in a redundancy pixel region. An opposite substrate includes a common electrode layer disposed in a display region and a redundancy pixel region. Along a thickness direction of the display panel, the first wiring overlaps the common electrode layer. When the display panel is in a display state, an absolute value of a difference between a voltage inputted to the first wiring and a voltage inputted to the common electrode layer ranges from 0 to 1 volt.

Abstract: A gate driving circuit includes a capacitor connected between a first gate of a pull-down transistor and a control node, and a control transistor connected between the control node and a ground terminal and having a gate connected to the ground terminal.

Abstract: A pixel circuit includes a first and a second subpixel circuits. The first subpixel circuit includes a first and a second light emitters, and a first setter that sets the first and second light emitters to an emissive or a non-emissive state. The second subpixel circuit includes a third and a fourth light emitters, and a second setter that functions in the same manner as the first setter. The pixel circuit is in at least one of a connection different or an emitter number different state. In the connection different state, a connection between the first and second light emitters is a series or a parallel connection and a connection between the third and fourth light emitters is the other connections. In the emitter number different state, the first and second light emitters are emissive wholly or selectively and the third and fourth light emitter is in the opposite manner.

Abstract: A pixel driving circuit in each of the pixels includes: a first switching circuit that turned on in response to the (n-2) th scan signal to provide a V1 voltage to a first node, provide a V3 voltage to a third node, and provide a V2 voltage to an anode of the light-emitting element; a second switching circuit turned on in response to the nth scan signal to electrically connect the first node to a second node, provide a V5 voltage to the third node, and provide a data voltage to a fourth node; and an emission control circuit turned on in response to the nth emission signal to electrically connect a second node to the anode and provide a reference voltage to the fourth node.

Abstract: A display controller, a display device, a display system, and a control method are provided. The display controller includes: a flag-signal circuit configured to send a flag-signal to an application processor; an image processing circuit configured to obtain second current image data in response to receiving first current image data from the application processor, wherein the first current image data is sent by the application processor in response to receiving the flag-signal sent from the flag-signal circuit; and a drive circuit configured to generate a first drive control signal in response to receiving the second current image data from the image processing circuit.

Abstract: A display device includes a first display substrate, a second display substrate, display units, a dummy display unit, and a sealing element. The first display substrate includes a first base substrate including display, peripheral and intermediate areas, and a pixel circuit overlapping with the display area. The second display substrate includes a second base substrate spaced apart from the first base substrate. The display units overlap with the display area, between the first and second base substrates. Each of the display units includes a liquid crystal layer, a common electrode, and a pixel electrode connected to the pixel circuit. The dummy display unit overlaps with the intermediate area, between the first and second base substrates, and includes first and second dummy electrodes.

Abstract: There is provided a display substrate having a display region, and a peripheral region surrounding the display region, and including: a base substrate; first conductive structures in the display region and the peripheral region; the first conductive structures each extend in a first direction and are arranged side by side in a second direction; an interlayer insulation layer on a side of the first conductive structures away from the base substrate; second conductive structures on a side of the interlayer insulation layer away from the base substrate; the second conductive structures each extend in the second direction and are arranged side by side in the first direction; the second conductive structures intersect with the first conductive structures, and are electrically connected with the first conductive structures through vias in the interlayer insulation layer; and at least one third conductive structure in the display region. A display apparatus is provided.

Abstract: A display apparatus in one example can include a plurality of light emitting diodes, and a plurality of driving devices to output driving signals for driving the plurality of light emitting diodes. Each of the plurality of driving devices bypasses input common command data and outputs the common command data to an adjacent driving device. Accordingly, a transmission period of data transmitted to the plurality of driving devices can be reduced.

Abstract: A multiplexed display panel and device and a driving method for the multiplexed display panel are provided. At the moment when a switching switch is turned on, a potential of a fanout line corresponding to a data line connected to sub-pixels, into which an data signal is input, is adjusted to the same level as a potential of the data line as much as possible, and a potential difference between each fanout line and the corresponding data line is relatively small at the moment when the switching switch is turned on, so that an instantaneous current at this moment is greatly reduced without causing relatively large jump of the potential of the data line, a common electrode and back-plated indium tin oxide (ITO) greatly fluctuate, and then the surface noise generated by the display panel is turned on is greatly reduced.

Abstract: A method including rendering graphics for an application using graphics processing units (GPUs). The method including dividing responsibility for processing pieces of geometry of an image frame during an analysis pre-pass phase of rendering between the plurality of GPUs, wherein each of the pieces of geometry is assigned to a corresponding GPU. The method including determining in the analysis pre-pass phase overlap of each of the pieces of geometry with each screen regions. The method including generating information at the GPUs regarding the pieces of geometry and their relations to the screen regions based on the overlap of each of the pieces of geometry with each of the screen regions. The method including assigning the screen regions to the GPUs based on the information for purposes of rendering the pieces of geometry during a subsequent phase of rendering.

Abstract: A display device and a driving method thereof are provided. In the display device, a display panel has multiple first pixel rows and multiple second pixel rows arranged alternately. In a first time interval, a first gate driver sequentially drives the first pixel rows using a first driving method. In a second time interval, a second gate driver sequentially drives the second pixel rows using the first driving method. In a third time interval, a third gate driver sequentially drives the first pixel rows using a second driving method. In a fourth time interval, a fourth gate driver sequentially drives the second pixel rows using the second driving method. One of the first driving method and the second driving method is a pulse amplitude modulation driving method, and the other of the first driving method and the second driving method is a pulse width modulation driving method.

Abstract: A driving circuit board includes a driving circuit board includes: a plurality of driving electrode regions on a surface of the driving circuit board; a plurality of driving electrodes symmetrically arranged on the plurality of driving electrode regions; and a driving circuit electrically connected to at least one of the plurality of driving electrodes, wherein the plurality of driving electrodes include at least one dummy electrode that is not connected to the driving circuit.

Abstract: Disclosed are a pixel driving circuit, a display panel and a control method thereof. The pixel driving circuit includes a signal generating module, an input terminal of the signal generating module is connected to a scan line, and the signal generating module is configured to generate a second scan signal according to a first scan signal, and the second scan signal is output from a first output terminal; and, a light-emitting driving module, a first controlled terminal, a second controlled terminal, a third controlled terminal of the light-emitting driving module are connected to the first output terminal of the signal generating module in one-to-one correspondence.

Abstract: An image display method is provided. The method includes: in response to receiving an Nth frame synchronization signal, acquiring an (N+1)th frame image to be displayed and pixel data of pixels in the (N+1)th frame image to be displayed (S12); calculating backlight brightness data of a display screen according to the pixel data by a backlight algorithm (S14); in response to receiving an (N+1)th frame synchronization signal, synchronously sending the (N+1)th frame image to be displayed and the backlight brightness data to the display screen and a backlight driving board respectively (S16). In addition, the present application further discloses an image processing apparatus, an electronic device and a storage medium.

Abstract: A viewing angle control film and a display device comprising the same are discussed. The viewing angle control film can include a first electrode, a second electrode facing away from the first electrode, a light conversion layer disposed between the first electrode and the second electrode, and a controller configured to adjust a viewing angle of the light conversion layer by controlling a voltage applied between the first electrode and the second electrode. The light conversion layer can include a plurality of partition walls disposed to be spaced apart between the first electrode and the second electrode, a plurality of containing portions disposed between the partition walls and arranged at regular intervals along the first electrode, and light blocking particles provided in each of the plurality of containing portions. The controller applies a pulse voltage in a share mode that operates in a wide viewing angle.

Abstract: A display apparatus includes: a substrate including a display area, and a peripheral area; and a pad unit at the peripheral area, the pad unit including: a first conductive layer; a second conductive layer on the first conductive layer, and having a first opening; a third conductive layer on the second conductive layer, and having a second opening overlapping with the first opening, the second opening having an area less than an area of the first opening at a top surface of the second conductive layer; an organic protective layer filling the first opening, and having a third opening overlapping with the second opening; and an additional metal layer covering a top surface of the first conductive layer exposed through the first opening, an inner surface of the second opening, an inner surface of the third opening, and a portion of a top surface of the third conductive layer.

Abstract: Optical sample characterization facilitates measurement and testing at any angle in a full range of angles of light propagation through an optical sample, such as a coated glass plate, having a higher than air index of refraction. A rotatable assembly includes a cylinder having a hollow, and a receptacle including the hollow. The receptacle also contains a fluid with a known refractive index. An optical light beam is input normal to the surface of the cylinder, travels through the cylinder, then via the fluid, to the optical sample, where light beam is transmitted and/or reflected, then exits the cylinder and is collected for analysis. Due at least in part to the fluid surrounding the optical sample, the optical sample can be rotated through a full range of angles (±90°, etc.) for full range testing of the optical sample.

Abstract: Aspects described herein may allow for a payment card having enhanced edge patterns. The payment card may include a complex edge morphology on the physical card that may make the payment card more likely to be used by consumers and makes the payment card stand out due to the enhanced edge design. The edge of the payment card may be reeded, crenelated, or may include various shapes of various sizes on one or more of the edge walls extending around the payment card. The edge of the payment card may also include dimples, chips, and/or other complex design patterns cut into the face of the payment card close to the edge. The payment card may also include inclusions of other materials, such as metals, ceramic, and/or polymer to be added which fill or partially fill any voids produced by the edge patterns.

Abstract: An array substrate includes a substrate, a plurality of first signal lines, a plurality of traces, a plurality of second signal lines, and a plurality of switching elements. The first signal lines are disposed on the substrate along a first direction. The traces are disposed on the substrate along a second direction different from the first direction, and one trace is electrically connected to one first signal line and crosses another one first signal line. The second signal lines are disposed on the substrate along the second direction, the second signal lines cross the first signal lines, and the traces and the second signal lines are formed of different conductive layers. The switching elements are disposed on the substrate, and one of the switching elements is electrically connected to a corresponding one first signal line and a corresponding one second signal line.

Abstract: A method of driving a light emitting diode (LED) backlight unit, which includes a plurality of LED elements that are connected to a plurality of gate lines and a plurality of source lines, includes generating a plurality of gate signals applied to the plurality of gate lines. While the plurality of gate signals are generated, a non-overlap interval between activation intervals of two adjacent gate signals is generated. All of the plurality of gate signals are deactivated during the non-overlap interval. A plurality of source signals applied to the plurality of source lines are generated. While the plurality of source signals are generated, a high-impedance (Hi-Z) interval included in the non-overlap interval is generated. At least some of the plurality of source signals have a high-impedance state during the high-impedance interval.

Abstract: The present disclosure discloses a precharge circuit capable of compensating for a resistance deviation between channels so that sense lines of a display panel can be uniformly charged and a source driver including the same. The precharge circuit may include a voltage terminal configured to provide a reference voltage, a common line connected to the voltage terminal, and channel lines connected to the common line and configured to transfer, to respective sense lines of a display panel, the reference voltage transferred through the common line.

Abstract: A head mounted display device including a host, two brackets, and two rotating components is provided. The two brackets are respectively pivotally connected to opposite sides of the host. Each bracket includes a first segment and a second segment. The first segment is pivotally connected to the second segment, and the first segment is pivotally connected to the host. The two rotating components are respectively assembled to the first segment and the second segment of each bracket to control an angle between the first segment and the second segment.

Abstract: A drive circuit, a display device, and a debugging method. The drive circuit is coupled to a display panel, the display panel includes a plurality of display regions, and the drive circuit includes a plurality of compensation sub-circuits. The plurality of compensation sub-circuits are coupled to the plurality of display regions in a one-to-one corresponding manner through traces, and each of the compensation sub-circuits is configured to output a voltage determined based on a wire resistance of the trace to the corresponding display region through the traces. The display panel is configured as a plurality of display regions, and each display region is coupled to one drive circuit through one single trace, such that the compensation sub-circuits can apply different voltages to the display regions, and the voltages are determined based on wire resistances of the traces.