Abstract: A solid-state image pickup device includes a pixel array section including a plurality of unit pixels, a reference signal production section configured to generate a reference signal and output a detection value, a comparison section configured to compare a reset level upon resetting, a counter configured to start a counting action and continue the counting action to measure a comparison time period in order to obtain count values corresponding to the reset level and the signal level, a detection section configured to retain a result of the comparison of said comparison section when the reset level reaches the detection value as a result of the detection of a black sun phenomenon for a fixed period of time, and a prevention section configured to prevent a black sun phenomenon based on a result of the detection of said detection section.

Abstract: An image sensor includes a photoelectric converter formed in a semiconductor substrate to generate and integrate charges resulting from incident light, a first charge transmitter transmitting integrated charges to a charge detector, an overflow drain region discharging excess charges generated by the photoelectric converter, and a second charge transmitter transmitting the excess charges to the overflow drain region and having a width which is at least half of a span of the photoelectric converter.

Abstract: An image sensor includes a pixel having a protection circuit connected to a charge multiplying photoconversion layer. The protection circuit prevents the pixel circuit from breaking down when the voltage in the pixel circuit reaches the operating voltage applied to the charge multiplying photoconversion layer in response to the image sensor being exposed to a strong light. The protection circuit causes additional voltage entering the pixel circuit from the charge multiplying photoconversion layer over a predetermined threshold voltage level to be dissipated from the storage node and any downstream components.

Abstract: An image sensor includes a substrate having a plurality of photosensitive sites for capturing an image and a plurality of additional photosensitive sites adjacent the image capturing photosensitive sites in which there is no image capture; and a digital signal embedded in one or more of the additional photosensitive sites for the purpose of identification.

Abstract: An image sensor includes a plurality of pixels for converting incident photons into electrical charge; an overflow drain to draw off excess charge from at one or more of the pixels; a mechanism for summing charge from two or more of the pixels; a first network of resistive devices generating a first overflow drain voltage where at least one of the resistive devices has, in parallel, a fuse that can be opened in response to an external stimulus to provide the optimum overflow drain voltage for pixel anti-blooming protection and saturation signal level for when a plurality of pixels are summed together; and a second network of resistive devices connected to the first network of resistive devices generating a second overflow drain voltage where the second overflow drain voltage is a fraction of the first overflow drain voltage and the second overflow drain voltage provides the optimum overflow drain voltage for pixel anti-blooming and saturation signal level for when none or substantially none of the plurality o

Abstract: An image sensor includes a substrate; a plurality of pixels on the substrate, one or more of the pixels comprises (i) first and second charge-storage regions having at least one photosensitive area; (ii) a lateral overflow drain; (iii) a first lateral overflow gate adjacent the first charge-storage regions that passes substantially all charges from the first charge-storage region to the lateral overflow drain; and (iv) a second lateral gate adjacent the second charge-storage region that passes excess photo-generated charge into the lateral overflow drain for blooming control.

Abstract: The invention proposes an image sensor comprising a picture capture matrix having N rows and K columns of image dots, a read register at the free end of the K columns. In order to improve the read speed of the matrix, the invention proposes that the horizontal transfer into the read register be continued even while the vertical signals for shifting from one row to the other are operative, without however continuing the horizontal transfer while the transfer gate between columns and horizontal register is open. The unloading time of the horizontal read register therefore overlaps the time reserved for each vertical transfer step, instead of these times being added together. The gain in time, being repeated for each row, will be all the more significant the higher the number of rows. Means are provided for limiting the effect of the column transfer switching operations on the reading of the charges at the output of the read register.

Abstract: An object of this invention is to quickly complete white balance calculation in photographing. To achieve this object, an image sensing apparatus includes an image sensing element in which a line on which first and second color filters are arranged and a line on which first and third color filters are arranged are alternately arrayed on pixels, an image sensing controller which forms an image of one frame by n fields (n is an odd number), and reads out pixel data of the image sensing element so as to contain all color components in each 1-field period, a white balance calculation device which performs process on the basis of image data read out from the image sensing element by the image sensing controller, and starts the process before read of one frame from the image sensing element is completed by the image sensing controller.

Abstract: A solid-state image pickup apparatus includes a solid-state image sensor having photosensitive cells and vertical transfer paths. The cells are bidimensionally arranged for converting light incident from a subject via optics to electric charges corresponding to the light to store signal charges. The vertical transfer paths each adjoins the photosensitive cells arranged on a particular column for vertically transferring the signal charges. Before the signal charges are transferred from the cells to the vertical transfer paths, a sweep controller causes unnecessary charges on the vertical transfer paths to be swept out. The sweep controller controls a sweep transfer period necessary for the sweep transfer in dependence upon the amount of the unnecessary charges.

Abstract: A solid-state image-taking system including a gate voltage control unit 31 and a substrate voltage control unit 32, for preventing generation of a defective image such as a residual image, without increasing the read voltage. The gate voltage control unit 31 applies the read voltage to the gate electrode 17 during the read period. The substrate voltage control unit 32 applies a stationary reverse bias voltage steadily to the semiconductor substrate 11 to cause electric charge excessively stored in the light-to-electric conversion unit 14 to overflow to a side of the semiconductor substrate 11, and not to the charge storage unit 13, and applies, during part or all of the read period, a specific reverse bias voltage that raises a potential barrier between the semiconductor substrate 11 and the well 12 to be higher than a height thereof when the stationary reverse bias voltage is applied.

Abstract: An image sensor includes a pixel having a protection circuit connected to a charge multiplying photoconversion layer. The protection circuit prevents the pixel circuit from breaking down when the voltage in the pixel circuit reaches the operating voltage applied to the charge multiplying photoconversion layer in response to the image sensor being exposed to a strong light. The protection circuit causes additional voltage entering the pixel circuit from the charge multiplying photoconversion layer over a predetermined threshold voltage level to be dissipated from the storage node and any downstream components.

Abstract: In a linear image sensor, a shutter structure includes: a shutter gate electrode provided between photodiode arrays; and a shutter drain provided below the shutter gate electrode. With this construction, a layout area is reduced and the number of scanning operations performed in the auxiliary scanning direction necessary to obtain image data for one line is reduced. As a result, the capacity of a memory used is reduced and the influence of color drift is suppressed.

Abstract: An imaging device comprising: a photoelectric conversion element generating photo-generated charges; an accumulation well accumulating the charges; a modulation well storing the charges; a modulation transistor having a channel threshold voltage controlled by the stored charges and outputting a corresponding signal; a transfer control element having a control end coupled to a control end of the modulation transistor and controlling the potential barrier of a transfer channel between the accumulation and modulation wells, and controlling transfer of the charges; an unwanted electric charge discharging control element controlling the potential barrier of an unwanted electric charge discharging channel coupled to the accumulation well, and discharging charges overflowing from the accumulation well during a period except for the charges transfer period; and a residual charge discharging control element controlling the potential barrier of a residual electric charge discharging channel coupled to the modulation we

Abstract: A pixel circuit, and a method for operating a pixel circuit, to provide a multiple knee response characteristic. In one embodiment of the invention, one or more feed-through pulse (FTP) signals are transmitted to an integration node to end a first linear integration time period. The FTP signal allows electrons to drain from the integration node to a reset node through a transfer gate. After the first integration period, a second linear integration period is conducted on the pixel circuit, where the photo conversion gain of the pixel circuit becomes reduced under higher illumination conditions due to the drained node. Such operation creates a pixel with a photo response having multiple “knee” points, where each “knee” in the photo response curve will create separate regions whose photo sensitivities can be independently controlled with minimal thermal interference.

Abstract: The solid state image pickup device includes a pixel, the pixel including: a photoelectric conversion region for generating carrier by photoelectric conversion and accumulating the carrier; a carrier holding region for accumulating carrier flowing out from the photoelectric conversion region during the photoelectric conversion region generates and accumulates carrier; a source follower amplifier SF-MOS for amplifying carrier; a transfer MOS transistor Tx-MOS for transferring the carrier accumulated in the photoelectric conversion region to the source follower amplifier SF-MOS; and a transfer MOS transistor Ty-MOS for transferring the carrier accumulated in the carrier holding region to the source follower amplifier SF-MOS. The carrier holding region is formed so as to have a trench structure.

Abstract: An operating condition judging circuit judges a supply voltage level of a power supply source. A controller controls a frequency of sweep-out of unnecessary charge in the imaging element based on an output level of the power supply source for reducing peak consumed current and power consumption and thereby extending battery life.

Abstract: A solid-state imaging device comprising: a photoelectric conversion element generating photo-generated charges; an accumulation well accumulating the charges; a modulation well holding the charges from the accumulation well; a modulation transistor controlled by the charges held in the modulation well and that outputs a signal corresponding to the charges; a transfer control element changing the potential barrier of a transfer channel between the accumulation and modulation wells to control transfer of the charges; an unwanted charges discharging control element controlling the potential barrier of an unwanted charges discharging channel coupled to the accumulation well, and discharging charges that overflow from the accumulation well during a period other than the transfer period when the photo-generated charges are transferred; and a residual charges discharging control element controlling the potential barrier of a residual charges discharging channel coupled to the modulation well, and discharging residua

Abstract: A method for controlling the exposure of an active pixel array electronic still camera includes the steps of: integrating photocurrent in each pixel during an integration time period; collecting overflow charge from all pixels in the array during the integration time period; developing an overflow signal as a function of the overflow charge; and terminating the integration time period when the overflow signal exceeds a preset threshold level selected to represent a desired reference exposure level.

Abstract: There is provided a solid-state image sensor including (a) a plurality of first charge transfer sections each for vertically transferring electric charges, formed on a surface of a semiconductor layer, (b) a second charge transfer section for horizontally transferring electric charges, formed adjacent to one ends of the first charge transfer sections, the second charge transfer section including a charge barrier region and a charge accumulating region, (c) a first potential barrier section located adjacent to the second charge transfer section, (d) an excessive charge exhausting section located adjacent to the first potential barrier section, and (e) a plurality of second potential barrier sections located in the first potential barrier section, the second potential barrier section being spaced away from adjacent ones. The solid-state image sensor makes it possible to prevent signal charges from leaking into the excessive charge exhausting section, which ensures enhancement in a charge transfer efficiency.

Abstract: A structure for a fast-dump gate for charge coupled devices that does not require a separate contact to a drain region instead using the existing drain of a lateral overflow drain (LOD) typically used for antiblooming purposes. LOD structures are typically used on full-frame CCD image sensors. By using the LOD as the drain for a fast-dump gate, a separate opening in the gate electrode for the drain contact is avoided, thereby making the structure more compact. Gate control is provided by etching a hole in the CCD gate electrode over the overflow channel region of the LOD structure, and overlaying this with one of the subsequent gate electrode layers. This subsequent gate electrode is then used to control the fast-dump operation. Timing is shown for a two-phase CCD being operated with accumulation-mode clocking. Other types of CCDs and clocking schemes may be used.

Abstract: An object is imaged continuously during a first exposure time and a second exposure time shorter than the first exposure time. Weights, one of which decreases monotonously and the other of which increases monotonously, are applied to first and second resultant image signals under the condition that the sum of the weights is 1. The first and second image signals that have been weighted are added up, thus producing a synthetic picture signal. When a luminance level is low, the ratio of the first image signal, which has been produced during the longer exposure time, to the second image signal is increased. This results in an image demonstrating a high signal-to-noise ratio. When the luminance level is high, the ratio of the second image signal, which has been produced during the shorter exposure time, to the first image signal is increased.

Abstract: A method and apparatus for applying a selective shutter to an imaging device. An image is received via a CCD unit and a portion of the received image that presents an overflow condition is determined. The amount of time light from the portion of the image presenting an overflow condition is received is selectively reduced so as to eliminate the overflow condition. The CCD unit comprises a plurality of individual imaging elements which receive light from the image for a time period corresponding to a predetermined duty cycle. Individual imaging elements corresponding to the portion of the received image that presents the overflow condition are connected to a current drain for a determined amount of time during the duty cycle, and this reduces the amount of time the determined portion of the image receives light.

Abstract: When the reset gate electrode of the charge detecting section is driven with the reset pulse of three levels, it is difficult to realize the timing control when high speed operation is required. In the charge detecting section of the CCD solid-state image sensing apparatus having wide dynamic range, two reset gate electrodes, for example, are arranged in vertical between the FD area and RD area, and different reset pulses &phgr;RG1, &phgr;RG2 are applied to these reset gate electrodes to realize the reset operation, clipping operation and adding operation through the driving by the 2-level pulse.

Abstract: A source region and drain region are formed in a surface region of a first semiconductor region. Moreover, a second semiconductor region connected to the drain region is formed in the surface region of the first semiconductor region. A third semiconductor region is formed in the first semiconductor region under the second semiconductor region, connected to the second semiconductor region, and accumulates signal charges in accordance with an incident light. A fourth semiconductor region is formed in the surface region of the first semiconductor region between the drain region and source region. Moreover, these source region, drain region, second semiconductor region, and third semiconductor region constitute a pixel, and different voltages are supplied to the drain region in an accumulation period of the signal charges in the pixel, signal readout period, and discharge period of the signal charges.

Abstract: In a CCD imaging device in which sensor sections have the vertical overflow drain (OFD) structure, a substrate bias control signal is applied to the base of a bipolar transistor via a resistor to turn on the transistor at least during a signal charge readout period. As a result, the base potential of a bipolar transistor that constitutes a clamping circuit is lowered, whereby a substrate bias that is output from a substrate bias generation circuit is lowered. Thus, the potential of an overflow barrier in the sensor sections is reduced.

Abstract: A charge transfer device and a method of driving the charge transfer device are arranged to enable electric charge to be correctly transferred in a short time after starting. An initialization voltage is applied at the time of starting and a portion having a higher impurity concentration is formed below a channel.

Abstract: A storage pixel sensor disposed on a semiconductor substrate comprises a photosensor. At least one nonlinear capacitive element is coupled to the photosensor. At least one nonlinear capacitive element is arranged to have a compressive photocharge-to-voltage gain function. An amplifier has an input coupled to the nonlinear capacitor and an output. Other, non-capacitive elements may be employed to produce a compressive photo-charge-to-voltage gain having at least one breakpoint.

Abstract: A solid-state image sensing device having: a plurality of sensing means arrayed in the form of a matrix; a charge accumulation means that is connected to the sensing means and accumulates a charge generated at the sensing means; an accumulable charge adjusting means that adjusts the amount of accumulable charge of the charge accumulation means; and a control means that controls the accumulable charge adjusting means. The control means controls the amount of accumulable charge to vary continuously or discontinuously in time series within one imaging period and within a given amount of accumulable charge of the control means.

Abstract: An extended dynamic range imager. An array of pixels provides an output signal for each pixel related to an amount of light captured for each pixel during an integration period. A row of extended dynamic range (XDR) sample and hold circuits having an XDR sample and hold circuit for each column of the array captures an XDR signal related to a difference between the output signal and an XDR clamp level to which the pixel is reset at a predetermined time before the end of the integration period. A row of linear sample and hold circuits having a linear sample and hold circuit for each column of the array captures a linear signal related to a difference between the output signal and an initial output signal to which the pixel is reset at the beginning of the integration period.

Abstract: A solid-state image device comprises a plurality of photoelectric converters arranged on a semiconductor substrate; a plurality of vertical charge coupled devices (CCDs) that receive signal charges from the photoelectric converters and transfer the signal charges; a horizontal CCD that receives the signal charges transferred by the vertical CCDs and transfers the signal charges in the direction crossing the vertical CCDs; and a signal output circuit that receives the signal charge transferred by the horizontal CCD and outputs the signal voltage corresponding to the signal charge. The vertical CCD has a normal mode for transferring the signal charges synchronizing with the horizontal CCD and a high-speed mode for transferring the signal charges quickly without synchronizing with the horizontal CCD. A potential barrier region and a charge drain region are formed along the side of the horizontal CCD opposite to the connection side with the vertical CCDs.

Abstract: A solid-state image sensing device includes photoelectric conversion portions, vertical charge transfer portions, a horizontal charge transfer portion, an unwanted charge removing portion, and a potential barrier portion. The photoelectric conversion portions are arranged on an n-type semiconductor substrate. The vertical charge transfer portions are respectively arranged adjacent to the photoelectric conversion portions, and have a first p-type well layer and a first n-type semiconductor region. The horizontal charge transfer portion is arranged adjacent to one end side of the vertical charge transfer portions, and has a second p-type well layer and a second n-type semiconductor region. The unwanted charge removing portion is arranged adjacent to the horizontal charge transfer portion to remove an unwanted charge overflowing from the horizontal charge transfer portion. The unwanted charge removing portion has a third p-type well layer and a third n-type semiconductor region.

Abstract: A charge transfer device and a method of driving the charge transfer device are arranged to enable electric charge to be correctly transferred in a short time after starting. An initialization voltage is applied at the time of starting and a portion having a higher impurity concentration is formed below a channel.

Abstract: The dynamic range of an imaging system that utilizes an array of active pixel sensor cells is substantially increased by reading each cell in the array multiple times during each integration period. Each time a cell is read, the number of photons collected by the cell is saved and the cell is reset if the cell would normally saturate by the end of the integration period. At the end of the integration period, the number of photons collected by each cell is defined by the sum of the values collected during the integration period.

Abstract: This invention relates to auto variable anti-blooming bias circuits which can automatically vary the anti-blooming bias of the CCD image sensors according to the intensity of light incident thereon. The circuits comprise a DC voltage generation part for receiving signals fed-back from the output terminal of the CCD image sensor and generating DC voltage by averaging the applied signals, an input voltage generation part for receiving DC voltage transmitted from the DC voltage generation part and generating variable input voltage according to the received DC voltage, and an anti-blooming bias generation part for receiving the variable input voltage transmitted from the input voltage generation part and reference voltage and transmitting to the input, terminal of the CCD image sensor as an anti-blooming bias after comparing the two signals.

Abstract: A solid state image sensor architecture that utilizes drain structures at one or more locations on a shift register, as set by the design, allowing the user to select which charge packets are needed to represent the image and draining the remaining packets. Since the used packets are drained, there is no need to provide clock cycles to output charge packets that are not used while in the low resolution mode. Clocking can be stopped after the needed number of cycles without leaving charge packets in the shift register without the possibility of corrupting subsequent image information by charge packets that have not been removed. Additionally, the reduction in clock cycles decreases the time required to process the current information, and allows the system to operate at higher speeds.

Abstract: A semiconductor device and a method of inspecting the same are described. The semiconductor device does not need voltage adjustment of an external driver circuit, since it contains a voltage generator to inspect and memorize the best value of voltage by controlling from outside. The voltage generator has a plurality of capacitors whose electrodes of one side are connected to a common node, a potential changing circuit to change the potential to which the other electrodes of these capacitors are connected respectively, and a buffer amplifier whose input power is the voltage generated in the common node. The output power of the buffer amplifier is connected to a semiconductor integrated circuit. The potential changing circuit is provided to change the potential to which the electrode of each capacitor is connected to a source potential or to a ground potential depending on the connection of the fuse connected between the source and each of the capacitors.

Abstract: In charge-coupled imaging devices it is generally necessary to provide zones (12) in the matrix with a contact. These zones may form part, for example, of a mechanism for draining charge, for example as a protection against overexposure. In the case of imaging devices with a horizontal readout register on one side of the matrix, these contacts can be provided on the opposite side. However, it is often desirable or even necessary, as in the case of imaging devices with four-quadrant readout, to provide such contacts on the same side as the horizontal readout register. To this end, a dummy line (14'-17') is provided in accordance with the invention between the matrix and the horizontal readout register (6), said dummy line having an electrode structure which leaves room for contact windows (22) to the zones (12).

Abstract: A solid-state CCD image pick-up device includes optoelectric transducing elements corresponding to pixels vertically and horizontally arrayed in a matrix forming column linear arrays defining a column direction and at least one vertical charge transfer path associated with a corresponding adjacent column linear array. Pixel signals are vertically transferred from the column linear arrays to the vertical charge transfer paths such that gate signals occurring at predetermined times are applied to gate electrodes of the vertical charge transfer paths to permit the pixel signals to be scan read by a horizontal charge transfer path. Switching elements are provided for transfer gate electrodes and a drive circuit sequentially generates drive signals for groups of gate electrodes during periods in which the switching elements are rendered conductive to allow a full frame scan read to be performed by supplying a predetermined number of timing signals to the gate electrodes.

Abstract: In an arrangement of light-sensitive or X-ray sensitive sensors (S.sub.1,1, . . . , S.sub.2048,2048) arranged in a matrix in rows and columns, which sensors produce charge states in dependence upon the amount of incident radiation and each have an electrical switch, for each sensor row a switching line (33.sub.1, . . . , 33.sub.2048) via which the switches (3) can be activated so that the charge states of the sensors of the activated sensor row are read or reset simultaneously via associated read lines (8, 9, 10), there is provided a reset device (30a, 30b) for resetting the charge states of previously read sensor rows, which device activates at least one of the previously read sensor rows, which activates another of the previously read sensor rows after a predetermined number of clock pulses of a reset clock signal (T.sub.32), and which deactivates each activated sensor row a predetermined number of clock pulses after its activation.

Abstract: A charge-coupled imaging device has a width/height ratio which is adjustable since a number of columns situated in two strips on either side of the sensor are not used. The charge generated in these columns is placed in the horizontal output register simultaneously with the active information which is to be used, and is drained off in the flyback time between consecutive active line times through the output of the output register. Since the non-active strips are situated on either side of the sensor, the location of the center of the active portion of the matrix is fixed, independent of whether the information from the said strips is or is not used, so that in every state of the sensor this center coincides with the optical center of the optical system used.

Abstract: In a linear sensor, a charge transfer part is disposed between a one-dimensional array of photodetectors and an overflow drain and includes a CCD having four or more transfer gates for each photodetector for transferring signal charges from the photodetector array in a direction of the photodetector array, transfer gates controlling charge transfer from the photodetectors to the CCD, and shutter gates for controlling charge transfer from the charge transfer part to the overflow drain. Each transfer gate is disposed between each photodetector and a prescribed one of the four or more transfer gates, and each shutter gate is disposed between the prescribed transfer gate and the overflow drain. The four or more CCD transfer gates are controlled by four or more phase driving clocks.

Abstract: The process tracking bias generator for antiblooming structures includes a lateral overflow antiblooming drain and bias circuitry coupled to the antiblooming drain for automatically adjusting a bias for the antiblooming drain independent of process variations.

Abstract: The present invention is directed toward an image sensor array comprising a plurality of pixels. Each pixel includes a photodiode and a CCD channel region. An overflow drain region is provided adjacent the CCD channel region for extraction of excess charges. An insulated gate read-out transfer electrode is further provided above the CCD channel region and a portion of the substrate between the CCD channel region and the photodiode. Three different potentials are applied to the read-out transfer electrode for respectively storing charge in the photodiode, extracting excess charge from the photodiode while allowing signal charge to remain in the photodiode, and reading out signal charge from the photodiode.

Abstract: A frame interline transfer CCD imager is so adapted that signal charges from the photosensor are read into a vertical transfer unit and are transferred at a high transfer rate from the vertical transfer unit to a storage section. The charges from each photosensor are drained during the high transfer rate transfer so that the photosensors are unable to store the signal charges to prevent the occurrence of blooming.

Abstract: A method for driving a CCD solid state imaging device of a frame-interline type is disclosed. The CCD imaging device comprises a semiconductor substrate, an image section including a number of pixels arranged two-dimensionally and each having a radiation sensor, transfer gate and a first vertical CCD, a storage section, a horizontal CCD shift register, and an output section. The semiconductor substrate having a protruding portion as a drain member is biased at a low level for accumulating signal charges during an effective picture interval and at a higher level for draining all of the signal charges during a frame shift transfer period. The amplitude of the driving signals for driving gate electrodes of the vertical CCD shift registers can be large without reading out noise-forming charges so that the transfer efficiency can be improved in a CCD imaging device.

Abstract: A CCD image sensor comprising: a semiconductor substrate of a first conductivity type connected to a ground; an impurity region of a second conductivity type formed in the surface of the semiconductor substrate of the first conductivity type, to serve as a blooming prevention layer; an impurity region of the first conductivity type formed in the surface of the semiconductor substrate, so that it encloses the impurity region of the second conductivity type serving as a blooming prevention layer, to serve as a potential barrier layer; an impurity region of the second conductivity type formed in the surface of the semiconductor substrate of the first conductivity type so that it encloses the impurity region of the first conductivity type serving as a potential barrier layer, to serve as a light receiving region; an insulation film which is formed on the surface of the semiconductor substrate of the first conductivity type and has contact holes at both edges of the impurity region of the second conductivity type,

Abstract: In an array of charge injection device (CID) detectors, integer amplification is incorporated into each respective detector of the array. The amplifier for each CID detector in the array performs multiple nondestructive readouts. This provides a gain of N amplification of the signal charge in that detector wherein the signal charge is accurately replicated in a separate charge storage well defined by a magnitude capacitor coupled to the detector. Thus, at the end of the readout process, this separate well contains charge equal to N times the signal charge, N being the number of nondestructive readout cycles in the readout process.

Abstract: A still picture imaging apparatus including a photometer amplifier (4) for measuring a photo current flowing into an overflow drain of a CCD imaging device (3), an aperture stop mechanism (2) for adjusting the incident light quantity of the imaging device, and a command unit (8, 9) for producing a command signal to start an imaging operation whereby a light quantity measurement on the basis of the photo current is effected during a non-operated condition of the imaging device and then the imaging operation of the imaging device is started in response to the command signal from the command unit (8, 9).

Abstract: An exposure controller comprises a discharge pulse calculation circuit for calculating a discharge pulse count to be output to a solid-state image pickup device within one field period, and a coring circuit for defining the quotient obtained from the discharge pulse count divided by a predetermined setting value and plus 1 as a coring value. In an electronic camera system incorporating an electronic iris, when one discharge pulse changes, the amount of change in the luminance level of an image signal becomes larger as an exposure time becomes shorter, whereby hunting is prevented from occurring at the convergent point of the luminance level, and an exposure controller which is compact and has excellent characteristics can be embodied.

Abstract: A method of controlling the dynamic range of a CCD or similar device. The method is used in connection with a charge-coupled device or like structure of known construction having a photogate region in which charge is generated at a rate proportional to the intensity of incident electromagnetic radiation. The photogate accumulates charge during a predetermined exposure period. A sink region is disposed to receive excess charge from the photogate region, and the passage of charge from the photogate region to the sink region is controlled by a control gate of the type commonly used for integration control. A second gated region is present for receiving charge from the photogate region for transporting charge therefrom.