Abstract: In order to reduce the frame rate, when all photodiodes contributing to output of a video signal in a CMOS image sensor must be simultaneously exposed (at the timing of strobe flashing &Dgr;ts), as in a case where strobe is flashed, readout pixels composing the CMOS type image sensor are thinned such that the number of photodiodes contributing to the video signal outputted from the CMOS type image sensor is reduced. A time period &Dgr;tp2 required for processing (of the video signal caused by a row of photodiodes) in an analog processing circuit connected to the succeeding stage of the CMOS type image sensor is shortened, thereby reducing the frame rate.

Abstract: A method is provided having the first step of generating a first signal representing a first amount of light detected by a first pixel sensor, where the first amount of light is composed of light in a first spectrum and in a second spectrum. The method continues with generating a second signal representing a second amount of light detected by a second pixel sensor, where the second amount of light is composed of light in the second spectrum. Then, subtracting the second signal from the first signal. An architecture is also provided having a photodiode with a first output signal. A mirror circuit is coupled to the photodiode to duplicate the first output signal into a set of duplicated photodiode output signals. A filter array is coupled to the photodiode having a first infrared pass spectrum.

Abstract: Each unit pixel includes a photodiode, a reading selection transistor, a reading transistor, an amplifying transistor, a reset transistor, and a horizontal selection transistor, and thus a MOS image sensor of a dot-sequential reading 5-Tr type is formed. The reading selection transistor and the reading transistor are formed with a two-layer gate structure, and gate potential of the reading selection transistor and the reading transistor is set to a negative potential. Thereby, a lower layer of a gate region of the reading transistor and the reading selection transistor is controlled to a negative potential. Thus, depletion in the lower layer region is suppressed to reduce leakage current.

Abstract: A time-integrating pixel sensor having a photo-detector, a capacitor, a comparator and a pixel data buffer. In operation, the photo-current from the photo-detector charges the capacitor and produces a photo-voltage. The photo-voltage sensed by the capacitor and a reference voltage is compared with the comparator. If the photo-voltage exceeds the reference voltage, a global code value is latched into the pixel data buffer. The optical power falling on the photo-detector is determined from the latched code value. An array of sensors is incorporated into a semiconductor device together with circuitry to read and decode the pixel data buffers. The reference voltage may be varied in time to increase the dynamic range of the sensor.

Abstract: An image reading device ready to operate at higher speed is built as an IC chip having a plurality of processing sections, of which each has a plurality of image reading photoelectric conversion elements, a plurality of transistors for reading a photoelectric conversion signal from the image reading photoelectric conversion elements, a signal selection circuit for sequentially selecting the plurality of transistors, and a signal output line by way of which the photoelectric conversion signal is transmitted.

Abstract: Motion/Saturation detection system and method for synthesizing high dynamic range motion blur free images from multiple captures, the system and method utilizing photocurrent estimation to reduce read noise and enhance dynamic range at the low illumination end, saturation detection to enhance dynamic range at the high illumination end, and motion blur detection to ensure the photocurrent estimation is not corrupted by motion. Motion blur detection also makes it possible to extend exposure time and to capture more images, which can be used to further enhance dynamic range at the low illumination end. The present invention operates completely locally, making it well suited for single chip digital camera implementations.

Abstract: An imaging apparatus includes an imaging device having a square row-column pixel matrix, and having units for transferring pixel signals in the row direction and the column direction of the matrix. The rows and columns of the pixel matrix are oriented at angles of forty-five degrees with respect to the vertical axis of the imaging apparatus. After being read from the imaging apparatus in row-column order, the pixel signals are reordered to conform to a scanning sequence with horizontal or vertical scanning lines. Alternatively, the pixel signals are read from the imaging device in this scanning sequence. Improved horizontal and vertical resolution is thereby obtained from an imaging apparatus with a conventional square pixel matrix.

Abstract: An image sensor (10) includes an array having an image sensing portion (12) and a control portion (14). Pixels (18) of the image sensing portion and devices (20) of the control circuitry portion each have a diode stack (34) of a back-to-back switching diode (36, 38, 40) and a photodiode (42, 44, 46). The photodiodes of the devices (20) are constantly illuminated in use so that they act as current sources in series with the switching diode. This provides a circuit device which has characteristics enabling its use in control circuitry.

Abstract: An imaging device performs moving image shooting in which smearing does not occur and further performs a still image shooting by a sufficiently accurate shutter operation. The imaging device includes an imaging element that accumulates received light as a charge. A shutter travels so as to shade the imaging element. A first scanning circuit performs a charge accumulation start scanning of the imaging element at a timing and/or speed that matches the travel speed of the shutter. A second scanning circuit performs reading scanning of the charge accumulated in the imaging element. A controller controls the scanning of the first scanning circuit and the second scanning circuit and the travel of the shutter. When the still image is shot by the imaging device, the exposure time is adjusted by the controller controlling the scanning start time of the first scanning circuit and the travel start time of the shutter.

Abstract: In a pixel having an electronic shutter, a method of increasing the retention time of the electronic shutter is disclosed. A reset signal is employed to drive a diode node to a predetermined voltage immediately after integration is completed. A sample signal is employed to control a pass gate. The sample signal includes a state where the sample signal is a negative voltage.

Abstract: The present invention is a method for detecting photo signals using an imaging device, comprising steps of photo-generating holes in a well region 15 of a photo-diode by a signal light, transferring the photo-generated holes through a bulk of the well region 15 to a heavily doped buried layer 25 which is formed in the well region 15 near a source region 16 by doping that region with impurity heavier than the well region (15) of an insulated gate FET, storing the photo-generated holes in the heavily doped buried layer 25 to thereby change the threshold of the FET corresponding to the amount of the photo-generated charge, and reading the change in the threshold as the amount of signal light received by the photo-sensor.

Abstract: The invention is directed to a method and apparatus of controlling power consumption in a CMOS active pixel sensor (APS) transducer array, which has a number of APS's arranged in columns and rows and connected to a power supply, for providing output signals representing an image and wherein the outputs of selected APS's are decimated to reduce the output bandwidth of the transducer. The method comprises the steps of determining the selected APS's having outputs that are decimated and disconnecting the selected APS's from the power supply. The decimated APS's may include some or all of the APS's located in predetermined columns, rows or columns and rows. The apparatus includes transistor switches and couplers for connecting the selected APS's to the power supply. Transistor switches may be used to connect some or all of the APS's in predetermined columns, rows or columns and rows to the power terminal or to the ground terminal of the power supply.

Abstract: Disclosed is a CMOS image sensor that includes circuitry for identifying defective pixels, particularly pixels having leaky access switches. The leaky access switches allow charge to escape from the pixel over a row or column line in a pixel array, thereby corrupting the outputs of an entire row or column of pixels. A disclosed test involves (a) electronically setting a defined charge in a selected pixel of the CMOS imager; (b) reading the output of the selected pixel; and (c) comparing the output of the selected pixel to an expected value based upon the defined charge set in the selected pixels. If the output significantly deviates from the expected value, then the selected pixel is identified as having a leaky access switch. Preferably, a newly fabricated sensor is first tested as described. If such leaky access switch is discovered, the imager is discarded without incurring further manufacturing cost.

Abstract: The present invention relates to a solid image pick-up unit which can restrict a variation in the leakage charge quantity at the light emitting time and non-emitting time of the LED and in which a signal charge quantity can be increased and adjusted without increasing the number of LED. A photodiode is connected to two sample-hold transistors for transferring charges to two sample-hold capacitors respectively through a transfer transistor, and is also connected to a reset transistor and an amplification transistor through the transfer transistor. Further, the amplification transistor is connected with an address transistor. The two sample-hold capacitors are disposed at positions symmetrical with the center of the n-diffusion layer of the photodiode.

Abstract: An imaging array of active pixel sensors uses a reset amplifier in each pixel in a four transistor CMOS implementation. The reset amplifier acts as a variable resistance in the source-follower amplifier feedback circuit. The variable resistance is controlled by a range reset voltage applied to the reset amplifier thereby nulling the photodiode reset noise. The ramp reset voltage is applied to all reset amplifiers of all pixels at the same time, thereby providing for reset of the entire array at the same time, i.e., global reset.

Abstract: An Active Pixel Sensor (APS) system is provided with photosensing circuitry for providing a photosignal related to an intensity of incident light on a pixel during an exposure period and converting circuitry operatively connected to said photosensing circuitry to provide an intensity-time signal in a first duration or second duration during the exposure period in response to incident light of a respective first or second range of intensities and to respond to the intensity-time signal to provide a first digital count or a sum of first and second digital counts related to the intensity of the incident light of the respective first or second range of intensities.

Abstract: An image pickup apparatus including a pixel area including a plurality of pixels, and a substrate on which the pixel area is integrated, wherein the centers of the pixel area and substrate substantially coincide with each other. This apparatus can attains reduction of the size thereof.

Abstract: An image sensor is disclosed that prevents a photoelectrically-converted signal from being corrupted during a readout operation. The image sensor includes a line-selection line located on an upper side of a pixel relative to a top to bottom scan direction and disposed across the pixel in a direction substantially perpendicular to the top to bottom scanning direction. A signal reset line is located on a lower side of the pixel relative to a top to bottom scan direction and is disposed across the pixel in a direction substantially perpendicular to the top to bottom scanning direction. The line-selection line and the signal-reset line are disposed above and below a photoelectric conversion portion of the pixel.

Abstract: A storage pixel sensor disposed on a semiconductor substrate comprises a capacitive storage element having a first terminal connected to a fixed potential and a second terminal. A photodiode has an anode connected to a first potential and a cathode. A semiconductor reset switch has a first terminal connected to the cathode and a second terminal connected to a reset potential. A semiconductor transfer switch has a first terminal connected to the cathode and a second terminal connected to the second terminal of the capacitive storage element. A semiconductor amplifier has an input connected to the capacitive storage element and an output. The semiconductor reset switch and the semiconductor transfer switch each have a control element connected to a control circuit for selectively activating the semiconductor reset switch and the semiconductor transfer switch.

Abstract: An area-isolation type solid-state image pickup device is such that an image pickup area is formed on an element formation surface of a semiconductor chip in a way to correspond to an optical image configuration of a subject, the semiconductor chip serving as an image pickup element, and an element drive circuit area and signal processing circuit area formed on a section other than the image pickup area. By doing so it is possible to fully utilize elements on an element formation surface of a semiconductor chip without ruining the element and hence to improve an efficiency with which a semiconductor device is manufactured.

Abstract: A correlated double-sampling circuit for sampling an input signal received from a pixel sensor circuit via an input line. According to one embodiment, a first switch selectively couples a junction of first terminals of a first capacitor and a second capacitor to the input line. A second switch selectively couples an output node coupled to a second terminal of the second capacitor to a reference voltage. A third switch selectively couples the output node to an output line.

Abstract: An image sensor has a plurality of sensor integrated circuit devices of the same configuration arranged in a row. Each sensor integrated circuit device has a plurality of light-sensing elements, a sensor circuit for successively outputting the outputs of these light-sensing elements, and an amplifier circuit. It further has a first output terminal for directing the output of the sensor circuit out of the sensor integrated circuit device, an input terminal for directing an external signal to the amplifier circuit, and a second output terminal for directing the output of the amplifier circuit out of the sensor integrated circuit device. The first output terminal of each sensor integrated circuit device is connected to the input terminal of a particular sensor integrated circuit device so that the output of every light-sensing element is amplified by the amplifier circuit of that particular sensor integrated circuit device alone.

Abstract: A circuit technique to reduce the input capacitance line of a charge integrator is described. This approach is particularly tailored for embedded read-out circuits in solid-state integrated sensors. An integrated charge amplifier described herein includes a generic amplifier element and a high speed buffer which drives a metal shield placed underneath the input line. The metal shield therefore follows the potential of the input line and thereby reduces the capacitance between the input line and ground.

Abstract: In a solid-state imaging apparatus of the present invention, after an integration operation is started with an integration circuit by setting a reset instruction signal at logical zero, charges stored in a light receiving device are discharged by selecting this light receiving device. A value of an integration signal obtained by an integration operation of an integration circuit is compared with a reference value by a comparing circuit. A capacitance control section informs a capacitance instruction signal to a variable capacitor section of the integration circuit in response to a comparing result. A feedback loop is formed, which consists of the integration circuit, the comparing circuit, and a capacitance control circuit. When the value of the integration signal agrees finally with the reference value within resolution, the capacitance control section outputs a value in accordance with the capacitance instruction signal. This value is sequentially read out through a horizontal reading-out section.

Abstract: A multiplexer circuit includes switches 26 or 260 each having a hold portion 120 or 1200 and driving portion 110 or 1100 for providing a hold voltage or a select voltage to an output 14. If all control inputs 28A or 280A are at a first level, then the output has the select voltage, whereas if one input 28A is at a second level, the output has the hold voltage. The switches 26 may be integrated onto the substrate of a diode-based array of electrical elements, for example image sensing pixels. In this case, the output 14 includes a row conductor for a row of such pixels.

Abstract: An image sensor comprises switching elements 30 on a substrate 1. An insulating separation layer 9 is disposed over the switching elements so that a photodiode arrangement 20a disposed over the insulating separation layer 9, can overlap the switching elements 30 and occupy a maximum area of the image sensor. A barrier layer 10 is interposed between the insulating separation layer 9 and the photodiode arrangement 20a, which prevents degradation of the photodiode characteristics over time.

Abstract: The noise in the photo information extracted from an active pixel sensor cell is reduced by resetting the voltage on the photodiode of the cell to the power supply voltage, and by reading the cell immediately before and after the cell is reset. The voltage on the photodiode is reset to the power supply voltage by applying a reset voltage to the gate of the reset transistor conventionally used to reset the photodiode where the reset voltage is sufficiently larger than the power supply voltage to cause the voltage on the photodiode to be pulled up to the power supply voltage.

Abstract: Image transduction device pixel cells are described which have analog memory integrated with the pixel transduction elements and arrays made from such pixel cells. The integrated pixel cells are capable of storing information which, for example, can achieve a desired transduction transfer function for a given pixel transduction element. While the present invention may be used with any type of continuously variable, settable, and nonvolatile analog memory, the analog memory is beneficially based on a ferroelectric gate transistor comprised of an amorphous silicon transistor integrated with a ferroelectric gate dielectric layer or an amorphous silicon transistor with a charge storage dielectric gate layer.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration.

Abstract: A CMOS imaging system provides low noise read out and amplification for an array of passive pixels, each of which comprises a photodetector, an access MOSFET, and a second MOSFET that functions as a signal overflow shunt and a means for electrically injecting a test signal. The read out circuit for each column of pixels includes a high gain, wide bandwidth, CMOS differential amplifier, a reset switch and selectable feedback capacitors, selectable load capacitors, correlated double sampling and sample-and-hold circuits, an optional pipelining circuit, and an offset cancellation circuit connected to an output bus to suppress the input offset nonuniformity of the amplifier. For full process compatibility with standard silicided submicron CMOS and to maximize yield and minimize die cost, each photodiode may comprise the lightly doped source of its access MOSFET. Circuit complexity is restricted to the column buffers, which exploit signal processing capability inherent in CMOS.

Abstract: An image sensing device having an array of photodetectors capable of generating electron/hole pairs from incident photons, with multiple charge coupled devices organized in a tandem well design that employs multiple storage wells per pixel. The wells use thresholds to control the overflow of charge from one well to the next and are arranged such that a first charge coupled device having a plurality of cells is operatively coupled to the photodetectors by first transfer means for placing charge accumulated within the photodetectors from generated electron/hole pairs within the first charge coupled device, and a second charge coupled device having a plurality of cells being operatively coupled to the first charge coupled device by second transfer means for removing charge exceeding a predetermined threshold within the first charge coupled device and placing charge exceeding the predetermined threshold within the second charge coupled device.

Abstract: Image transduction device pixel cells are described which have analog memory integrated with the pixel transduction elements and arrays made from such pixel cells. The integrated pixel cells are capable of storing information which, for example, can achieve a desired transduction transfer function for a given pixel transduction element. While the present invention may be used with any type of continuously variable, settable, and nonvolatile analog memory, the analog memory is beneficially based on a ferroelectric gate transistor comprised of an amorphous silicon transistor integrated with a ferroelectric gate dielectric layer or an amorphous silicon transistor with a charge storage dielectric gate layer.

Abstract: A light receiving device includes, in addition to a photodiode and a reset element, a comparator formed by a first and a second MOS transistor and a counter. The comparator compares an output potential of the photodiode applied to a gate electrode of the first MOS transistor with a threshold potential externally applied to a gate electrode of the second MOS transistor. The counter counts a time duration from a point of time when the photodiode is reset by the switching element to a point of time at which the output potential of the photodiode exceeds the threshold potential, and outputs the time duration in a numeral value corresponding to the quantity of light incident on the photodiode. The required light sensitivity can be maintained even when the quantity of light is either large or small. Also, non-destructive reading can be carried out.

Abstract: When a forward or reverse voltage is applied to two diodes 1 and 2 connected in series in the same direction, the junction CP of the two diodes is switched for a comparatively low-impedance state to a high-impedance state or vice versa, so that a photoelectric transducer 3 connected to the junction CP is brought to either a reset or storage state. With an improved image pickup device having this construction, the impedance at the junction CP can definitely be held at low level in all instances without being influenced by the amount of illumination on the photoelectric transducer 3, whereby it can be saturated within a predetermined reset time so as to prevent the generation of residual charges.