Abstract: When the measurement values measured by a first sensor among a plurality of sensors installed in a dispersed manner at a specific location, in first cycles are determined to be abnormal values, a control device activates the first sensor in second cycles that are shorter than the first cycles. Moreover, when the abnormal values are included in the trend of temporal variation, the control device activates a plurality of second sensors, which is installed around the first sensor, in the second cycles. Moreover, when the measurement values measured by the first sensor and the plurality of second sensors in the second cycles are included in the trend of surface-direction distribution, the control device outputs the measurement values measured by the first sensor and the plurality of second sensors.

Abstract: An image sensor includes a pixel array; a logic circuit configured to convert an image signal generated from the pixel array during a first period into image data; and a memory. The image data may be written in the memory during a second period, of which at least a portion overlaps the first period. The logic circuit may write dummy data in the memory during a third period overlapping the first period and not overlapping the second period.

Abstract: A radar and/or camera system may include a receiver subsystem that receives image and/or radar data from one or more imaging/radar subsystems via multiple data lanes. A vision processor of the system may receive a data stream that includes the image and/or radar data and one or more synchronization signals including a vertical sync signal. The receiver subsystem may include a timing event generator that toggles the vertical sync signal in response to detecting certain timing event errors in order to correct these timing event errors without interrupting normal operation of the system. The receiver subsystem may include sync monitoring circuitry that may detect synchronization errors that occur when synchronization signal pulses received by the receiver subsystem do not match a predefined synchronization pattern within a scan window of predefined length. The system may be reset in response to detection of such synchronization errors.

Abstract: A camera is module mounted on an inside of a windshield in a vehicle and is configured to photograph an outside of the vehicle. The camera module includes: a first camera for photographing the outside with a first imaging element through a first lens unit; and a second camera having a view angle narrower than the first camera and photographing the outside with a second imaging element through a second lens unit. The first imaging element and the second imaging element have a same pixel specification.

Abstract: In image processing apparatus, a sample hold unit samples and holds an output signal of the image sensor. A timing signal generating circuit generates a sampling clock to specify a sampling timing of the sample hold unit. A controller sets a phase of the sampling clock to the timing signal generating circuit. In an adjustment process that adjusts the phase of the sampling clock, the controller (a) causes the image sensor to scan a reference board, (b) sets predetermined plural phases to the timing signal generating circuit in turn, (c) calculates average values of image data obtained correspondingly to the plural phases and calculates a value of a parameter that indicates a fluctuation width of the average values, and (d) sets the phase of the sampling clock as a phase corresponding to the smallest value of the parameter.

Abstract: An imaging device includes pixels each including a photoelectric converter that generates charges by photoelectric conversion, a first transfer transistor that transfers charges of the photoelectric converter to a first holding portion, a second transfer transistor that transfers charges of the first holding portion to a second holding portion, and an amplifier unit that outputs a signal based on charges held by the second holding portion. The first transfer transistor is configured to form a potential well for the charges between the photoelectric converter and the first holding portion when the first transistor is in an on-state. The maximum charge amount QPD generated by the photoelectric converter during one exposure period, a saturation charge amount QMEM_SAT of the first holding portion, and the maximum charge amount QGS that can be held in the potential well are in a relationship of: QPD<QGS?QMEM_SAT.

Abstract: A method, apparatus, and system that provides a holographic layer as a micro-lens array and/or a color filter array in an imager. The method of writing the holographic layer results in overlapping areas in the hologram for corresponding adjacent pixels in the imager which increases collection of light at the pixels, thereby increasing quantum efficiency.

Abstract: An image-processing device, for gas detection that performs image processing on infrared images of a subject being taken at plurality of times a day, includes a hardware processor that generates physical-quantity-change data indicating chronological change in physical quantity determined based on pixel data of pixels constituting the infrared image. The hardware processor selects, from the pixels constituting the infrared image, a reference pixel used as a reference and a comparison pixel to be compared with the reference pixel, and calculates a degree of phase similarity indicating a degree of similarity in phase between a waveform of the physical-quantity-change data of the reference pixel and a waveform of the physical-quantity-change data of the comparison pixel. The hardware processor determines, based on the degree of phase similarity, that an image including the reference pixel and the comparison pixel is not a gas image.

Abstract: Systems and methods for monitoring operation of an instrument cluster configured to display vehicle operating information to a driver. The system includes a camera pointed at the instrument cluster to capture images of operation of the instrument cluster. A control module is in receipt of the images of the instrument cluster. The control module is configured to compare operation of the instrument cluster as captured in the images with predetermined, expected operation of the instrument cluster. A fault condition notification module is configured to generate a fault notice when there is a discrepancy between operation of the instrument cluster as captured in the images and the predetermined, expected operation of the instrument cluster.

Abstract: An image pickup apparatus of which the display start timing and the display quality are selectable. The image pickup apparatus has a switch which selectively switches display data to be displayed on a display device between the first display data output by the first output circuit, and the second display data output by the second output circuit, and display the first display data or the second display data on the display device, wherein the first display data is generated by the image data output by the image pickup device developed, and the second display data is generated by the image data transferred by a transfer circuit developed.

Abstract: An image sensor including a pixel circuit and an active reset circuit. The pixel circuit includes a light sensing element, a storage node selectively connected to the light sensing element, an output transistor configured to, during a readout operation, output a signal that is based on a potential of the charge storage node to an output line, and a selection transistor that controls the readout operation. The active reset circuit includes a first current path and a second current path, the first current path extending from a power supply node to the output line via the selection transistor and the output transistor, and the second current path extending from the power supply node to the output line via a first transistor and a second transistor. The active reset circuit is configured to, when the selection transistor and the first transistor are both ON, set a potential of the charge storage node based on a potential of a gate of the second transistor.

Abstract: A method of driving a pixel array includes providing a ramp signal to one or more columns of the pixel array. For each cycle of the ramp signal, the method further includes providing a first row driving signal to at least a first row of the pixel array and a second row driving signal to a second row of the pixel array. A pixel array driver may include a ramp signal generator configured to produce a ramp signal, a first amplifier configured to receive the ramp signal and produce a first amplified ramp signal, and a second amplifier configured to receive the ramp signal and produce a second amplified ramp signal. The first amplified ramp signal may be electrically connected to a first set of pixels of a pixel array, and the second amplified ramp signal may be electrically connected to a second set of pixels of the pixel array.

Abstract: A solid-state imaging device according to the present disclosure includes a pixel array unit in which unit pixels including photoelectric conversion elements are arranged in a matrix form and the unit pixels are grouped into a plurality of pixel groups and a timing controller which independently sets an exposure start timing and an exposure end timing relative to each of the plurality of pixel groups so that at least one pixel group of the plurality of pixel groups is exposed a plurality of times within a single vertical synchronization period.

Abstract: A comparator includes a first stage coupled to compare a reference voltage to an image charge voltage signal. The first stage includes first and second NMOS input transistors coupled between an enabling transistor and respective first and second cascode devices to receive the reference voltage and the image charge voltage signal. A first auto-zero switch is between a gate of the first NMOS input transistor and a first node. The first node is between the first NMOS input transistor and the first cascode device. A second auto-zero switch is between a gate of the second NMOS input transistor and a second node. The second node is between the second cascode device and a second PMOS transistor. A voltage difference between the first and second nodes during an auto-zero period reduces an amount of kickback that occurs during an ADC period.

Abstract: An imaging display apparatus includes an imaging unit that images a subject at a first frame rate and outputs an imaging signal, an image processing portion that generates an image signal based on the imaging signal, a VRAM that stores the image signal, and a display unit that performs displaying based on the image signal at a second frame rate which is equal to or greater than N (N is a natural number equal to or greater than 2) times the first frame rate. The VRAM stores the image signals for one frame to be displayed by the display unit. The display unit performs displaying N times based on the image signals for one frame.

Abstract: An image pickup apparatus of which the display start timing and the display quality are selectable. The image pickup apparatus has a switch which selectively switches display data to be displayed on a display device between the first display data output by the first output circuit, and the second display data output by the second output circuit, and display the first display data or the second display data on the display device, wherein the first display data is generated by the image data output by the image pickup device developed, and the second display data is generated by the image data transferred by a transfer circuit developed.

Abstract: A method of driving a pixel array includes providing a ramp signal to one or more columns of the pixel array. For each cycle of the ramp signal, the method further includes providing a first row driving signal to at least a first row of the pixel array and a second row driving signal to a second row of the pixel array. A pixel array driver may include a ramp signal generator configured to produce a ramp signal, a first amplifier configured to receive the ramp signal and produce a first amplified ramp signal, and a second amplifier configured to receive the ramp signal and produce a second amplified ramp signal. The first amplified ramp signal may be electrically connected to a first set of pixels of a pixel array, and the second amplified ramp signal may be electrically connected to a second set of pixels of the pixel array.

Abstract: A method and apparatus for inspecting an object is provided. By way of example, first and second images of the object obtained by using a camera and a lighting unit. The lighting unit and the camera is controlled so as to provide the first image picked up by the camera with a first quantity of light radiated from the lighting unit and the second image picked up by the camera with the second quantity of light radiated from the lighting unit. The first quantity of light is different from the second quantity of light. Differences between pixel values of the first image and pixel values of the second image are calculated. Then, it is determined whether the object has a non-defective appearance or a detective appearance, based on comparison between the differences and reference pixel values corresponding to the differences.

Abstract: The present disclosure relates to an image processing device, an image processing method, and a program capable of increasing the utility of processing for reducing discontinuity in display of image frames acquired through imaging at different imaging rates. From image frames including normally imaged frames imaged at a normal imaging rate, and high-rate imaged frames imaged at a rate higher than the normal imaging rate, determination is made on image frames imaged at at least one of the imaging rates to be image frames for which a displaying rate is to be changed. The displaying rate of the image frames determined to be the image frames for which the displaying rate is to be changed is adjusted within a predetermined range from a timing when the imaging rate is switched. The present technology is applicable to an image processing device configured to perform image processing on image frames, for example.

Abstract: In one general aspect, the techniques disclosed here feature an imaging device that includes: a semiconductor substrate; a first pixel cell including a first photoelectric converter in the semiconductor substrate, and a first capacitive element one end of which is electrically connected to the first photoelectric converter; and a second pixel cell including a second photoelectric converter in the semiconductor substrate. An area of the second photoelectric converter is larger than an area of the first photoelectric converter in a plan view.

Abstract: Methods of reducing digital video flicker, and related systems, devices and computer program products are provided. A method of reducing human-perceivable flicker in a digital video is provided, in which video frames are recorded unevenly with respect to time and in synchronization with a lighting flicker frequency. A system including a camera and a computer is provided, the system configured to reduce human-perceivable flicker in a digital video, in which video frames are recorded unevenly with respect to time and in synchronization with a lighting flicker frequency, so as to reduce human-perceivable flicker in a video assembled using the computer from the video frames.

Abstract: Image sensors may include imaging pixels that have comparators to read out image pixel signals. An imaging pixel may include a photodiode, a floating diffusion region, and a transfer transistor that transfers charge from the photodiode to the floating diffusion region. The floating diffusion region may be coupled to a source follower transistor. The source follower transistor may be coupled to a current source. A row select transistor may be interposed between the source follower transistor and the current source. To form an in-column comparator stage and reduce power consumption, an additional transistor may be interposed between the row select transistor and the current source. The additional transistor may be a pMOS transistor and the source follower transistor may be an nMOS transistor. The additional transistor may have a gate that receives a searching voltage that is ramped from a maximum value to a minimum value.

Abstract: A computer determines one or more brightness levels associated with a first set of pixels within a light source in an image. The computer determines a brightness effect on a second set of pixels in the image based on the one or more brightness levels associated with the first set of pixels within the light source. The computer receives input to alter at least one of the one or more brightness levels associated with the first set of pixels within the light source. The computer alters one or more brightness levels associated with the second set of pixels in the image based on the received input and the determined brightness effect.

Abstract: The present technology relates to an imaging apparatus, an imaging method, an electronic device, and a program that can stabilize a clamp level at the time of imaging while realizing power saving of the imaging apparatus. In an imaging mode including a valid signal period in which a video signal imaged by an imaging device 51 is transferred and an invalid signal period in which the video signal is not transferred, the timing generation circuit 12 generates a vertical transfer clock signal, a horizontal transfer clock/horizontal final stage transfer clock signal, a reset gate clock signal, and an OB clamp clock signal so that a clamp level of the video signal does not vary, and the video signal imaged by the imaging device is transferred in the valid signal period and the video signal is not transferred in the invalid signal period. The present technology can be applied to an imaging apparatus.

Abstract: A device including an emitter that transmits light in a series of frames, wherein each frame in the series includes at least one pulse. The device includes a receiver that receives, for each frame in the series, the at least one pulse reflected from a target, and generates, in response to receiving the at least one pulse in a current frame, an output for calculating a distance between the target and the device for the current frame. The device includes circuitry that calculates, for each frame in the series, the distance between the target and the device based on the receiver output. The circuitry dynamically controls a frame rate for each frame in the series based on the distance calculated in a frame immediately preceding the current frame, and controls the emitter such that the at least one pulse is emitted in the current frame at the calculated frame rate.

Abstract: Provided is a solid-state imaging element including pixel signal read lines, and a pixel signal reading unit for reading pixel signals from a pixel unit via the pixel signal read line. The pixel unit includes a plurality of pixels arranged in a matrix form, each pixel including a photoelectric conversion element. In the pixel unit, a shared pixel in which an output node is shared among a plurality of pixels is formed, and a pixel signal of each pixel in the shared pixel is capable of being selectively output from the shared output node to a corresponding one of the pixel signal read lines.

Abstract: A transistor (24) which acts as a load-current source for a source follower amplifying transistor (22) for outputting a pixel signal to a pixel output line (40) is provided in each picture element (10), whereby a high bias current is prevented from passing through the high-resistance pixel output line (40), so that a variation in an offset voltage among picture elements is suppressed. Inclusion of the high-resistance pixel output line (40) into the source follower amplification circuit is also avoided, whereby the gain characteristics are prevented from deterioration. Thus, the S/N ratio of the picture element is improved so as to enhance the quality of the images.

Abstract: An imaging apparatus and a method of driving the same that can generate a digital data of a high resolution pixel signal are provided. The imaging apparatus includes: a pixel (10-1) for generating a signal by photoelectric conversion; a comparing circuit (30-1) for comparing a signal based on the pixel with a time-dependent reference signal; a counter circuit (40-1) performing a counting operating until an inversion of a magnitude relation between the signal based on the pixel and the time-dependent reference signal; and a selecting circuit (30-2) for setting a time-dependent change rate of the reference signal, according to a signal level of the signal based on the pixel.

Abstract: An optical device includes an optical module, e.g. with an objective lens, a printed circuit board, an image recording element and a supporting plate. In one embodiment, the optical module and the image recording element are arranged on one side of the supporting plate, the printed circuit board is arranged on the opposite side of the supporting plate, and the image recording element and the printed circuit board are contacted to each other through one or more openings in the supporting plate. In another embodiment, the image recording element is arranged in an opening in the supporting plate and directly joined to the printed circuit board.

Abstract: An image sensor module includes a ceramic substrate, an image sensor, a conductive film, and a bottom plate. The ceramic substrate includes an upper surface, a lower surface opposite to the upper surface, a side surface connected between the upper surface and the lower surface. The ceramic substrate has a through hole through the upper and lower surfaces, a receiving recess on the lower surface, and an air hole on the side surface. The through hole communicates with the receiving recess, and the air hole communicates with the receiving recess. The image sensor is received in the receiving recess and is electrically connected to the ceramic substrate. The bottom plate is positioned on the lower surface and electrically connected to the ceramic substrate by the conductive film.

Abstract: An image sensor and a row averaging method for an image sensor capable of simultaneously selecting the pixels of the same color in the same column of different rows in a pixel array and performing a signal process, thereby preventing an increase in an area and a decrease in the sensing speed of the pixels in the sub-sampling mode and the binning mode of the image sensor.

Abstract: A solid-state imaging device simultaneously completes pixel reset operation on all of pixels included in a unit cell when performing pixel reset scanning in a curtain shutter synchronous mode. The pixel reset operation is processing in which a photodiode corresponding to one of transfer transistors is reset. The pixel reset scanning is processing in which the pixel reset operation is performed on a row basis. The curtain shutter synchronous mode is a mode in which exposure of an imaging region to incident light is started by the pixel reset scanning and ended by blocking the incident light by a mechanical curtain shutter provided on an optical path of the incident light.

Abstract: A solid-state imaging apparatus of a dynamic range enlarged by reading out a carrier accumulated in a carrier accumulation unit at a plurality of times during a single carrier accumulation time period.

Abstract: A solid-state imaging device according to the present invention includes: a semiconductor substrate; a plurality of pixels disposed on the semiconductor substrate in rows and columns; a column signal line formed for each of the columns; an inverting amplifier connected to the column signal line; and a feedback line, provided for each of the columns, to feed back output signal of the inverting amplifier to pixels in a corresponding column, wherein the amplifying transistor includes a gate connected to the pixel electrode and outputs signal voltage corresponding to the pixel electrode to a column signal line via the selection transistor, and one of a source and a drain of the reset transistor is connected to the pixel electrode and the other is connected to a corresponding feedback line.

Abstract: An imaging device includes: an imaging sensor 110; a main circuit substrate 120 includes a first ground conductor; an imaging sensor cable 130 that includes a second ground conductor, has the imaging sensor 110 mounted thereon, and is connected to the main circuit substrate 120; a metal plate 150 that is disposed between the main circuit substrate 120 and an area of the imaging sensor cable 130 where the imaging sensor 110 is mounted thereon, and that is electrically connected to the second ground conductor; and a ground connection conductor 190 that electrically connects between the first ground conductor and the metal plate 150. The ground connection conductor 190 is disposed in an area where the imaging sensor 110 and the imaging sensor cable 130 overlap each other or in an area where the imaging sensor 110 and the main circuit substrate 120 overlap each other.

Abstract: A method of manufacturing a solid-state image sensor having a photoelectric conversion portion includes forming a silicon nitride film by a low-pressure chemical vapor deposition method using hexachlorodisilane (Si2Cl6) as a material gas such that the silicon nitride film covers at least a part of the photoelectric conversion portion.

Abstract: A digital camera of the present invention includes a receiving portion 155 that receives a control signal from a remote controller, and a microcomputer 110 having a live view mode controlling so that image data generated by a CMOS sensor 130 or image data obtained by subjecting the image data generated by the CMOS sensor 130 to predetermined processing is displayed on a liquid crystal monitor 150 as a moving image in real time, wherein when the receiving portion 155 receives the control signal from the remote controller, the microcomputer 110 controls so as to shift the digital camera to a live view mode. Due to this configuration, in a digital camera that includes a movable mirror and is capable of displaying a subject image in a live view through an electronic viewfinder, the operability thereof can be enhanced.

Abstract: In various embodiments, a time-delay-and-integrate (TDI) image sensor includes (i) a plurality of integrating CCDs (ICCDs), arranged in parallel, that accumulate photocharge in response to exposure to light, (ii) electrically coupled to the plurality of ICCDs, a readout CCD (RCCD) for receiving photocharge from the plurality of ICCDs, and (iii) electrically coupled to the RCCD, readout circuitry for converting charge received from the RCCD into voltage.

Abstract: An active pixel CMOS image sensor implements full frame digital correlated double sampling (CDS) with global shutter where all the pixels in the image sensor are reset at substantially the same time and all the pixels in the image sensor integrate incident light at substantially the same time and for substantially the same time duration and correlated double sampling cancellation is performed in the digital domain. In one embodiment, the image sensing device includes an array of light sensing elements, a timing and control circuit and analog-to-digital converters. The timing and control circuit is operative to reset the light sensing elements in the array and to control the array of light sensing elements to integrate incident light. The pixel reset values are cancelled from the corresponding light dependent pixel values for each of the light sensing elements to generate correlated double sampling (CDS) corrected digital output pixel values.

Abstract: In an embodiment, a solid-state image sensor comprises: pixels arranged in columns and rows; read signal lines each connected to pixels arranged in a row direction; and output signal lines each connected to pixels arranged in a column direction. The read signal lines are classified into a first type of read signal lines each connected to a group of pixels on which R and B rays are incident, and a second type of read signal lines each connected to a group of pixels on which G rays are incident. Two pixels (R, B) on two adjacent columns are arranged on two opposite sides with respect to the first type of read signal line. Two pixels (Gr, Gb) on two adjacent columns are arranged on two opposite sides with respect to the second type of read signal line.

Abstract: A solid-state imaging device including pixels, each pixel having a reset transistor, a selection transistor, an amplification transistor, and a photoelectric conversion unit. The photoelectric conversion unit has a photoelectric conversion film which performs photoelectric conversion, a pixel electrode formed on the surface of the photoelectric conversion film that faces the semiconductor substrate, and a transparent electrode formed on the surface of the photoelectric conversion film that is opposite to the pixel electrode, and the amplitude of a row reset signal applied to the gate of the reset transistor is smaller than at least one of (a) the maximum voltage applied to the drain of the amplification transistor, (b) the maximum voltage applied to the gate of the selection transistor, (c) the power source voltage applied to an inverting amplifier, and (d) the maximum voltage applied to a transparent electrode.

Abstract: Cinematic motion blur and other cinematic effects are enabled during image capture through exposure timing manipulation. The resulting captured images and videos include one or more cinematic effects without the need for a user to impose the cinematic effects post-capture.

Abstract: The present invention relates to improved imaging devices having high dynamic range and to monitoring and automatic control systems incorporating the improved imaging devices.

Abstract: A system is provided that measures the delay time of a first timing signal transmitted from a control unit to an imager and back to a phase detector. The phase detector also receives a second timing signal that is used as a reference to measure against the received/delayed first timing signal. Based on the phase detection, the system will retard or advance the first timing signal to compensate for the phase shift.

Abstract: A solid-state image sensor has a plurality of pixel units, each pixel unit including a plurality of pixels, and a charge-voltage converter shared by the plurality of pixels. The sensor includes a structural portion including a plurality of wiring layers, an interlayer insulating film, and light waveguides configured by embedding, in portions of the interlayer insulating film located above the photoelectric converters, a material having a refractive index higher than that of the interlayer insulating film. A dummy pattern is formed in the structural portion to reduce a difference between a sensitivity of a first pixel and that of a second pixel, which is produced by a difference between a structure in a periphery of the light waveguide arranged above the photoelectric converter of the first pixel and that of the second pixel.

Abstract: Double pass back side image (BSI) sensor systems and methods are disclosed. The BSI sensor may include a substrate, pixel reflectors formed on the substrate, and pixel photodiodes fabricated in the substrate, each pixel photodiode positioned over a respective one of the pixel reflectors. Micro-lenses may be formed over each photodiode and an image filter may be formed between the photodiodes and the micro-lenses. The pixels reflectors, photodiodes, micro-lenses, and filter may be formed using CMOS fabrication.

Abstract: A solid-state image capturing apparatus including: a pixel array unit including two-dimensionally arranged pixels each including a photoelectric conversion unit, a transfer transistor that transfers charges accumulated in the photoelectric conversion unit, and a charge discharging transistor that selectively discharges the charges accumulated in the photoelectric conversion unit; and a driving unit that performs driving for reading signals from each pixel of the pixel array unit, and drives the charge discharging transistor by using a signal for the driving.

Abstract: An image processing apparatus that enables to make a periodic noise in a captured image less noticeable without making the whole construction thereof complicated. An image pick up unit accumulates electric charges corresponding to an optical image of a target object and transfers the accumulated electric charges, and also reads them out as image signals. A control unit drives the image pick up unit to read out the image signals consecutively from the image pick up unit in a field-by-field base in such a manner so as to make the horizontal cycle of each field different from one another.

Abstract: A circuit for processing an analog signal having a time sequence of discrete signal levels, each of which lies in a time interval and represents an information-bearing segment of the interval while the rest of the time interval is a non-information-bearing segment, comprises a transistor in emitter-follower or source-follower configuration, a high emitter or source resistance or, instead, a high-ohm constant current source, and a device for applying a voltage supply, as well as a switch which is connected between the emitter and a reference potential to prevent a current from flowing via the high-ohm resistance or the high-ohm voltage source for charge reversal of an output capacitance of the circuit in one direction, whereas for charge reversal in the other direction the dynamic current boosting effect of the transistor is exploited. This results in a fast emitter-follower or source-follower circuit which is particularly suitable as the output stage for image sensors.

Abstract: A CCD image sensor includes vertical CCD shift registers and gate electrodes disposed over the vertical CCD shift registers. The gate electrodes are divided into distinct groups of gate electrodes. The CCD image sensor is adapted to operate in an accumulation mode and a charge transfer mode, an accumulation mode and a charge shifting mode, or an accumulation mode, a charge transfer mode, and a charge shifting mode. The charge transfer mode has an initial charge transfer phase and a final charge transfer phase. The charge shifting mode has an initial charge shifting phase and a final charge shifting phase.