Changing Number Of Lines For Standard Conversion Patents (Class 348/458)
  • Patent number: 7602440
    Abstract: The present invention relates to an image processing apparatus and method, a recording medium, and a program that can very sharply display video images which are subjected to frame rate conversion by suppressing a decrease in the image quality (blurred images) caused by imaging blur. A high frame converter 11 performs high frame rate conversion on an input moving picture. An imaging blur suppression processor 13 corrects each pixel value forming a subject frame based on at least one value corresponding to the subject frame of the parameter values representing imaging blur detected by an imaging blur characteristic detector 12. Accordingly, a moving picture having a higher rate than that of the input moving picture and having each pixel value suitably corrected to suppress imaging blur is output. The present invention is applicable to a television system.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: October 13, 2009
    Assignee: Sony Corporation
    Inventors: Toru Nishi, Kazuhiko Ueda, Mitsuyasu Asano
  • Patent number: 7596297
    Abstract: An encoded bit stream having a frame rate of 24 Hz or 23.976 Hz and a progressive format for both NTSC and PAL is recorded on a recording medium. An encoded stream reproduced from the recording medium is supplied to a decoder 20. In the decoder 20, the encoded stream is decoded and 24 p or 23.976 p video is obtained. A video converting portion 25 converts the reproduced video into a display video in accordance with the display format of a monitor 26. For the NTSC range, 29.97 i or 59.94 p display format can be used. For the PAL range, 25 i or 50 p display format can be used.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: September 29, 2009
    Assignee: Sony Corporation
    Inventor: Motoki Kato
  • Patent number: 7580077
    Abstract: A method and an apparatus are provided for converting an interlaced video signal to a progressive scan signal. For each pixel in each missing line of a video field in a video signal to be converted, correlation data is derived for each of a set of possible interpolations between adjacent pixels to be used in reconstructing a missing pixel. A confidence measure is derived from the correlation data and adjustment data for correlation data is selected. The correlation data is then adjusted with the adjustment data, and on the resultant data a determination is made as to which interpolation scheme is most likely to produce an accurate missing pixel. The missing pixel is then interpolated using the selected interpolation scheme.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: August 25, 2009
    Assignee: Imagination Technologies Limited
    Inventor: Paolo Giuseppe Fazzini
  • Patent number: 7573528
    Abstract: A method and apparatus are provided for displaying progressive material on an interlaced display where the number of lines of the source frame is equal to or less than the number of lines in a display field, where such lines in the display field are derived from all of the lines of the source frame.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: August 11, 2009
    Assignee: NVIDIA Corporation
    Inventor: Duncan Andrew Riach
  • Patent number: 7551230
    Abstract: The present invention relates to an information signal processor and the like preferable for use in the case of converting a format of an image signal or converting an image size. An input image signal Vin (525i signal) is converted into an output image signal Vout (such as 1080i signal, XGA signal, or 525i signal for obtaining an image to be displayed in a different magnification). A class code CL is obtained from tap data selectively extracted from the Vin and corresponding to each pixel (pixel at a target position) within a unit pixel block, which constitutes Vout. A coefficient production circuit 136 produces coefficient data for each class, which is used at the time of calculating the pixel data at the target position, based on the coefficient seed data for each class and position information h, v about the target position generated in a position information generation circuit 139.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: June 23, 2009
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Yasushi Tatehira, Takuo Morimura, Nobuyuki Asakura, Wataru Niitsuma, Kei Hiraizumi, Takahide Ayata
  • Patent number: 7551226
    Abstract: An image signal conversion apparatus for converting a SD signal (525i) into a HD signal (525p or the like). In the image signal conversion section, the SD signal is converted into the HD signal, and the image is displayed on the display section. A class code CL indicating a class of a subject pixel of the HD signal is obtained by detecting a space class and a motion class from tap pixel data corresponding to the subject pixel of HD signal which is selectively fetched from a SD signal. The controller loads coefficient data of each class according to the selected resolution into the coefficient memory from the information memory bank when the user selects the resolution. In the calculation circuit pixel data of the subject pixel of the HD signal is calculated using an estimating equation based on the tap data xi corresponding to the subject pixel of the HD signal selectively fetched from the SD signal in the tap selection circuit and the coefficient data read in class code CL from the coefficient memory.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: June 23, 2009
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Kenji Takahashi, Kazushi Yoshikawa
  • Patent number: 7548275
    Abstract: A right side interpolation component and a left side interpolation component for each present pixel are calculated. The right side interpolation component of a present pixel on the left side of an assumption pixel to be interpolated is added to the left side interpolation component of another present pixel on the right side of the assumption pixel, thereby obtaining a pixel data for the assumption pixel. The right side interpolation component and the left side interpolation component are calculated based on a pixel data of a central present pixel and pixel data of present pixels around the central present pixel.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: June 16, 2009
    Assignee: Pioneer Electronic Corporation
    Inventor: Hirofumi Honda
  • Patent number: 7545388
    Abstract: An average filter or filters is used in line with the output of an interpolation filter to downscale an image. The interpolation filter upscales a source image or bitmap of pixels into an intermediate form and the average filter or filters downscales the intermediate form to a destination image or bitmap of pixels. This configuration incorporates a small amount of logic with a relatively low incremental cost, enabling high quality downscaling of text and computer graphics content. The invention achieves quality comparable to a filter/scalar combination with more taps or a separate decimation pass.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: June 9, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Burton Wright
  • Patent number: 7518655
    Abstract: A method and apparatus are provided for converting an interlaced video signal to a progressive scan signal. For each pixel in each missing line of a video field providing correlation data for each of set of possible interpolations between adjacent pixels to the pixel to be reconstructed. A confidence measure is then derived from the correlation data and from that confidence measure the interpolation scheme most likely to produce an accurate missing pixel is determined. The missing pixel is then interpolated using the selected interpolation scheme. In this process, the step of deriving a confidence measure comprises determining the number of maxima and minima in the correlation data and deriving the confidence measure in dependence on the number of maxima and minima so determined.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: April 14, 2009
    Assignee: Imagination Technologies Limited
    Inventor: Paolo Giuseppe Fazzini
  • Patent number: 7508448
    Abstract: Video filtering using a programmable graphics processor is described. The programmable graphics processor may be programmed to complete a plurality of video filtering operations in a single pass through a fragment-processing pipeline within the programmable graphics processor. Video filtering functions such as deinterlacing, chroma up-sampling, scaling, and deblocking may be performed by the fragment-processing pipeline. The fragment-processing pipeline may be programmed to perform motion adaptive deinterlacing, wherein a spatially variant filter determines, on a pixel basis, whether a “bob”, a “blend”, or a “weave” operation should be used to process an interlaced image.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: March 24, 2009
    Assignee: NVIDIA Corporation
    Inventors: Stephen D. Lew, Garry W. Amann, Hassane S. Azar
  • Patent number: 7505083
    Abstract: A method and system for smoothing a frame to remove jagged edges are presented. The method and system generates a smoothing filter with consolidated pixels. Edges within the smoothing filter are analyzed to select an edge direction used for smoothing. A smoothed pixel is generated based on a normalized linear combination of a first edge end pixel, a second edge end pixel and center entry of the smoothing filter. Subtle structure checking can be used to determine whether to use the smoothed pixel in place of the current pixel.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: March 17, 2009
    Assignee: Huaya Microelectronics, Ltd.
    Inventor: Ge Zhu
  • Patent number: 7489361
    Abstract: The invention provides a pixel interpolating method including a step of discriminating, based on an input image signal, a similarity of a discrimination block constituted of plural pixels, and a reference block constituted of plural pixels, positioned close to the discrimination block and shifted upwards or downwards to a position by at least a line with respect to the discrimination block, and a step of outputting, as pixel information of an interpolation pixel positioned between a discrimination block and a reference block having a high similarity, pixel information based on pixel information of a pixel of the discrimination block and/or the reference block having the high similarity.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: February 10, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Eiichi Matsuzaki, Kenji Inoue
  • Patent number: 7483079
    Abstract: A system and method in which a sequence of motion images including a scene of interest is zoomed up and displayed smoothly at a specified arbitrary playback speed. Pixel data of taps corresponding to each pixel of interest in each unit of pixel block of an output image signal to be generated is extracted from an input image signal. A class code is determined based on the extracted pixel data. Based on coefficient seed data of the class and spatial parameters, image quality parameters, and a frame phase of the pixel of interest, a coefficient generator generates coefficient data of the class for use in calculation of pixel data of each pixel of interest. A processing circuit calculates pixel data of the pixel of interest in accordance with a prediction equation using tap data corresponding to the pixel of interest, and the coefficient data corresponding to the class code read from a memory.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: January 27, 2009
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Yasuhiko Suga
  • Patent number: 7480007
    Abstract: A display system comprising a video signal supplier supplying a video signal with a first video signal standard comprising a predetermined sync signal and a data range; a display apparatus supporting one of the first video signal standard and a second video signal standard comprising a sync signal and a data range which are at least being partially different to the first video signal standard and a data range being equal to the first video signal standard and outputting the video signal from the video signal supplier; a selector selecting the display apparatus supporting one of the first video signal standard and the second video signal standard; and a sync signal converter receiving a sync signal in the video signal from the video signal supplier according to a selection of the selector and converts the received sync signal into either the first video signal standard or the second video signal standard, which the selected display apparatus supports, to output the selected display apparatus.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: January 20, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyun-woo Kim
  • Patent number: 7474354
    Abstract: A binarizer binarizes a video signal input from an A/D converter and a video signal output from a line memory using an average luminance value provided from a detection window video signal processor as a threshold value, and outputs a binary pattern. A reference pattern generator generates a plurality of reference patterns. An angle detector compares the binary pattern with each of the plurality of reference patterns, and outputs the angle of a matched reference pattern as angle information. An arc shape detector outputs the edge angle information of a picture based on a combination of the angle information of an interpolation scanning line including an object interpolation pixel and the angle information of interpolation scanning lines above and below the interpolation scanning line.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: January 6, 2009
    Assignee: Panasonic Corporation
    Inventors: Hideaki Kawamura, Mitsuhiro Kasahara, Tomoaki Daigi
  • Patent number: 7466900
    Abstract: Moving pictures are reproduced from a stored moving-picture signal and output at a set reproduction speed that is a first reproduction speed matching a rate of motion of the moving pictures or a second reproduction speed different from the first reproduction speed. The stored moving-picture signal is reproduced in accordance with the set reproduction speed to obtain first interlaced pictures. The first interlaced pictures are converted to obtain first progressive pictures. Moving pictures to be displayed are selected from the first progressive pictures per frame in accordance with the set reproduction speed to obtain second progressive pictures. Scanning lines of the second progressive pictures are decimated so that the number of remaining scanning lines of the second progressive pictures after decimation is equal to the number of scanning lines of interlaced pictures to be displayed, thus outputting second interlaced pictures.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: December 16, 2008
    Assignee: Victor Company of Japan, Ltd
    Inventor: Kenji Sugiyama
  • Patent number: 7463306
    Abstract: In an arrangement for processing video signals provided as interlaced video signals generated in the interlaced scanning mode, in which two fields constitute one frame, and/or as pseudo-interlaced video signals derived from non-interlaced video signals obtained by means of progressive scanning, flexible use of the arrangement with a minimal number of components for this arrangement is achieved in that at least one video signal-processing unit (1) is provided which receives at least an interlaced video signal or at least a pseudo-interlaced video signal and processes these video signals in dependence upon control data generated by means of a control unit (2), and in that a clock generator (4) is provided which controls the control unit (2) and/or the video signal-processing unit (1) in such a way that, when processing an interlaced video signal or a pseudo-interlaced video signal, possibly new control data are generated and/or taken into account as from the start of its next field or its next frame, respective
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: December 9, 2008
    Assignee: Thomson Licensing
    Inventor: Rolf Grzibek
  • Patent number: 7446818
    Abstract: An apparatus and related method for detecting film mode using motion estimation. In the method, a pixel region in each field is sequentially chosen as a target pixel region in a target field to be processed with a motion estimation operation.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: November 4, 2008
    Assignee: Realtek Semiconductor Corp.
    Inventor: Po-Wei Chao
  • Patent number: 7440030
    Abstract: A method is provided for displaying progressive video content on an interlaced display device. The method comprises vertically phase shifting video lines of the progressive video content to correctly position the video lines with respect to a video field of the interlaced display device. The method further comprises scaling the video lines of progressive video content to match a vertical size of a video field of the interlaced display device.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: October 21, 2008
    Assignee: Broadcom Corporation
    Inventors: Alexander G. MacInnis, Sheng Zhong, Jose R. Alvarez
  • Patent number: 7440029
    Abstract: Converting circuits convert the values of multiple items of SD pixel data (pixel value) as class tap data to luminance values. The converting circuits convert pixel values to luminance values based on a correspondence relation between a value of pixel data in an image display device and a luminance value. Class-detecting circuits detect a space class and a motion class based on plural luminance values. Class-synthesizing circuit acquires a class code indicating the class to which the pixel data of a target position in an HD signal belongs. Estimation/prediction-operating circuit obtains items of pixel data of the target position in the HD signal based on an estimation equation using data of an prediction tap and coefficient data of the class indicated by the class code. Consequently, appropriate classification of class to the luminance characteristic of a display device is performed.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: October 21, 2008
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Nobuyuki Asakura, Takeharu Nishikata, Koichi Fujishima
  • Patent number: 7440032
    Abstract: The present invention relates to a motion compensated image process taking local characteristics of image data into account. Image data included in a single image may stem from different video sources. In order to take specific motion phase into account, the motion compensation process is switched accordingly such that an improved picture quality can be achieved.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: October 21, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Sven Salzer, Frank Janssen
  • Patent number: 7440033
    Abstract: The present invention relates to an improved interpolation based on motion compensation. In order to avoid interpolation artifacts in proximity to the image borders, in particular in letterbox type images, each motion compensated image data is subjected to a position validation in order to determine whether or not the motion compensated image data can be used for interpolation purposes. By comparing the position of the motion compensated image data in the referenced images with predefined borderlines, impermissible image data positions can be detected and interpolation based on such image data prevented.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: October 21, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Sven Salzer, Michael Grundmeyer
  • Publication number: 20080232784
    Abstract: The major TV systems in the world use interlaced scanning and either 50 Hz field frequency or 60 Hz field frequency. However, movies are produced in 24 Hz frame frequency and progressive scanning, which format will be used for future digital video discs to be sold in 50 Hz countries. In 50 Hz display devices the disc content is presented with the original audio pitch but with repeated video frames or fields in order to achieve on average the original video source speed. However, the frame or field insertion is not carried out in a regular pattern but adaptively in order to reduce visible motion judder.
    Type: Application
    Filed: November 4, 2004
    Publication date: September 25, 2008
    Applicant: Thomson Licensing
    Inventors: Carsten Herpel, Heinz-Werner Keesen, Andrej Schewzow, Marco Winter
  • Patent number: 7423691
    Abstract: The invention includes a method for converting from an interlace scan image to a progressive scan image. Interpolated rows of pixels, lying between successive rows of the interlace scan image, are generated based upon the received interlace scan rows. The method determines a degree of movement, if any, in the region of a target pixel, and whether a target pixel lies on an edge between visually distinct regions. Multiple potential interpolated values for the target pixel are generated by several interpolation methods, including edge interpolation, inter-field interpolation, non-linear interpolation, and intra-field interpolation. The system uses the degree of movement and edge detection to select or combine one or more of the potential values for the target pixel. At least one correction filter is applied to the result, to correct errors caused by electrical noise in the interlace scan image.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: September 9, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Christopher J. Orlick, Scott Miller
  • Patent number: 7403234
    Abstract: A method for detecting the Bisection pattern for use in conjunction with the deinterlacing is to improve low angle direction detection capability. A method of Bisection pattern detection operates in an interlaced video containing both top and bottom fields. For each missing pixel in a current input field, a window W is constructed whose center pixel is at the considered missing pixel. A binary map is generated which includes rows of values corresponding to pixels in the window, wherein the values indicate if each element of the window is greater than the sample mean of the area surrounding the missing pixel. The number of value changes in the values in each row of the binary map is counted. It is then determined whether or not the missing pixel is within the Bisection pattern based on said counts. In order to maintain both the low angle edge direction detection capability and low misdetection probability, complicated areas are identified by the Bisection pattern detection method.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: July 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Surapong Lertrattanapanich, Yeong-Taeg Kim
  • Patent number: 7403235
    Abstract: An image signal processing apparatus having three processing portions. A first processing portion generates a motion class that corresponds to a target position in an output image signal based on an input image signal. A second portion generates a space class corresponding to the target position based on the input image signal and synthesizes the space class and the motion class to generate one class. A third portion selects multiple items of pixel data positioned in a periphery of this target position based on the input image signal and generates pixel data of the target position in the output image signal according to an estimate equation using the multiple items of pixel data and coefficient data corresponding to the class. These processing portions are respectively constituted of integrated circuits (ICs) having the same configuration. These ICs have first and second functional blocks. Each of the functional blocks changes its functionality according to setting.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: July 22, 2008
    Assignee: Sony Corporation
    Inventors: Hideo Nakaya, Tetsujiro Kondo
  • Patent number: 7391476
    Abstract: A method and device for interpolating a pixel of an interline of a first field in a sequence of interlaced fields includes selecting at least one first pixel and one second pixel from scan lines of the first field adjacent the interline, and a third pixel from a second field temporally preceding or following the first field. The image position of the third pixel corresponds to the image position of the pixel to be interpolated. Also selected are fourth and fifth pixels which lie vertically adjacent the third pixel in the second field. A first filter value is generated by low-pass filtering the at least one first and second image information values. A second filter value is generated by high-pass filtering the third, fourth and fifth image information values. An image information value of the interpolated pixel is generated using the first and second filter values.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: June 24, 2008
    Assignee: Micronas GmbH
    Inventor: Marko Hahn
  • Patent number: 7375764
    Abstract: A method for managing vertical format converter line memories includes writing a number of first input video lines into the VFC line memories, writing an additional video line into the VFC line memories, and reading respective pixels of the first input video lines and the additional input video line from the VFC line memories in parallel. The reading of respective pixels is commenced prior to completion of the writing of the additional video line. A digital video receiving system includes a somewhat similarly configured video processor.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: May 20, 2008
    Assignee: Thomson Licensing
    Inventors: Michael Dwayne Knox, Guenter Anton Grimm
  • Publication number: 20080100740
    Abstract: Methods for adjusting digital video signals, performed by an image generating device of a portable media player, are disclosed. A first signal adjustment unit reduces a resolution of a video frame to generate a reduced video frame by alternately dropping half of the scan lines of the video frame, and repeatedly drops scan lines after at least two scan lines until reaching the last scan line. The content of a first video frame is adjusted to a second video frame in response to a second signal adjustment unit before passing to the display module by the image generating device. The display module is directed to prevent adjustment of the second video frame by the first signal adjustment unit for generating a display video frame. The second video frame is adjusted by the second signal adjustment unit and output to the display module.
    Type: Application
    Filed: October 24, 2007
    Publication date: May 1, 2008
    Applicant: MEDIATEK INC.
    Inventors: Tzu-Shiun LIU, Hua WU
  • Patent number: 7362375
    Abstract: In the scanning conversion apparatus, a first converter converts input interlaced scan data into progressive scan data, and a second converter converting the progressive scan data output from the first converter to interlaced scan data.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: April 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Sun Kim, Dong-Suk Shin, Seh-Woong Jeong, Kee-Yong Kim, Tae-Hee Lee, Jae-Hong Park, Hyung-Jun Im, Kyung-Mook Lim
  • Patent number: 7362377
    Abstract: A method includes storing a current field of a digital video signal. The method further includes storing a preceding field that immediately precedes the current field in the digital video signal, and storing a succeeding field that immediately succeeds the current field in the digital video signal. The method also includes examining the preceding and succeeding fields for motion at a locus of a current pixel to be interpolated. In addition, if any motion at the locus is less than a threshold, the preceding and succeeding fields are examined for motion at a respective locus of at least one pixel that is adjacent to the current pixel to be interpolated.
    Type: Grant
    Filed: December 27, 2004
    Date of Patent: April 22, 2008
    Assignee: Intel Corporation
    Inventor: Jorge E. Caviedes
  • Patent number: 7362376
    Abstract: A method for deinterlacing a picture is disclosed. The method generally includes the steps of (A) generating a plurality of primary scores by searching along a plurality of primary angles for an edge in the picture proximate a location interlaced with a field of the picture, (B) generating a plurality of neighbor scores by searching for the edge along a plurality of neighbor angles proximate a particular angle of the primary angles corresponding to a particular score of the primary scores having a best value and (C) identifying a best score from a group of scores consisting of the particular score and the neighbor scores to generate an interpolated sample at the location.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: April 22, 2008
    Assignee: LSI Logic Corporation
    Inventors: Lowell L. Winger, Yunwei Jia, Aaron G. Wells, Elliot N. Linzer, Simon Booth, Guy Cote
  • Patent number: 7355650
    Abstract: Interlaced video upconverted to progressive video has improved diagonal enhancement. A plurality of averages and differences are determined from different pixels near a given output pixel, including: a vertical average, first and second left diagonal averages, first and second right diagonal averages, a vertical difference, first and second left diagonal differences, and first and second right diagonal differences. A selection is made among the averages based on an absolute value of a minimal difference among the differences. The selection is constrained to select the vertical average if the differences among the averages are ambiguous, that is, when a value for the given output pixel is not within a range of values defined by pixels vertically adjacent to the given output pixel or when a minimal difference among the respective differences is not unique.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: April 8, 2008
    Assignee: Thomson Licensing
    Inventor: John Kimball
  • Patent number: 7349030
    Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: March 25, 2008
    Inventors: Clyde H. Nagakura, Qinggang Zhou, Thomas M. Chan
  • Patent number: 7349029
    Abstract: A method for de-interlacing an interlaced video signal includes generating a per-field motion pattern set for a subject video field, where the motion pattern set comprises a same-parity motion pattern and an opposite-parity motion pattern pair, providing a plurality of progressive mode pattern pairs, where each progressive mode pattern pair is unique and characteristic of one of a plurality of progressive frame-to-interlaced field conversion techniques, and comparing the same-parity and opposite-parity motion pattern pair for the subject video field with each progressive mode pattern pair to determine whether the subject video field is derived from a progressive source and to identify the progressive frame-to-interlaced field conversion technique used. Based on the comparison, a field-merging de-interlacing technique or a per-pixel de-interlacing technique is utilized to de-interlace the subject field to produce a progressive video signal.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: March 25, 2008
    Assignee: Kolorific, Inc.
    Inventor: Chih-Hsien Chou
  • Patent number: 7345708
    Abstract: A method for deinterlacing a picture is disclosed. The method generally includes the steps of (A) determining a protection condition by performing a static check on the picture in a region around a location interlaced with a first field of the picture, (B) calculating an interpolated sample at the location by temporal averaging the first field with a second field in response to the protection condition indicating significant vertical activity and (C) calculating the interpolated sample at the location by spatial filtering the first field in response to the protection condition indicating insignificant vertical activity.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: March 18, 2008
    Assignee: LSI Logic Corporation
    Inventors: Lowell L. Winger, Yunwei Jia, Aaron G. Wells, Elliot N. Linzer, Simon Booth, Guy Cote
  • Patent number: 7336316
    Abstract: A method and apparatus are provided for deriving a progressive scan image from an interlaced image. In this, for each pixel to be inserted in the field from the interlaced image a difference value is derived from each pair of a set of symmetrically opposed pixels with respect to the pixel to be reconstructed and from adjacent lines to the pixel to be reconstructed. A determination is made as to which pair of pixels has the lowest difference value associated with it and the average value of this pixel is selected as a value of the pixel to be inserted.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: February 26, 2008
    Assignee: Imagination Technologies Limited
    Inventor: Paolo Guiseppe Fazzini
  • Publication number: 20080024671
    Abstract: An image display device and an image display method, in which the display position of an image frame on a display screen changes in order to enhance the image quality, are provided. The image display device according to the exemplary embodiment of the present invention includes a decoder that decodes an input image signal; and a frame display controller which alternately outputs the decoded input image signal and an image signal obtained by delaying the decoded input image signal by a predetermined number of lines of one frame. The display position of the image frame on the display screen may change so that the image quality of a low-resolution image or an image having excessive noise is enhanced.
    Type: Application
    Filed: April 3, 2007
    Publication date: January 31, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventor: Bong-geun Lee
  • Patent number: 7324709
    Abstract: An output pixel datum is produced from input pixel data by a method wherein the brightness levels of several input pixels closely associated coordinate-wise with the output pixel, are examined to determine whether a relatively less complex graphics-optimized scaling procedure, or a relatively more sophisticated video-optimized scaling procedure, should be carried out. In the second case, directional interpolation is performed with a plurality of directions, e.g., being considered to determine the direction of minimum brightness level gradient. A plurality of intermediate pixels, e.g., four, are produced, which are aligned perpendicularly to the minimum brightness level gradient direction, their brightness levels being determined from relevant input pixels using linear interpolation. The output pixel brightness level is determined from the intermediate pixels through the use of an appropriate filtering technique, e.g., polyphase FIR filtering.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: January 29, 2008
    Assignee: Pixelworks, Inc.
    Inventors: Zhongde Wang, Carmen Tseng
  • Publication number: 20070291170
    Abstract: An image resolution conversion method and apparatus based on a projection onto convex sets (POCS) method are provided. The image resolution conversion method comprises detecting an edge region and a direction of the edge region in an input low-resolution image frame in order to generate an edge map and edge direction information, generating a directional point spread function based on the edge map and the edge direction information, interpolating the input low-resolution image frame into a high-resolution image frame, generating a residual term based on the input low-resolution image frame, the high-resolution image frame, and the directional point spread function, and renewing the high-resolution image frame according to a result of comparing the residual term with a threshold.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 20, 2007
    Applicants: Samsung Electronics Co., Ltd., Industry-University Cooperation Foundation Sogang University
    Inventors: Seung-hoon Han, Seung-joon Yang, Rae-hong Park, Jun-yong Kim
  • Patent number: 7295246
    Abstract: In a picture signal processing circuit, in the case of converting picture signal data compliant with an analog video standard to a digital video format to obtain progressive data of a digital value, in a line which is included in a picture display period (active period=486 lines) of a digital progressive standard (e.g., the 40th to 525th lines in the second field) and which corresponds to a video display blank period of an analog progressive standard (e.g., the 40th to 42nd lines in the second field), the data is interpolated with data which is the same as the data obtained immediately after the start of a picture display period of the analog progressive standard (data of the 43rd line).
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: November 13, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Toshiki Tada
  • Publication number: 20070252912
    Abstract: A scaling engine, blending mechanism, memory controller, frame buffer and video driver are included within a semiconductor, such as a Field Programmable Gate Array (FPGA), to provide broadcasting of signals at a high resolution format by combining two or more low resolution video signals to create a high resolution signal in real-time High Definition format, such as 1080p. The high resolution signals can be concurrently displayed as one or more image areas on a display device in any contemplated size, number and arrangement.
    Type: Application
    Filed: April 24, 2007
    Publication date: November 1, 2007
    Inventors: Geno Valente, Mary Beth Valente
  • Patent number: 7286184
    Abstract: The invention relates to an information signal processor suitable for use in conversion of, for example, an SD signal. Pixel data sets are extracted selectively from the SD signal. Class CL is then obtained using the pixel data sets. A coefficient production circuit produces coefficient data sets Wi for each class based on coefficient seed data sets for each class and values of picture quality adjusting parameters, h and v obtained by user operation. A tap selection circuit selectively extracts the data sets xi of the tap corresponding to the objective position in the HD signal from the SD signal and then, a calculation circuit produces the pixel data sets of the objective position in the HD signal according to an estimation equation using the data sets xi and the coefficient data sets Wi.
    Type: Grant
    Filed: November 14, 2001
    Date of Patent: October 23, 2007
    Assignee: Sony Corporation
    Inventors: Tetsujiro Kondo, Yasushi Tatehira, Kei Hiraizumi, Nobuyuki Asakura, Takuo Morimura, Wataru Niitsuma, Takahide Ayata
  • Patent number: 7280154
    Abstract: A video processing system is presented that interleaves video data. In accordance with some embodiments of the present invention, data from a first field is placed in a frame and is augmented with pixel values in adjacent alternate rows of the frame with pixel values determined from the pixel values in the first field data and pixel values from the second field data.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: October 9, 2007
    Assignee: SigmaTel, Inc.
    Inventor: Chung Yi-Chen
  • Patent number: 7271840
    Abstract: Method for determining entropy of a pixel of a real time streaming digital video image signal, particularly applicable for identifying the origin of, and processing, in real time, pixels of interlaced, non-interlaced, or de-interlaced, streaming digital video image signals, and for correcting errors produced during editing of streaming digital video image signals. Based upon the fundamental aspect of determining the degree or extent of randomness or disorder, or entropy, and determining the fluctuation thereof, of each pixel relative to inter-local neighborhoods and intra-local neighborhoods of selected pixels originating from the streaming digital video image input signal. Automatically detects and identifies original mode of the video input signal (film movie, video camera, or graphics). Independent of type of mode conversion used for generating the original video input signal, and not based upon an ‘a priori’ type of pattern recognition method.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: September 18, 2007
    Assignee: Intel Corporation
    Inventor: Yosef Segman
  • Patent number: 7271842
    Abstract: A double-rate signal achieved by subjecting a video signal to double-rate conversion is supplied to a scan line number converter. In the converter, the portion of the effective scan lines of the double-rate signal is written into a frame memory on the basis of a signal achieved by multiplying horizontal and vertical synchronous signals based on the double-rate signal. In the effective scan line section of HDTV signal, the video signal written in the frame memory is read out on the basis of horizontal and vertical reference signals based on the HDTV signal. Out of the effective scan line section of the HDTV signal, a pedestal level signal written in a memory is read out on the basis of the horizontal and vertical reference signals based on the HDTV signal, thereby achieving HDTV signal whose vertical scan line number is equal to 1125 lines. Accordingly, the HDTV signal suffers no degradation because the video signal in the section of 960 effective scan lines of the double-rate signal is not interpolated.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: September 18, 2007
    Assignee: Sony Corporation
    Inventor: Ikuo Someya
  • Patent number: 7271841
    Abstract: A method for deinterlacing interlaced video using a graphics processor includes receiving at least one instruction for a 2D/3D engine to facilitate creation of an adaptively deinterlaced frame image from at least a first interlaced field. The method also includes performing, by the 2D/3D engine, at least a portion of adaptive deinterlacing based on at least the first interlaced field, in response to the at least one instruction to produce at least a portion of the adaptively deinterlaced frame image. Once the information is deinterlaced, the method includes retrieving, by a graphics processor display engine, the stored adaptively deinterlaced frame image generated by the 2D/3D engine, for display on one or more display devices. The method also includes issuing 2D/3D instructions to the 2D/3D engine to carry out deinterlacing of lines of video data from interlaced fields. This may be done, for example, by another processing device, such as a host CPU, or any other suitable processing device.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: September 18, 2007
    Assignee: ATl International SRL
    Inventors: Philip L. Swan, Edward G. Callway
  • Patent number: 7248784
    Abstract: When an input signal is signal-converted and is output, the copyright of a signal to be signal-converted is reliably protected. In an additional information detection/determination section, digital watermark information, CGMS information, etc., which are superposed on or added to an input luminance signal, are detected, and it is determined whether or not a signal which is to be signal-converted in a signal conversion section should be output on the basis of the detected additional information. When additional information for prohibiting or limiting copying has been superposed on or added to the input luminance signal, a switching circuit for output control is turned off so that the signal which is signal-converted in the signal conversion section is not output to the outside.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: July 24, 2007
    Assignee: Sony Corporation
    Inventors: Teruhiko Kori, Asako Fujii, Jun Hirai
  • Patent number: 7245326
    Abstract: A method for detecting an edge and generating an interpolated edge pixel at a target pixel position between two lines of an interlace scan image first determines gradient intensities in the horizontal and vertical directions and then calculates the angle of the edge by comparing the gradient intensities. The interpolated pixel value is calculated from samples in the interlace scan image that lie along the identified angle and are proximate to the target pixel position. The method represents the gradient strengths and the difference between them as bit strings; locates the most significant non-zero bit in the larger gradient value; divides the value of the corresponding bit position in the difference string, and a predetermined number of following positions, by increasing powers of 2; sums the results; subtracts the sum from 1.0 and uses the inverse tangent function to calculate the angle of the edge.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: July 17, 2007
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventor: Christopher J. Orlick
  • Patent number: 7236205
    Abstract: A scan line conversion circuit is provided for simultaneously carrying out three-dimensional motion adaptive sequential scan conversion and scan line conversion. The scan line conversion circuit comprises an FIFO memory into which the video signal is input; a sequential scan conversion circuit section for converting an interlace signal sent from the FIFO memory to a non-interlace signal; an address generator into which a vertical enlargement ratio and a synchronous signal are input to generate an address as a spatial position after scan line conversion; a memory control unit for generating a memory control signal based on the address sent from the address generator; a coefficient generator for generating a coefficient for performing scan line conversion; a plurality of first multipliers for multiplying sequentially scan converted signals, sent from the sequential scan conversion circuit section, by respective coefficients; and an adder for adding signals output from the multipliers together.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: June 26, 2007
    Assignee: Pioneer Corporation
    Inventor: Hiroshi Nagata