Abstract: Visible artifacts introduced into a digitally sampled video signal are removed from a non-interlaced version of the video signal. The non-interlaced version of the video signal is generated by a converter that converts a digitally sampled interlaced video stream to a non-interlaced video stream. An artifact removal module responds to at least a first component of the non-interlaced video stream by adaptively modifying the first component of the non-interlaced video stream to reduce artifacts introduced into the non-interlaced video stream by the converter to generate a modified non-interlaced video stream.

Abstract: Methods of interpolating missing pixels between interlaced scan lines is disclosed. A first method interpolates a desired pixel by selecting the median pixel from a first pixel above and to the left of the desired pixel, a second pixel above the desired pixel, a third pixel above and to the right of the desired pixel, a fourth pixel below and to the left of the desired pixel, a fifth pixel below the desired pixel, a sixth pixel below and to the right of the desired pixel, and a seventh pixel from the previous video field having same position of the desired pixel.

Abstract: There is provided a scanning line interpolation device which is capable of providing an interpolated image with increased reproducibility of vertical high-frequency components in a still picture part. Preceding-field image data is stored in a field memory, and thereafter reference pixels which are located in an interpolation pixel position and its surrounding positions and required for interpolation are extracted from the preceding-field image data stored in the field memory and current-field image data. An inter-field motion judgement portion detects whether or not there is a motion of an image between preceding and current fields based on the extracted reference pixels. If the inter-field motion judgement portion detects that there is a motion, a selection circuit selects in-field interpolation data calculated in an in-field interpolation value calculation circuit from the current-field image data among the reference pixels.

Abstract: An input image signal is converted into a digital form in an A/D converter 6 by clock pulses 53 from VCO 4 of a PLL circuit 1. The frequency of the clock pulses 53 is fixed. After the number of scanning lines is converted in a primary processing circuit 7, the digital image signal is written in field memory 10. The image signal is read out from the field memory 10 by second clock pulses 63 generated in a PLL circuit 11. A frequency divider 15 in the PLL circuit 11 is changed in frequency division ratio by a control signal. As a result, the sampling number in one horizontal period of the image signal read out from the field memory 10 is changed. Since the number of pixels in the effective image period of the image signal written in the memory is constant, by changing the sampling number in one horizontal period on the read-out side, the ratio of the effective image period relative to one horizontal period can be changed to adjust the horizontal size.

Abstract: A system provides real-time previsualization of effects to be added to high definition (HD) video data and real-time rendering of the HD video data including the added effects. The computer based system for editing high definition television (HDTV) resolution video includes a high definition video system connected to a standard definition video system and a high definition storage system. A resizer reformats the high definition video data to standard definition resolution for real-time processing and previsualization.

Abstract: For conversion of component (VGA) video to television, a hardware efficient process implements line rate vertical scaling within a single integrated circuit without the support of external memory. Scaling and filtering are combined into a single process which is a polyphase filter. The polyphase filter is a low pass filter with a fixed cut off frequency and a programmable delay. By changing the coefficients of the kernel of the polyphase filter, the scaled video signal is time shifted by fractions of the pixel clock. In one example, for every nine incoming horizontal video scan lines, eight lines are outputted thus accomplishing the vertical scaling. The vertical scaling may include a field buffer memory for accommodating a range of incoming video refresh rates, or in concert with special timing of incoming video, may omit the field buffer memory and instead use a one or two line FIFO memory.

Abstract: When a video signal is double-speed processed by the first device, a slight vertical deflection process is performed for redundant similar scan lines by the second device, and any slight deflection in the second device is controlled by the first device to thereby enable setting so as to always display images with excellent resolution. More particularly, a discrimination signal is generated by the first device to designate interlaced scanning and flag a need for vertical scan-line deflection, and such discrimination signal is provided to the second device such that the second device can always appropriately determine the need for vertical scan-line deflection. Through monitoring for the discrimination signal, an image display apparatus is capable of preventing vertical resolution from being deteriorated when video signals possibly requiring vertical line-shifting are inputted from an external source.

Abstract: A system processes an image containing a first line and a second line, where the first and second lines includes a plurality of pixels, to generate an interpolated line. The system selects a first and second set of pixels from the lines and generates a first set and second set of filtered values. The system identifies in the first line an edge location in the first set of the filtered values by a first filtered value of the first set of filtered values being at least one of less than and equal to a first predetermined value and a second filtered value of the fist set of the filtered values being at least one of greater than and equal to the first predetermined value.

Abstract: The generation of progressive output video from interlaced source video is disclosed. In one aspect of the invention, a computerized system includes an interlaced source video and a progressive output video. The interlaced source video has a number of lines and includes a first field having odd lines and a second field haveing even lines. The progressive output video has a number of lines half that of the number of lines of the interlaced source video. Each line of the progressive output video heavily weight weights a corresponding line of each of the first field and the second field of the interlaced source video. Desirably, each line of the progressive output video also lightly weights an immediately successive and an immediately preceding line of each of the first field and the second field of the interlaced video source.

Abstract: An image data format conversion apparatus comprises: a memory storing image data; a data reading means reading image data from the memory to output it; a format converting means converting the image data output from the data reading means to a predetermined format to output it or making the image data pass through without converting it; a vertical filter vertically interpolating the image data output from the format converting means by filtering operation to output the data or making the image data pass through without interpolating it; a horizontal filter vertically interpolating the image data output from the vertical filter by filtering operation to output the data or making the image data pass through without interpolating it; an image synthesizing means performing logic operation for image data output from the filter, and synthesizing the image data to output it; and an image output means outputting the image data from the image synthesizing means to a designated display unit.

Abstract: A video display apparatus includes a display device, resolution conversion unit, and display position setting unit. The resolution conversion unit converts the resolution of an input video signal into that of the display device. The display position setting unit sets the display position of a first video signal in each field to be displayed on the display device on the basis of the temporal relationship between a time from generation of a vertical sync signal to input of the first video signal and the generation timing of a horizontal sync signal.

Abstract: The invention concerns a device and a method for converting a first image signal that is comprised of plural pixel data into a second image data that is comprised of plural pixel data. In particular, according to the image converter and the image converting method of the invention, even if the image quality of the inputted image data is poor, it is able to extract the optimal pixel data as the class tap or the predictive tap, and to perform the adequate prediction processing, since clipping of the class tap or the predictive tap is controlled in response to the feature quantity that represents the quantity of fuzz of the inputted image data.

Abstract: The present invention relates to a scan converter with an interpolating function comprising: a plurality of frame buffers for dividing and storing video data of a first scan system and for reading the video data at a timing in accordance with a second scan system; and an interpolator for performing interpolation in the vertical direction for the video data read from the frame buffers.

Abstract: A system provides real-time previsualization of effects to be added to high definition (HD) video data and real-time rendering of the HD video data including the added effects. The computer based system for editing high definition television (HDTV) resolution video includes a high definition video system connected to a standard definition video system and a high definition storage system. A resizer reformats the high definition video data to standard definition resolution for real-time processing and previsualization.

Abstract: A display apparatus has a plurality of display scanning lines and supplies image signals for a number of image scanning lines less than the number of the plurality of display scanning lines to display elements controlled by the plurality of display scanning lines. The apparatus includes: storage member for storing image signals corresponding to a number of image scanning lines less than the number of the plurality of display scanning lines at least by an amount corresponding to one image scanning line; control member for reading image signals for one image scanning line stored in the storage member N times (an integer of 1 or more); and driving member for supplying image signals read N times by the control member to display elements controlled by N display scanning lines.

Abstract: An interpolation interval Vdp obtained by the picture sizes of the original picture and the converted picture is cumulated by an adder. In the odd field, a selector selects [0.5] as an offset corresponding to an odd/even field determination signal. In the even field, the selector selects [0] as an offset corresponding to the odd/even field determination signal. In a vertical blanking interval, the offset is selected as an output. Thus, in the odd field, the offset value [0.5] is added to the cumulated value of Vdp. Thereafter, Vdp is cumulated again. Corresponding to the cumulated value, a line read address n and linear interpolating coefficients qn1 and qn2 are obtained. When Vdp is cumulated, offsets corresponding to the scanning start points in the odd field and the even field are added. Thus, the interlace accuracy is kept.

Abstract: A video signal converter converts a video signal to a required form. The required form of the signal is the display format for displaying the signal. The input signal is converted to a digital signal and stored in a memory using the output of a first clock pulse generator synchronized to the horizontal synchronizing signal of the input signal. The digital signal is read out from the memory using the output of a second clock pulse generator synchronized to the vertical synchronizing signal of the input signal from a position specified by the controller. The output digital signal is then reconverted to an analog signal.

Abstract: Method and apparatus are disclosed for receiving an interlaced color video signal, and processing the signal to produce a progressively scanned video signal. An embodiment of the method of the invention includes the following steps: scan converting, by field combining and high pass filtering, the luminance component of the received signal, to obtain a progressively scanned high pass luminance component; deriving, from the luminance component of the received signal, a low pass luminance component; scan converting, by line rate conversion, to progressively scanned format, the chrominance components of the received signal and the low pass luminance component; and combining the progressively scanned low and high pass luminance components.

Abstract: A video down conversion system compliant with the Advanced Television Systems Standard (ATSC) includes a decoder which decodes a Main Profile, High Level (MP@HL) image and employs a downconversion processor to produce a standard definition video signal. The system stores a subsampled image in order to reduce memory requirements and employs an upsampling filter to generate reference image data from the stored. subsampled image. The reference image data spatially correspond to the image data produced by the video decoder before it is subsampled. The upsampling filter uses different filter coefficients based on the subsampling phase of the stored image and the half-pixel indicator in the motion vector which is used to locate the downsampled reference image data in the stored subsampled image.

Abstract: A video processing unit (13) that decodes compressed video data and resizes the image represented by the video data. The video processing unit (13) has two processing engines--a decoding engine (24) and a scaling engine (25), which share a memory (23). A memory manager (22) handles data requests from the two engines, and handles reading and writing of the memory (22).

Abstract: Telecine signal conversion method for converting an interlaced scan telecine signal generated by 2-3 pull-down system, wherein a picture of the first frame is converted into an interlaced signal of the first and second fields and a picture in the following second frame is converted into an interlaced signal in the third, fourth and fifth fields, into a progressively scanned telecine signal comprising steps of detecting a pull-down phase of the interlaced scan telecine signal, specifying the first and second fields based on the detected pull-down phase, composing picture signals of the specified first and second fields and generating progressively scanned telecine signals from the picture signals of the first and second frames, and specifying the third and fourth fields based on the detected pull-down phase, composing picture signals of the specified third and fourth fields and generating progressively scanned telecine signals from the picture signals of the third, fourth and fifth frames.

Abstract: A video signal processor interpolating lines in a vertical filter (24) in dependence on whether the lines are of a 625 line frame or a 525 line frame. The interpolated lines are filtered in a horizontal filter (26). The resultant lines are vertically and horizontally decimated by controlling the writing of the lines into a FIFO (28). A reduced size image is produced which has the same number of lines and pixels per line for both 525 and 625 line frames. The reduced size image is data compressed in a JPEG codec (50). The compression factor for a 525/60 signal is 6/5 of that for a 625/50 signal so the data rate per unit time is the same for both signals.

Abstract: A method or device for increasing the resolution of an image generates additional pixels in the image using interpolation. Various tests are performed for each additional pixel to determine whether conditions render the interpolation direction ambiguous or uncertain. In a television image, for example, an interpolation direction is derived for each additional pixel from a weighted combination of a vertical direction and a best-choice diagonal direction. If a potential interpolation condition cannot be determined with a high level of confidence, the weighted combination favors the vertical direction.

Abstract: An apparatus and a method for converting a video signal in the scanning line order.

Abstract: A versatile video transformation device and adaptive image processing methodology thereof to digitally scan convert, that is, reformat TV raster scan video and particularly high definition (HD) and/or digital DTV (particularly those for example in 1920.times.1080i or 1280.times.720p format) video data and associated synchronizing signals, for the purpose of making present standard television sets compatible at low cost with the latest advancements in free HD whilst allowing a multitude of other DTV programs and ancillary data to fill to a greater extent the remaining channel allocations by FCC to TV broadcasters.

Abstract: A multiple format video signal processing system operating in conjunction with a display device timing system to produce synchronized video and timing signals suitable for use by a fixed horizontal scanning frequency display device.

Abstract: A liquid crystal display system which can accept display data having a resolution different from that of a screen for the liquid crystal display and display the display data. For example, a CPU outputs display data of 1120.times.780 dots and a liquid crystal panel has a 1024.times.768-dot resolution which is smaller than the display data resolution. The display screen of the liquid crystal panel comprises a linear arrangement of pixels. A data conversion section generates display data for a new horizontal or vertical line based on display data for two horizontal or vertical lines contiguous to each other and repeats replacement of display data of the two lines with the display data of the one line for reducing the number of horizontal lines of one screen and the number of dots of one line so as to match the resolution of the display data output by the CPU with the liquid crystal display.

Abstract: For compatible transmission of a television picture having an aspect ratio of 16:9 within a 4:3 system, transmission is effected in the letterbox format in accordance with the PALplus system specification. The receiver reconstructs the original picture with the aid of vertical filters and is able, furthermore, to suppress crosstalk interference from the luminance signals in the chrominance signals. To further improve the picture quality, the picture is displayed at a frame frequency of 100 Hz. For this purpose, the picture supplied at 50 Hz with line interlacing must be converted to a frame frequency of 100 Hz. Known concepts for PALplus decoding and 100 Hz conversion carry out these processes separately and in doing so require a great deal of memory space.

Abstract: A delay register section 31 holds SD pixels of a luminance signal and a classification section 33 decides a class, reads a coefficient corresponding to the decision result from a coefficient RAM section 40, and outputs the coefficient to a product-sum section 38. The product-sum section 38 captures the pixel data for 17 taps from the delay register section 31, converts the pixel data into seven taps, and outputs them to the product-sum section 38. The product-sum section 38 performs the product-sum operation of pixel data and coefficients and outputs the operation result as HD pixels. An interpolation pixel operation section 42 applies a simple interpolation processing different from the case of a luminance signal to the pixel data of a color signal component to generate HD pixels of a color signal. Thus, downsizing and cost reducing can be realized.

Abstract: In arrangements for the frame rate upconversion of motion-picture-source video, a 60 Hz (interlaced field rate or progressive scan frame rate) television signal is converted to a form suitable for display on a variable-frame-rate high-resolution progressively-scanned monitor of the type typically associated with a computer or with a television set employing an increased frame rate. The inherent 3-2 motion picture film pulldown pattern in the source signal is changed to an equal time frame pattern, such as 3-3, 4-4, or 5-5, when the source signal is converted to a higher frame rate. This may be accomplished when the increased progressively-scanned video display frame rate is an integral multiple of the motion picture frame rate, namely 72 Hz, 96 Hz and 120 Hz.

Abstract: Video sources from a progressively scanned camera are processed so as to simulate a video source derived from motion picture film. The simulated film source video creates a distinctive "pseudo-film pattern," in which at least some of every SDTV video field has no motion or low motion with respect to corresponding picture areas of the SDTV video field paired with it (occasional rare camera-originated scenes result in a field in which the entire picture has high motion, breaking the pseudo-film pattern). Corresponding picture areas within the pairs of fields having no motion or low motion are merged, in the manner in which interlaced fields derived from the same motion picture frame are merged. Corresponding picture areas within the pairs of fields having high motion are subject to interlace-to-progressive scan conversion processing which is not purely a merger of fields.

Abstract: A one-line memory is provided for sequentially writing input picture data of one horizontal scanning line and for sequentially reading the written picture data. A plurality of expansion and contraction circuits are provided for increasing and decreasing the number of picture data of a plurality of sequentially inputted horizontal scanning lines. The expansion and contraction circuits produce picture data increased or reduced in line in dependency on coefficients. A picture memory is provided for storing the picture data from the expansion and contraction circuit.

Abstract: In a decoding/displaying device, the memory capacity or mapping to B pictures is set in consideration of a decoding waiting period, thereby avoiding the competition between a write-in operation and a read-out operation for a memory. Therefore, the decoding operation of coded picture data can be performed with no decoding waiting period.

Abstract: The present invention is embodied in an apparatus and method for converting a progressive video signal to an interlaced video signal from which the progressive video signal may be recovered. The invention is further embodied in an apparatus and method for converting such an interlaced video signal to a progressive video signal. A progressive-to-interlaced video converter includes a progressive video preprocessor and a converter. The progressive video preprocessor replaces at least one scan line in a video frame by its preceding or succeeding scan line. Alternatively, the preprocessor may assign a predetermined value to one or multiple scan lines at appropriate position(s) in a frame. In either scenario, each frame will carry at least one redundant scan line. The frame modification information will be encoded to an ancillary data section of a digital video stream.

Abstract: An ADRC circuit 3 generates spatial classes with SD data extracted by an area extracting circuit 2. A moving class determining circuit 5 generates a moving class with SD data extracted by an area extracting circuit 4. A class code generating circuit 6 generates a class code with the spatial class and the moving class. A tap decreasing ROM 7 supplies additional code data for each class code to a tap decreasing code 10. The additional code data is used to decrease taps of SD data. The tap decreasing circuit 10 decreases the SD data extracted by an area extracting circuit 9. A prediction calculating circuit 11 receives coefficient data corresponding to the class code from a ROM table 8 and obtains HD data with the decreased SD data corresponding to a linear prediction equation.

Abstract: A method of display unconversion wherein each output field line is interpolated from at least three input field lines from each of at least three input fields. By increasing the field rate by 1.5 (instead of simple field doubling) and by increasing the line rate by 1.5 (instead of simple line doubling) a substantial increase in picture quality can be achieved while maintaining data flow rates within manageable limits.

Abstract: An interlace to progressive scan video signal conversion system interpolates lines between respective lines of upper and lower fields which constitute an interlace-scan image frame to produce lines of a progressive-scan image frame. The produced lines have effective spatial and temporal positions between the respective lines of the lower field and the lines of the upper field. One line from the upper field is interpolated with two lines from the lower field which are immediately above and immediately below the one line in the interlaced frame in order to generate two lines for the progressive frame. Optionally, the interlace-scan to progressive-scan method is applied only to relatively low-frequency components of the luminance signal with the higher frequency luminance signal components being selected from one of the two interlaced fields and either line-doubled or interpolated and line-doubled before being added to the progressive-scan low-frequency luminance signal components.

Abstract: In a scan conversion method of generating an output video signal from an interlaced input signal, including the steps of furnishing (1) a first signal having first lines (F.sub.i (x-(0, 1).sup.T, n)) corresponding to original lines of the interlaced input signal, and second lines (F.sub.i (x, n)) in addition to the first lines (F.sub.i (x-(0, 1).sup.T, n)); and providing (5, 11, 7, 13) a second signal which is delayed or advanced with respect to the first signal, the second signal having first processed lines (F.sub.out (x-(0, 1).sup.T -D, n-1)) corresponding to the original lines, and second processed lines (F.sub.out (x-D, n-1)) corresponding to the second lines (F.sub.i (x, n)); output lines (F.sub.out (x, n)) of the output video signal are obtained in dependence upon a first difference between the first processed lines (F.sub.out (x-(0, 1).sup.T -D, n-1)) and the first lines (F.sub.i (x-(0, 1).sup.T, n)), and a second difference between the second processed lines (F.sub.

Abstract: A resolution conversion apparatus for a display device which converts input image signals to image signals having different resolution is provided. The resolution conversion apparatus for a display device can increase or decrease the number of scanning lines by using interpolation function to prevent the non-linear distortion due to the nonuniform insertion of scanning lines. The resolution conversion apparatus for a display device can also vary the interpolation function according to the frequency of image information to compensate the decrease of sharpness resulting from the conventional interpolation method using simple proportional values.

Abstract: In a liquid crystal display apparatus including a plurality of gate lines, a plurality of source lines, a plurality of liquid crystal pixels, and a gate line driving circuit, for driving the gate lines, the gate line driving circuit is formed by shift registers for shifting a vertical start pulse signal in response to a clock signal including first pulses and second pulses. Also, a circuit generates said first pulses at an interval of H/a where H is a time period of a horizontal synchronization signal and "a" is a positive integer. Further, a circuit generates the second pulses associated with "c" pulses of "a.multidot.b" successive ones of the first pulses where "b" and "c" are positive integers and "c" is smaller than "b".

Abstract: A video signal converter converts a first video signal into a second video signal by changing the number of scanning lines. A horizontal pulse synchronized with the first video signal is fed into a PLL circuit, which generates a first clock signal synchronized with the horizontal pulse. The first video signal undergoes A/D conversion by sampling with the first clock signal. The converter receives a first digital video signal which has undergone the A/D conversion, the first clock signal, the horizontal pulse, and a vertical pulse synchronized with the first video signal, and thus changes a number of scanning lines of the first video signal. The converter, next, writes a second digital video signal into a memory by synchronizing the first clock signal.

Abstract: An improved interpolation method in which a threshold value used for determining a pixel value of a pixel generated by interpolation according to a context which is a state value of adjacent pixels. In the interpolation method, the ambiguity between the interpolation value and the threshold value is removed by using the context, thereby reducing the blocking and smoothing phenomena in the restored binary image.

Abstract: An improved interpolation method in which a threshold value used for determining a pixel value of a pixel generated by interpolation according to a context which is a state value of adjacent pixels. In the interpolation method, the ambiguity between the interpolation value and the threshold value is removed by using the context, thereby reducing the blocking and smoothing phenomena in the restored binary image.

Abstract: A system (1) for enhancing the resolution of a video image by a predetermined enhancement factor is provided. System (1) generally includes an interpolation subsystem (10), a data storage module (20), and a pixel insert positioning module (30). Included within interpolation subsystem (10) are a classification module (100), a bilinear interpolation module (200), and an adaptive interpolation module (300). Classification module (100) receives the original image pixels in a specified field of the given video image and designates for each original image pixels it receives one of a plurality of predefined classifications. Based upon this classification, one of the bilinear interpolation (200) and adaptive interpolation (300) modules is selected for actuation in generating the supplementary image pixels necessary to support resolution enhancement.

Abstract: Off-line computation and recording is applied (via an under-powered processor) to the encoding, for bandwidth compression, of a high-resolution video signal. This technique permits more compute cycles to be applied to each frame than if the process were attempted to be accomplished in real time. Better compression ratios and/or better visual quality are, thus, achieved than if the process were attempted to be performed by the same processor in a real-time manner.

Abstract: An image data conversion processing device including an issue unit, plural line storing units and a generating unit for converting to a television signal image data stored in plural kinds of developing formats in a storing unit. The image data comprises plural lines, and the television signal comprises a predetermined number of lines. The issue unit issues a transmission instruction of image data to the storing unit in accordance with a period specified by a ratio of the number of lines of the image data to be converted and the number of lines of the television signal. The plural line storing units cyclically store the image data transmitted from the storing unit line by line on the basis of the transmission instruction of the issue unit.

Abstract: The present invention relates to a signal converter and a signal conversion method in which an interpolated image is formed on the basis of suitable classification according to features of an input image signal to obtain a high-definition image signal. In a frequency characteristic determination section, frequency characteristics of an input image signal are classified and evaluated with respect to each of predetermined unit blocks. On the basis of the result of this classification, the desired one of a plurality of pixel patterns is selected with respect to each of the unit blocks of the input image signal, thereby setting a spatial class. In a classification section, the input image signal forming the selected pixel pattern undergoes data compression processing by the number of quantization bits according to the frequency characteristics, thereby forming a spatial class after compression.

Abstract: A method of accurately detecting rapid motion as well as slow motion using two field memories in an interlaced-progressive scanning converter for changing an interlaced-scanned signal into a progressive-scanned signal. A threshold coefficient, which is used for comparison to a difference between temporal interpolation and spatial interpolation values to determine whether a picture is in motion, is determined dynamically in the disclosed method, rather than being a fixed, predetermined value. The threshold coefficient is determined based upon a degree of correlation between data of pixels above and below a pixel to be interpolated. Detection of whether the picture is stationary is based upon the difference between the data of pixels above and below the pixel to be interpolated is greater than a stationary coefficient. The threshold coefficient is maintained as being no less than the value of the stationary coefficient.

Abstract: In an image signal converting method and an image signal converting apparatus, it is possible to perform a proper classification considering various signal characteristics of input image data and convert low-resolution input image data to high-resolution image data by using not only a classifying means 56 for classifying input images in accordance with the level distribution pattern of the input images but also a classifying means 50 for classifying input images in accordance with the movement of the input images and deciding the final class D32 of input image signals by both CLASS0 and CLASS1 obtained by both classifying means 50 and 56.

Abstract: An input digital image signal (SD signal) is converted into a high resolution digital video signal (HD signal). A considered pixel is categorized as a class corresponding to a one-dimensional, two-dimensional, or three-dimensional level distribution of a plurality of reference pixels of the SD signal. A predicted value of the considered pixel is generated by linear combination of values of a plurality of pixels of the SD signal adjacent to the considered pixel of the HD signal and predicted coefficients that have been learnt. In the learning process, predicted coefficients are determined by linear combination of the values of pixels of the SD signal and the predicted coefficients so that the sum of squares of the predicted value and the true value is minimized. Instead of the predicted coefficients, representative values may be determined for each class. In this case, the representative values are used as predicted values corresponding to the class of the input SD signal.