Abstract: An image processing apparatus and control method are provided. The image preprocess apparatus includes an image receiver which receives an analog broadcasting signal; an image processor which converts the analog broadcasting signal into a digital broadcasting signal; and a filtering unit which selectively performs a low pass filtering on the analog broadcasting signal to filter a frequency higher than a preset frequency and transmits the selectively-filtered analog broadcasting signal to the image processor corresponding to a reception of the analog broadcasting signal by air.

Abstract: A method, and apparatus, and logic encoded in one or more computer-readable media to carry out a method. The method is to sample analog video at a sample clock rate and at a phase selected from a set of phases based on a quality measure determined from the sampled video. The quality measure is based on statistics of pixel to pixel differences in a coordinate of the generated digital video that have a magnitude exceeding a pre-determined threshold.

Abstract: An apparatus and method for equalizing analog TV signals includes an antenna that receives the signal data, wherein the signal data comprises a luminance carrier comprising a luminance channel and a chrominance carrier comprising a chrominance channel; an analog-to-digital converter coupled to receiving antenna that converts the received signal data to digital signal data; an instruction memory storing digital equalizer instructions; and a digital equalizer system, coupled to the memory and the analog-to-digital converter, wherein the digital equalizer system processes the digital equalizer instructions to estimate a noise variation of the luminance channel; equalize the luminance channel; and equalize the chrominance channel, wherein the equalization of the chrominance channel is separate and distinct from the equalization of the luminance channel.

Abstract: Methods of performing stroke-to-raster video conversion having leading-edge error correction and/or falling-edge error correction are provided. Incoming data is pipelined before being written into a frame buffer. This allows each sample of data to be manipulated based on information obtained in samples that occur both before and after it. Highly accurate digital conversion of stroke video into a raster format having significantly reduced or eliminated noise and stray pixels from the video is therefore achieved.

Abstract: A video receiving apparatus comprises a switch, an analog-to-digital converter (ADC), a video processing circuit and a decoder is provided. The ADC receives a first analog channel data from the switch within a plurality of first periods and receives a second analog channel data from the switch within a plurality of second periods, and output a digital video signal. The sampling frequency of the ADC is a plurality of times of a switching frequency of the switch. The video processing circuit includes a recovery circuit and a noise reduction circuit. The recovery circuit restores the digital video signal to a recovery video signal corresponding to a video format of the analog video signal. The noise reduction circuit reduces noises generated by the switch according to the digital video signal. The decoder outputs a display signal according to the analog video signal.

Abstract: A method of sampling phase calibration and a device thereof is suitable for an analog-to-digital converter and phase lock loop (ADC-PLL). The ADC-PLL conducts sampling on a periodic analog signal according to a sampling phase so as to produce a plurality of digital signals. The sampling phase calibration device includes a storage unit, a motion-detecting unit and a control unit. The motion-detecting unit is to calculate the number of motion data corresponding to a sampling phase. The control unit is coupled to the motion-detecting unit for changing the sampling phase so as to obtain the number of motion data corresponding to each sampling phase and selecting the sampling phase corresponding to the minimum number of motion data as an optimal sampling phase. The ADC-PLL can correctly sample an analog signal by using the optimal sampling phase and reduce the influence of clock jitter to the minimum.

Abstract: Disclosed herein is an analog television broadcast signal receiving apparatus including: a tuner section configured to convert an analog television broadcast signal into a predetermined intermediate frequency band signal; a demodulation circuit section configured to obtain a picture output signal and a sound intermediate frequency signal from the predetermined intermediate frequency band signal coming from the tuner section; a picture processing circuit section configured to convert the picture output signal into a display-ready picture signal; a sound demodulation processing circuit section configured to demodulate the sound intermediate frequency signal; and a control section.

Abstract: A method for improving image quality in an image processing device comprises receiving an image signal comprising a plurality of field signals corresponding to a plurality of fields, each field signal comprising a plurality of pixel signals corresponding to a plurality of pixels, and each pixel signal comprising an original chrominance value and a compensating chrominance value; replacing the compensating chrominance value of a pixel signal in every field signal by the original chrominance value of another pixel signal of a same position in another field signal, and generating a primary compensating result corresponding to every pixel signal; calculating a primary weighted sum of a pixel signal corresponding to every pixel and a primary compensating result corresponding to the pixel signal according to a degree of variation corresponding to every pixel of every field; and outputting the primary weighted sum corresponding to every pixel, to output primary compensating field signals.

Abstract: Pipeline analog-to-digital converters (ADCs) are commonly used for high frequency applications; however, operating at high sampling rates will often result in high power consumption or tight timing constraints. Here, though, an ADC is provided that allows for relaxed timing (which enables a high sampling rate) with low power consumption. This is accomplished through the use of multiplexed, front-end track-and-hold (T/H) circuits that sample on non-overlapping portions of a clocking signal in conjunction with “re-used” or shared analog processing circuitry.

Abstract: An adaptive gain and offset control for a digital video analog to digital converter is provided. A gain indicator and/or an offset indicator, which are used as inputs control signals to an analog-to-digital converter, are determined based on a detected maximum level and a detected blanking level from an input video signal. The gain and offset indicators may be determined independently from a minimum level of the video signal.

Abstract: Provided is a video signal processing device capable of judging the viability of phase locking at a PLL circuit and, in accordance with the judgment, automatically switching between the PLL circuit and a DLL circuit to use to generate a sampling clock of an input analog video signal, the device including an AD converter for AD converting an analog video signal, and a clock signal generating circuit for supplying a clock signal to the AD converter. The clock signal generating circuit includes: a PLL circuit for generating a first clock signal on the basis of a horizontal synchronous signal acquired from the analog video signal; a DLL circuit for generating a second clock signal on the basis of a composite synchronous signal acquired from the analog video signal; and a clock selecting portion for selecting and outputting either the first clock signal or the second clock signal on the basis of output of a PLL-dedicated phase comparator.

Abstract: A radio frequency front end for a television band receiver and spectrum sensor includes a low noise amplifier that amplifies a received signal output of a radio frequency antenna connected to the radio frequency front end, a pin diode attenuator circuit that selectively attenuates an output of the low noise amplifier, and a buffer amplifier that amplifies an output of the pin diode attenuator.

Abstract: A TV signal determining system utilized for determining a type of a TV signal includes: a detection unit, for utilizing a predetermined profile to detect if the TV signal has a signal segment corresponding to the predetermined profile to generate a detection result signal; and a determining unit, coupled to the detection unit, for determining the type of the TV signal according to the detection result signal. A TV signal processing system utilizing the TV signal determining system and a related method are also disclosed.

Abstract: Embodiments of the invention are generally directed to a multimedia I/O system architecture for advanced digital television. An embodiment of a multimedia system includes an I/O (input/output) control chip, the I/O control chip including one or more audio/video sub-processing engines for the processing of one or more data streams; a processing core chip for the processing of data, including audio/video data received from the I/O control chip; and one or more shared I/O channels for the transfer of data between the I/O control chip and the processing core chip.

Abstract: A portable multimedia playback apparatus is provided. The portable multimedia playback apparatus comprises a first video processing unit, a second video processing unit, a third video processing unit, a multiplexer, and a digital-to-analog converter (DAC). The first video processing unit generates a digital video signal. The second video processing unit processes the digital video signal to generate a TV compatible signal. The third video processing unit processes the digital video signal to generate a flat panel compatible signal. The multiplexer selects one of the TV compatible signal and the flat panel compatible signal. The DAC outputs an analog video signal after converting the selected signal.

Abstract: A digital image converting apparatus with auto-correcting phase and a method thereof are provided. The digital image converting apparatus includes a phase controller, a delay locked loop (DLL), an analog-to-digital converter (ADC) and a position adjuster. The phase controller selects one of preset phases for outputting and continuously changes the output preset phase for controlling a clock signal produced by the delay locked loop. The ADC converts an analog display frame according to the adjusted clock signal. After all the preset phases are output in sequence, the phase controller can obtain an optimal phase for converting the display frame according to the smallest front porch of horizontal scan line and the smallest back porch of horizontal scan line of a digital display frame produced by the position adjuster.

Abstract: A display apparatus including an analog-to-digital converter (ADC) module, a phase detecting module, and a clock generator is provided. The ADC module is used to receive a first analog video signal, and convert the first analog video signal into a digital signal according to a clock signal. The first analog video signal includes a first synchronous information and a first video information. The phase detecting module is used to receive the digital signal, and output a phase adjustment signal according to a part of the digital signal corresponding to the first synchronous information. The clock generator is used to output the clock signal according to the phase adjustment signal.

Abstract: An AV player chip includes a TV encoder, a timing controller, a multiplexer and a plurality of digital-to-analog converters. The TV encoder is used for transforming a first image signal into a TV video signal. The timing controller is used for generating an output signal. The multiplexer includes a first set of input ends coupled to the TV encoder, a second set of input ends coupled to the timing controller, a control end and a set of output ends. The multiplexer outputs the TV video signal or the output signal to the set of output ends according to a control signal received by the control end. The plurality of digital-to-analog converters are coupled to the set of output ends of the multiplexer for transforming the TV video signal into a first playing signal and for transforming the output signal into a second playing signal.

Abstract: The microscopic imaging apparatus includes a system controlling unit for obtaining a VD time setting value, and for obtaining the number of electric charge subtracting pulses, a synchronization signal generating unit for generating a vertical synchronization signal on the basis of the VD time setting value output from the system controlling unit and the horizontal synchronization signal, and a timing generating unit for extracting the electric charge of the imaging device by supplying the horizontal synchronization signal by the number of electric charge subtracting pulses to the imaging device as the electric charge subtracting pulses, and for generating a read pulse synchronous with the vertical synchronization signal in order to stop the accumulation of the electric charge of the imaging device after exposure is started.

Abstract: An analog television (TV) receiver converts a received analog TV signal to a digital TV signal and performs digital demodulation to increase demodulation efficiency. The analog TV receiver includes a radio frequency (RF) turner and an intermediate frequency (IF) circuit. The RF tuner converts the received analog RF TV signal to an analog IF TV signal. The IF circuit includes a converting circuit and a digital demodulator. The converting circuit converts the analog IF TV signal to a digital TV signal. The digital demodulator demodulates the digital TV signal to generate a digital demodulated video signal and a digital demodulated audio signal.

Abstract: A phase for an analog-to-digital converter sampling clock is determined. The analog-to-digital converter samples a video signal to generate pixel values. Differences of successive pixel values are compared to a threshold. The number of times the threshold is exceeded is counted for multiple phase values to create a phase profile. The threshold may be dynamic.

Abstract: The invention relates to systems and methods for calibrating an analogue video interface. Due to the lack of pixel clock signal (206) information in the video-handling unit, a sample clock signal (202) needs to be generated, which should correspond with the unknown pixel clock signal (206). The types of signals transmitted to the video-handling unit may correspond with strange display formats and no up-front information may be present. The present invention provides methods and systems for automatic calibration of an analogue video interface. These are based on obtaining an analogue video signal (208) that is based on a pixel clock signal (206), generating a sample clock signal (202) having a first frequency by means of a PLL feedback divider having a value, determining a phase-relation between the video signal (208) and the sample clock signal (202) and evaluating the phase-relation to determine if the correct sample clock signal (202) is generated.

Abstract: A video signal processing system including a digital signal processing (DSP) module, a digital offset module coupled to the DSP module, a gain module, and a digital to analog converter (DAC) coupled to the DSP module and to the gain module, wherein the DAC is configured to cause the gain module to provide multiple gain signals having predetermined first values to the DAC, cause, for each of the multiple gain signals, a digital input signal value to the DAC to be ramped up, determine, for each of the multiple gain signals, a lowest digital input signal value that causes an output voltage of the DAC to be at least as high as a reference voltage, and determine a second gain value that will cause the DAC to provide a desired DAC output voltage in response to the DAC receiving a reference DAC input value.

Abstract: A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a function of columnar location. The sampling clock frequency is changed by an amount dependent on the period of the columnar differences. A second measure of the difference between successive frames is computed for a sequence of clock phases. The frequency of the clock is verified using a characteristic of the second measure. The characteristic can be the ratio of the maximum to the minimum of the second measure over selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.

Abstract: A television receiving system is disclosed, comprising an input terminal, a down-converter, an amplifier, an analog-to-digital converter (ADC), a demodulator, and an isolation circuit. The input terminal receives an RF signal. The down*converter, coupled to the input terminal, converts the RF signal to an intermediate frequency (IF) signal. The amplifier, coupled to the down-converter, amplifies the IF signal. The analog-to-digital converter, coupled to the amplifier, converts the amplified IF signal to digital data. The demodulator, coupled to the ADC, processes the digital data to generate baseband data. The isolation circuit, coupled between the amplifier and ADC, isolates the amplified IF signal from being affected by interference induced by the ADC.

Abstract: A method and system of automatically correcting a sampling clock in a digital video system are disclosed. Sampling clocks with different phases are generated and subjected in turn to analog-to-digital conversion (ADC). A difference of at least a pair of neighboring data out of the ADC with respect to each phase is determined. A maximum difference is determined, and the sampling clock with the phase corresponding to the maximum difference is thus generated.

Abstract: An adjacent color difference data generator calculates a differential between adjacent data in a data row having different color information per pixel of the digital signal to thereby generate a first color difference data having a first code format. A code converter converts the first color difference data into a second color difference data having a second code format. The second code format is a code format where only a small number of bits change before and after the code conversion from the first code format. The number of changing bits in the switching between codes when, for example, an image monochromatic but having gradation change is imaged to reduce any noise generated when digital image data is outputted.

Abstract: A read signal processor includes an output unit that serializes a plurality of bits of digital data for each of the colors to obtain a plurality of serial signals, converts the serial signals to a plurality of low-amplitude differential signals, and outputs the serial low-amplitude differential signals.

Abstract: An electronic device and a corresponding managing method include arranging a plurality of cameras into two camera groups, and setting a switch interval. A plurality of analog to digital converters (ADCs) in the electronic device uses first channels to acquire a first image and a second image from each camera from a first camera group. If the second image matches the corresponding first image of each camera in the first camera group and the switch interval elapses, the first channels of the ADCs are switched to second channels to acquire images from each camera in a second camera group.

Abstract: An image signal processing apparatus includes a clamp circuit that clamps an image signal having a horizontal synchronization signal, an optical black level period representing an optical black level, and an effective signal period representing an image signal for one horizontal line so as to clamp a value offset from the image signal on the basis of a first reference value during the optical black level period and to clamp the image signal on the basis of a second reference value different from the first reference value during the effective signal period, and a level computation circuit that determines the second reference value on the basis of a signal level clamped during the optical black level period.

Abstract: An optical device is capable of controlling a projector, wherein the projector is capable of wirelessly receiving an image signal from a data source, combining an identification signal into the image signal to generate a projection signal, and projecting a projection image according to the projection signal. The optical device includes an optical sensor. The optical sensor is capable of sensing the identification signal of the projection image, outputting a detection signal corresponding to the identification signal and wirelessly transmitting the detection signal to the projector. A projection system including a projector and an optical sensor is provided as well.

Abstract: A gain control circuit includes an automatic gain controller (AGC), an analog-to-digital converter (ADC), a saturation field detecting block, a sync detector and a gain control block. The AGC controls amplitude of an analog image signal including a luminance signal, a color signal and a sync signal. The ADC converts the amplitude-controlled analog image signal to a digital image signal. The saturation field detecting block determines on a per field basis whether the digital image signal is saturated. The sync detector is configured to detect the sync signal in the digital image signal. The gain control block provides a gain control signal to the AGC based on an output signal of the saturation field detecting block and an output signal of the sync detector. Therefore, the gain control circuit may prevent saturation of the analog image signal by controlling gain of the analog image signal.

Abstract: An apparatus and a method for adaptive filtering includes an antenna that receives analog video broadcast signal data; an analog-to-digital converter coupled to the antenna and converting the received analog video broadcast signal data to digital video signal data; a frame buffer memory storing the digital video signal data; an instruction memory storing adaptive filtering instructions; and an adaptive filter coupled to the memory and the analog-to-digital converter, wherein the adaptive filter: reads the adaptive filter instructions from the memory; executes the adaptive filter instructions; averages an input pixel with a corresponding pixel stored in the frame buffer memory; calculates a forgetting factor for each pixel in the plurality of pixel values stored in the frame buffer memory; and filters noise from each pixel of the plurality of pixel values stored in the frame buffer memory based on the forgetting factor.

Abstract: An apparatus and method for equalizing analog TV signals includes an antenna that receives the signal data, wherein the signal data comprises a luminance carrier comprising a luminance channel and a chrominance carrier comprising a chrominance channel; an analog-to-digital converter coupled to receiving antenna that converts the received signal data to digital signal data; an instruction memory storing digital equalizer instructions; and a digital equalizer system, coupled to the memory and the analog-to-digital converter, wherein the digital equalizer system processes the digital equalizer instructions to estimate a noise variation of the luminance channel; equalize the luminance channel; and equalize the chrominance channel, wherein the equalization of the chrominance channel is separate and distinct from the equalization of the luminance channel.

Abstract: A portable multimedia playback apparatus is provided. The portable multimedia playback apparatus comprises a first video processing unit, a second video processing unit, a third video processing unit, a multiplexer, and a digital-to-analog converter (DAC). The first video processing unit generates a digital video signal. The second video processing unit processes the digital video signal to generate a TV compatible signal. The third video processing unit processes the digital video signal to generate a flat panel compatible signal. The multiplexer selects one of the TV compatible signal and the flat panel compatible signal. The DAC outputs an analog video signal after converting the selected signal.

Abstract: The present invention relates to a method for time base correction during generation of a digital video signal from an analog input video signal, and to an apparatus having means for digitizing an analog input video signal using such method. According to the invention, the method includes the steps of: receiving an analog video signal; generating a digital video signal from the analog video signal with a video decoder; storing at least a part of the digital video signal in a memory; detecting a portion of corrupt data having an abnormal field ordering in the digital video signal; either discarding the portion of corrupt data or replacing at least a part of the portion of corrupt data with previous data stored in the memory; and outputting the digital video signal.

Abstract: A solid-state image pickup device and a camera system in which: (1) counters are organized into a counter group and a memory group on a column-by-column basis; (2) in each column, the individual counters are cascade-connected between individual bits; (3) switches are provided at bit output portions of the individual counters; (4) connecting sides of the individual switches are commonly connected to a column-signal transfer line, and output sides of the switches are shared with the other individual bits; (5) inputs of memories (latch circuits), which store digital data for horizontal transfer, share the column-signal transfer line; and (6) outputs of the memories corresponding to the individual bits are connected via switches to data transfer signal lines wired so as to be orthogonal to the column-signal transfer line.

Abstract: According to one embodiment, a receiving device includes an amplifier for amplifying signals received from the outside, a decimation filter for decimating signals converted to digital signals, a channel selection filter for selecting a desired wave included in signals from the decimation filter, and a DAGC for amplifying the desired wave selected by the channel selection filter.

Abstract: A system and method for downscaling signal data, where the system includes an antenna receiving video signal data; an analog-to-digital converter coupled to the antenna and converting the received analog signal data to digital signal data; a memory storing video downscaling instructions; and a video downscaling processor, coupled to the memory and the analog-to-digital converter, wherein the video downscaling processor, upon reading the video downscaling instructions from the memory and executing the downscaling instructions: divides the digital video signal data into a plurality of blocks, wherein each block comprises a plurality of pixel elements; and cycles through the plurality of blocks, and for every block in the plurality of blocks, generates a new block, wherein the new block comprises a plurality of new pixels evenly spaced within the new block.

Abstract: A digital video system (2) is disclosed, in which an analog input video signal is sampled at an optimum sample phase (Pnc), and converted to a digital datastream for display. A phase-locked loop (12) generates a plurality of sample clock phases. One of the sample clock phases (Pnc) is applied to an analog-to-digital converter (10), which digitizes the analog input video signal accordingly. Phase alignment circuitry (20) is provided that includes three sample-and-hold circuits (22b, 22c, 22a) that sample the analog input video signal, in parallel with the analog-to-digital converter (10), at times before, at, and after the current sample clock phase used by the analog-to-digital converter (10). The earlier and later sampled voltages are compared against the current sampled voltages to generate difference voltages that are each compared against a threshold voltage (Vthr).

Abstract: A system and method for correcting so-called “lip sync” errors is provided, using a synchronization test signal comprising a video signal including a colorbar signal that is periodically interrupted by a series of consecutive defined black frames and an audio signal comprising a tone periodically interrupted by a period of silence beginning at the same time as the first of the series of consecutive defined black frames. The synchronization test signal is configured to survive encoding, decoding, conversion, and compressing processes used in a typical digital broadcast system environment and thus provide a means of measuring the relative audio and video timing of a processed signal.

Abstract: Disclosed herein is a transmission system including a digital transmission path configured to transmit a digital video signal outputted from an imaging apparatus to a processing apparatus that executes one of processing and relaying of a video signal received from the imaging apparatus, an analog transmission path configured to transmit an analog reference signal outputted from the processing apparatus to the imaging apparatus, a command superposing block in the processing apparatus configured to superpose, at an analog level, each bit of command data for commanding the imaging apparatus in other than a section in which a synchronous signal component of the reference signal is included, a digital conversion block configured to digitally convert an analog-level signal of each bit of a command included in a reference signal received via the analog transmission path in the imaging apparatus, and an imaging control block configured to control an imaging operation.

Abstract: A signal conversion apparatus which converts an input signal x from an image sensor into an output signal y by a function relation represented by Expression 1: y=f(x)=?bx[1/r(?)]d???(1) where b is a predetermined constant, ? is an integration variable corresponding to a value of the input signal x, and r(?) is a quantization step function before removal of a noise of the input signal x, which determines an increment of the input signal x to an increment of the output signal y.

Abstract: A video apparatus has a digital encoder which receives a first analogue video signal with ancillary information in a given time window and generates on an output a digital stream based on the first analogue video signal. A digital decoder is connectable to this output to generate a second analogue video signal. A switch selects between the first analogue video signal and the second analogue video signal as an output depending on a control signal based on the occurrence of said time window.

Abstract: In accordance with various aspects of the disclosure, a method and apparatus for receiving multiple channels from a broadcast source and interfacing to multiple demodulators within a common silicon implementation is disclosed. A receiver apparatus is disclosed that may aggregate multiple channels output by multiple tuners into at least one composite signal. The at least one composite signal may be passed to a single ADC. The channels may then be extracted from the at least one composite signal in the digital domain prior to demodulation in separate demodulators.

Abstract: A video signal converting device is capable of converting an analog composite signal into a proper digital signal with a small delay even if the analog composite signal contains much jitter. The video signal converting device has a sampling clock output unit for outputting a sampling clock signal having a frequency which is 4n times the frequency of a burst signal contained in the analog composite signal (n represents a positive integer of 2 or greater), and an analog-to-digital converting unit for converting the analog composite signal into a digital signal based on the sampling clock signal output from the sampling clock output unit.

Abstract: A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling an analog signal. A circuit corrects the clock frequency using a period of a columnar frame differences as a function of columnar location. The sampling clock frequency is changed by an amount dependent on the period of the columnar differences. A second measure of the difference between successive frames is computed for a sequence of clock phases. The frequency of the clock is verified using a characteristic of the second measure. The characteristic can be the ratio of the maximum to the minimum of the second measure over selected clock phases. Other characteristics can be used such as a difference of a maximum and a minimum measure.

Abstract: A modularized broadcast receiver driver architecture includes one or more control nodes, under control of a network module, that perform a series of one or more functions to receive a broadcast signal and extract content information from the signal. None of the multiple control nodes requires knowledge of the network type via which the signal is being received. Rather, a network module is aware of the network type and configures the control nodes to carry out their respective functions.

Abstract: A portable media encoder is disclosed. The portable media encoder comprises a video input port configured to receive a video input from a video source, an audio input port configured to receive an audio input from an audio source, and a digital output port for providing a digitized output stream corresponding to the received video input and audio input. The encoder has an encoding processor that converts the video input and the audio input into a streamable digital output format for transmitting through the digital output port, a set of control buttons communicatively coupled to the encoding processor and operable to provide encoding parameters to thereto, and a housing enclosing the encoding processor and providing at least one access panel providing user access to the video input port, the audio input port, the digital output port, and the set of control buttons. The housing having a size and configuration that allows the encoder to be hand carried by a single individual.

Abstract: A video signal processing circuit, in which a horizontal synchronizing signal is separated from an input analog video signal by a synchronism separating circuit, whether a “H” period of the horizontal synchronizing signal continues for more than a prespecified period of time or not is checked by a synchronizing signal monitoring counter, and power supply to an A/D converter is controlled thereby according to a result the confirmation.