Specifics Of The Amplifier Patents (Class 360/67)
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Patent number: 6320713Abstract: A reference current and resistance is used to determine a reference voltage. A variable current is then applied to the MR read head, and is adjusted to produce a voltage equal to that of the reference voltage. Then, the known current and voltage is used to determine the resistance of the MR read head.Type: GrantFiled: September 14, 1999Date of Patent: November 20, 2001Assignee: International Business Machines CorporationInventors: Larry LeeRoy Tretter, James Ernest Malmberg
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Patent number: 6320714Abstract: An apparatus and method for determining the configuration of a disc drive head-disc assembly (HDA). The HDA includes an array of rotatable discs and an actuator adjacent the discs, with the actuator supporting a maximum number of heads in a fully populated configuration and a reduced number of heads in a depopulated configuration. Each head is disposed at a unique head position. A servo circuit determines an impedance of a selected head position having a head when the disc drive is fully populated but not when the disc drive is depopulated. The servo circuit identifies this configuration of the HDA in relation to the determined impedance, and initializes the drive accordingly.Type: GrantFiled: July 13, 1999Date of Patent: November 20, 2001Assignee: Seagate Technology LLCInventors: John E. Moon, Timothy T. Walker, Paul F. Kusbel, Robert Matousek
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Patent number: 6317862Abstract: A preamplifier chip for a disk drive is modular in layout. Twelve head cells for the preamplifier chip are not lined along the periphery of the chip, but rather are disposed in an array including four rows of three head cells each. The rows are all directed perpendicular to the side with control connection pads. The preferred embodiment allows for a smaller preamplifier chip through increasing the density of head cells on the chip relative to the periphery of the chip usable for head cell connection. The array spaces write portions of the head cells in four spaced lines, minimizing problems associated with heat build up. Spacing between rows of the array can be determined to take maximum advantage of lead pitch on the flex circuit. Modification of the design to a chip for eight or four channels is possible with minimal changes to the design, and minimal reworking of the common circuitry.Type: GrantFiled: August 16, 1999Date of Patent: November 13, 2001Assignee: Agere Systems Guardian Corp.Inventors: Daniel J. Dolan, Jr., Scott K. Glenna, Charles P. Jents
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Patent number: 6313961Abstract: A method and apparatus for calibrating the components of a Partial Response Read Channel (PRML) integrated circuit utilized in a magnetic storage device including a channel quality circuit, incorporated within the read channel IC, for automatically measuring the performance of each component as data is read by the channel. An error measurement for each component is generated as an indicator of the component's performance, such as a sample error generated by measuring the difference between the samples read by the channel and expected samples. The read channel components are programmed over a range of settings to determine the settings that generate the minimum error. By programming the components with settings corresponding to minimum error rates, the read channel is optimized.Type: GrantFiled: January 5, 1996Date of Patent: November 6, 2001Assignee: Cirrus Logic, Inc.Inventors: Alan J. Armstrong, Renee E. Wallerius, Richard T. Behrens, Charles J. Duey
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Patent number: 6307699Abstract: A system and method for selecting between two biasing modes for biasing magneto resistive heads in a disk drive. A mode selector selects either a voltage biasing circuit or a current biasing circuit to supply the bias voltage or bias current, respectively, to a magneto resistive head. The selection can be based on changes in parameters in the disk drive or magneto resistive heads during disk drive operation.Type: GrantFiled: November 4, 1998Date of Patent: October 23, 2001Assignee: STMicroelectronics, Inc.Inventors: Giuseppe Patti, Axel Alegre de La Soujeole
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Patent number: 6304396Abstract: An arrangement is disclosed for reading information from a record carrier. The arrangement comprises a read head having at least one magneto-resistive element (Rmr), a first transistor (Tr1) and a second transistor (Tr2). The base of the first transistor (Tr1) is coupled to the emitter of the second transistor (Tr2) via a first capacitor (6). The base of the second transistor (Tr2) is coupled to the emitter of the first transistor (Tr1) via a second capacitor (8). The arrangement further comprises a non-linear transconductance amplifier (14) having first and second inputs coupled to the output terminals (10,12) of the arrangement, and having and inverting and non-inverting outputs coupled to the bases of the first and second transistor.Type: GrantFiled: February 1, 1999Date of Patent: October 16, 2001Assignee: U.S. Philips CorporationInventors: Joao N. V. L. Ramalho, Johannes O. Voorman, Patrick Leclerc, Jozef A. M. Ramaekers, Marcel L Lugthart, Johannes W.M. Bergmans
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Patent number: 6304401Abstract: A magnetic reproducing apparatus uses a magnetic head to read data recorded on a magnetic recording medium. The signal reproduced by the magnetic head is, in a reading circuit, amplified by an amplifier circuit. A compensation circuit compares the bias voltage across the magnetic head with a reference voltage to detect variation in the bias voltage and compensates for the variation in accordance with the detection result. In the magnetic reproducing apparatus, the amplification factor of the amplifier circuit is set by a control signal fed in via a single switching terminal, and the reference voltage is set in a manner interlocked therewith.Type: GrantFiled: July 26, 1999Date of Patent: October 16, 2001Assignee: Rohm Co., Ltd.Inventor: Yujiro Okamoto
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Patent number: 6304403Abstract: A read/write preamplifier circuit is provided that includes a fault detecting circuit that detects when two or more read/write preamplifiers are concurrently selected for communicating with their associated data heads and means for notifying the drive controller of that condition. In one embodiment of the invention, the means for notifying the drive controller that two or more preamplifiers are concurrently selected includes a data storage register that is readable by the drive controller and that has a fault flag which is set when two or more preamplifiers are concurrently selected. Also, in one embodiment, the fault detecting circuit includes a fault-detect transistor that drives a predetermined current if the preamplifier is elected. The collectors of the fault-detect transistors of each preamplifier are electronically coupled to each other and to a sensing circuit that senses if the fault-detect transistors of two or more preamplifiers are concurrently driving the predetermined current.Type: GrantFiled: July 1, 1999Date of Patent: October 16, 2001Assignee: Seagate Technology LLCInventor: Stefan A. Ionescu
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Patent number: 6292317Abstract: The present invention is directed to the high speed detection of flaws in a disk drive. In one embodiment, a preamplifier simultaneously receives and processes read signals provided by multiple heads reading a test pattern from multiple disk surfaces to detect flaws in the multiple disk surfaces. In another embodiment, a preamplifier simultaneously provides a write signal to multiple heads that simultaneously write a test pattern to multiple disk surfaces. A further embodiment reduces the time needed to detect flaws by writing a test pattern during servo track writing.Type: GrantFiled: September 2, 1999Date of Patent: September 18, 2001Assignee: Maxtor CorporationInventor: James C. Alexander
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Patent number: 6292321Abstract: A drive circuit for a magnetic recording device is provided in which the stray capacitance and stray inductance of the peripheral wiring of the drive circuit is reduced. Also, the drive circuit increases the read/write frequency of data and the recording density of the magnetic recording device. Specifically, the drive circuit contains a write driver, a read preamplifier, a write predriver, a read postamplifier, and a current signal detecting circuit. The write driver inputs write data and outputs a corresponding writing current to a write head to store information onto a magnetic disk. The read preamplifier supplies a bias current to a read magnetic head to sense information stored on the magnetic disk and amplifies the information as output data. The write predriver inputs a write data signal via a data signal line and a write mode signal and supplies the write data to the write driver based on the write mode signal.Type: GrantFiled: June 26, 1998Date of Patent: September 18, 2001Assignee: NEC CorporationInventor: Shigekazu Miyake
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Patent number: 6282038Abstract: An apparatus and method for estimating an amplitude of a readback signal obtained from a data storage medium and input to a gain modifying amplifier involves sensing an amplifier output signal in response to a readback signal applied to the amplifier. An amplifier control signal is produced which is representative of a difference between the amplifier output signal and a reference signal. A compensation signal associated with a temperature coefficient of amplifier gain is generated, and an estimate signal indicative of the amplitude of the readback signal is produced using the compensation signal. The estimate signal is representative of readback signal amplitude when the estimate signal has a magnitude equivalent to that of the difference signal and a polarity opposite that of the difference signal.Type: GrantFiled: February 19, 1999Date of Patent: August 28, 2001Assignee: International Business Machines CorporationInventors: Anthony Richard Bonaccio, Rick Allen Philpott, Peter John Windler, Gregory Scott Winn
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Publication number: 20010015867Abstract: Sense current is applied in pulses, synchronized with the timing clock generated by a clock generator 5, to transducer 2 in the information storage device, reducing the time-averaged value of the sense current. The recorded information on the magnetic disk medium 1 is reproduced by the MR head as reproducing signal pulses in synchronism with the above timing clock. The amplitude of the reproducing signal pulses are proportional to the magnetic field of the magnetic disk medium 1. The reproducing signal pulses are sample-held by a sample-hold circuit 6, and after being digitized by an A/D converter 7, recorded data are retrieved through a demodulator circuit 8 of a partial-response system.Type: ApplicationFiled: February 18, 1998Publication date: August 23, 2001Inventors: NORIAKI HATANAKA, TADAHIKO KAMEYAMA, TAKESHI MAEDA
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Patent number: 6275347Abstract: A read system for reading information from a storage medium and for providing an output signal to circuitry external from the read system is disclosed. The read system includes individual channel circuitry, a bias current generator for providing a bias current to the read system, and preamplifier circuitry connected between the bias current generator and the individual channel circuitry. The individual channel circuitry further includes a first and a second magnetoresistive element, a first and a second transistor, and a first and a second switch. The preamplifier circuit further includes a first and a second capacitor connected between a low potential and the first and second switches, respectively, and a third capacitor connected between the first and second capacitors. The preamplifier also includes a first and a second operational amplifier having an output connected to a base of the first transistor and a base of the second transistor.Type: GrantFiled: April 2, 1999Date of Patent: August 14, 2001Assignee: Agere Systems Guardian Corp.Inventors: Tuan V. Ngo, John D. Leighton
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Patent number: 6271977Abstract: A multi-state preamplifier having a first detector and a second detector provides voltage-sensing and current-sensing signal amplification, respectively. Either the first detector or the second detector is selected and switched active at any given time, producing an amplified signal representing either the signal voltage developed across the MR element or the signal current flowing through the MR element, respectively. The switching process to activate either the first detector or the second detector is carried out by a detector determining circuit connected to a disk drive control unit. The detector giving the optimum high frequency bandwidth for the preamplifier is chosen based on the resistance of the MR element coupled with the input interconnect network characteristic and parasitic impedances.Type: GrantFiled: February 16, 1999Date of Patent: August 7, 2001Assignee: International Business Machines CorporationInventors: Paul Wingshing Chung, Stephen Alan Jove
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Patent number: 6268974Abstract: Apparatus and method for selecting an optimum gain for an amplifier used to amplify readback signals transduced from a magnetic recording disc in a disc drive. The amplifier is provided with a first value of gain, which is used to amplify a readback signal to generate an amplified readback signal. The amplified readback signal is in turn applied to an automatic gain control circuit comprising a variable gain amplifier. The variable gain amplifier applies a variable gain from a selected range to the amplified readback signal to maintain an amplitude of an output signal provided by the automatic gain control circuit at a nominal amplitude. The acceptability of the first value of gain for subsequent use by the amplifier is determined in relation to a magnitude of the variable gain applied by the variable gain amplifier.Type: GrantFiled: July 13, 1999Date of Patent: July 31, 2001Assignee: Seagate Technology LLCInventors: Brett A. Sloan, Paul F. Kusbel, John E. Moon, Tim Walker
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Patent number: 6268972Abstract: A method for measuring an amplitude of a readback signal obtained from a data storage medium involves transmitting the readback signal to a gain modifying amplifier, such as a variable gain amplifier (VGA), preferably provided in the read channel. A voltage signal associated with a loop gain of the amplification circuitry is sensed and compared with a number of control voltage signals, each of the control voltage signals being associated with a corresponding digital word value. The digital word value associated with a control voltage signal that is equal to the sensed voltage signal represents the relative amplitude of the readback signal. Gain characterization circuitry may further be combined with readback signal amplitude measuring circuitry, preferably in-situ a read channel, to obtain the absolute amplitude of a readback signal.Type: GrantFiled: September 18, 1998Date of Patent: July 31, 2001Assignee: International Business Machines CorporationInventors: Rick Allen Philpott, Gregory Scott Winn
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Publication number: 20010007517Abstract: A semiconductor integrated circuit device for a magnetic disk apparatus has analog circuits such as a read/write circuit and digital circuits such as an interface driver circuit, a control circuit, and a stepping motor driver circuit, all of these circuits operating on a single supply voltage. The semiconductor integrated circuit device further has a voltage regulator whose output voltage is lower than the supply voltage and variable according to the voltage applied to an output voltage adjustment terminal. The control circuit operates on the output voltage of this regulator.Type: ApplicationFiled: February 15, 2001Publication date: July 12, 2001Applicant: Rohm Co. Ltd.Inventor: Akio Fujikawa
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Patent number: 6259573Abstract: A preamplifier circuit to improve the ESD immunity of magnetic recording devices having magnetoresistive (MR) sensors, without degrading the sensor's high-frequency characteristics. The preamplifier circuit is coupled to an MR sensor having one terminal grounded. The preamplifier circuit includes a varistor coupled between a power supply line and a ground terminal. If a high voltage, exceeding the varistor voltage, is applied to the chassis (ground), it is discharged through the varistor between the power supply voltage line and the ground terminal, instead of through the MR head or the arm electronics module. The present invention thereby protects the MR head and the arm electronics module from ESD damage.Type: GrantFiled: February 22, 1999Date of Patent: July 10, 2001Assignee: International Business Machines CorporationInventors: Kazushi Tsuwako, Yoshiro Amano, Takao Matsui, Tsuyoshi Miura
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Patent number: 6256161Abstract: Echo cancellation is provided in a disk drive circuit having a transducing head connected to a preamplifier circuit by an electrical interconnect with a first time delay, a first interface between the preamplifier and the electrical interconnect having a first reflection coefficient and a second interface between the transducing head and the electrical interconnect having a second reflection coefficient. The echo cancellation technique delays a preamplifier output signal with a second time delay, the second time delay being double the first time delay. The preamplifier output signal is also filtered so as to simulate the effects of the first and second reflection coefficients. The delayed and filtered signal is then subtracted from the preamplifier output signal, thereby removing echo content from the signal.Type: GrantFiled: August 30, 1999Date of Patent: July 3, 2001Assignee: Agere Systems Guardian Corp.Inventors: John D. Leighton, Sally A. Doherty
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Patent number: 6252457Abstract: Emitters of a first NPN transistor and a second NPN transistor forming a differential input section are respectively connected to collectors of a third NPN transistor and a fourth NPN transistor; the collectors and bases of the third NPN transistor and the fourth NPN transistor are respectively connected through first and second capacitors; and the bases of the third NPN transistor and the fourth NPN transistor are respectively connected to a first reference power source through first and second resistors.Type: GrantFiled: December 28, 1999Date of Patent: June 26, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takehiko Umeyama, Toru Takeuchi
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Patent number: 6252735Abstract: A voltage-biasing, voltage-sensing differential preamplifier having a high input impedance preamplifier circuit to amplify magnetic data readback signals from a magnetoresistive (MR) sensor and feedback circuits to simultaneously hold the electrical center of the MR sensor at a prescribed potential (usually ground) while applying a predetermined constant differential voltage-bias across the MR element. The feedback circuits provide a stable operating point for the MR sensor at the desired bias-voltage, and maintain the average potential on the MR sensor at or near the disk substrate potential to limit the destructive effects of MR sensor contact with conducting asperities.Type: GrantFiled: February 25, 1999Date of Patent: June 26, 2001Assignee: International Business Machines CorporationInventors: Paul Wingshung Chung, Stephen Alan Jove
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Patent number: 6249397Abstract: A magnetic read-write device with a magnetic head consisting of a core and a coil. The read-write device is incorporated into in a camera. A writing circuit is connected directly and in parallel to the coil, for driving the coil with writing current in a writing mode for writing binary code data on a magnetic recording layer provided on photo film. The writing circuit has a pair of write control switches which are turned ON and OFF alternately to each other, to apply the writing current to the coil in alternating directions. An amplification circuit is also connected directly and in parallel to the coil. The amplification circuit amplifies signal voltage induced between terminals of the coil in a reading mode for reading binary code data from the magnetic recording layer, to output a reproduction signal. A switching transistor is connected in a line through which a drive voltage is supplied to the amplification circuit.Type: GrantFiled: June 2, 1997Date of Patent: June 19, 2001Assignee: Fuji Photo Film Co., Ltd.Inventor: Wataru Sasaki
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Patent number: 6239933Abstract: A method and circuits are provided for high speed powerup of an analog reference source, such as used in a direct access storage device (DASD). The high speed powerup circuits for the analog reference source include a biasing current source. Biasing circuitry is provided for establishing a first bias reference voltage level. An enable input is provided for disabling and for enabling powerup of the analog reference source. A transistor switch is coupled between the bias reference voltage level and the analog reference source. The transistor switch is operatively controlled by the enable input for driving the analog reference source and enabling fast powerup of the analog reference source.Type: GrantFiled: February 8, 1999Date of Patent: May 29, 2001Assignee: International Business Machines CorporationInventor: Robert Andrew Kertis
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Patent number: 6236524Abstract: An adjustable impedance boosting circuit comprises a differential pair of gain stage transistors. A magneto-resistive element may be coupled to the emitters of the gain stage transistors, and a collector load may be coupled to a collector of at least one of the gain stage transistors. The invention further comprises a variable impedance load coupled in parallel with at least a portion of the collector load, the variable impedance load operable to adjust the impedance of the boosting circuit in proportion to the resistance of the magneto-resistive element.Type: GrantFiled: December 15, 1998Date of Patent: May 22, 2001Assignee: Texas Instruments IncorporatedInventors: Bernard R. Gregoire, Hiromichi Kuwano
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Patent number: 6225802Abstract: A device for measuring the resistance of an MR element which passes a bias current Imr and which derives a bias voltage. A voltage comparator CMP receives the bias voltage Vmr and a reference voltage Vref. A counter UPCNT has an enable input EN coupled to the output of the comparator and a digital output forming the output of the device. A current source supplies the bias current Imr which represents a digital value received by the current source at its control input which is coupled to the digital output of the counter. The device enables the digital value of a resistance to be measured automatically.Type: GrantFiled: July 19, 1999Date of Patent: May 1, 2001Assignee: U.S. Philips CorporationInventors: Joao N. V. L. Ramalho, Gerben W. De Jong, Jozef A. M. Ramaekers, Eric Pieraerts
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Patent number: 6226137Abstract: A read system for receiving information from a storage medium and for supplying a signal to circuitry external to the read system is disclosed. The read system includes a bias current generator, individual channel circuitry, and preamplifier circuitry. The individual channel circuitry further includes a first and a second magnetoresistive element. A plurality of transistors are connected to the first and the second magnetoresistive element and are cross-coupled to each other to cancel out any noise arising from a mismatch of the first and the second magnetoresistive element. The preamplifier circuitry further includes a first gain stage and a second gain stage separated by a first and a second capacitor. The first and the second capacitors permit an AC signal from the first gain stage to the second gain stage, while blocking unwanted DC signals which are necessary to properly bias the first and the second MR element.Type: GrantFiled: April 2, 1999Date of Patent: May 1, 2001Assignee: Agere Systems Guardian Corp.Inventor: Tuan V. Ngo
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Patent number: 6225863Abstract: An offset adjusting apparatus includes transistor groups of transistors connected in parallel to each other. The transistor groups are connected in parallel to either a pair of transistors distributed on a first side of a differential head section and a current mirror section or a pair of transistors distributed on a second side of the differential head section and the current mirror section. The offset adjusting apparatus further includes a control circuit for controlling the turning on and turning off of each transistor of the transistor groups.Type: GrantFiled: November 25, 1998Date of Patent: May 1, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Toshitsugu Miwa
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Patent number: 6226136Abstract: A system and method are disclosed for reading data from a magnetic disk. The method includes generating a preamplified data signal by reading the magnetic state of the disk using a magnetoresistive head. The preamplified data signal is capacitively coupled to a variable gain read channel amplifier. The variable gain read channel amplifier has an input, an output, and a programmable gain. The input of the variable gain read channel amplifier has a variable gain read channel amplifier input resistance. The occurrence of a thermal asperity event is detected and an adjustment is made to the variable gain read channel amplifier input resistance to compensate for the thermal asperity event. An adjustment to the programmable gain of the variable gain read channel amplifier is made to compensate for the adjustment to the variable gain read channel amplifier input resistance.Type: GrantFiled: October 1, 1998Date of Patent: May 1, 2001Assignee: LSI Logic CorporationInventor: Jenn-Gang Chern
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Patent number: 6222415Abstract: In the bias circuit of a magneto-resistive element signal amplifying circuit, a favorable high frequency characteristic is obtained by suppressing the influence of a parasitic capacitance that is generated. Furthermore, noise is removed by a lowpass filter including a resistor and a capacitor having a relatively small size in an integrated circuit.Type: GrantFiled: January 31, 2000Date of Patent: April 24, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takehiko Umeyama, Toru Takeuchi
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Patent number: 6219192Abstract: The method and apparatus have application to the compensation of transient signals produced on reading a data storage device with a magneto-resistive head due to thermal contact with asperities on the data storage medium. Preferably, the data channel employs partial-response maximum-likelihood detection. The method compensates for an additive signal in a data signal and comprises the steps of: detecting the contribution to said data signal by said additive signal; initially compensating the data signal by maintaining a DC offset in said data signal, the initial level of said DC offset being set in dependence on the detected contribution; and while compensating the data signal, detecting when the compensated data signal exceeds a predetermined threshold and varying the set level of said DC offset in dependence upon said detection.Type: GrantFiled: October 26, 1998Date of Patent: April 17, 2001Assignee: Data Storage InstituteInventors: Srinivasan Gopalaswamy, Bin Liu, Yuan Xing Lee
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Patent number: 6219195Abstract: Low-noise magneto-resistive (MR) pre-amplifier circuit amplifies signal from MR head. MR head is biased at optimal point by current source to generate signal. Current source is powered by regulator to reduce noise contribution from Vcc due to finite output impedance of current source. Self-biased CMOS low-noise amplifier (LNA) minimizes input-referred noised without using negative power supply. Small MOS transistor with feedback tracking loop replaces self-bias resistor which determines lower corner cutoff frequency. This facilitates use of large-value resistor, thereby enabling on-chip integration of DC blocking input capacitor. Gm—Gm amplifier configuration increases gain bandwidth product and minimizes parasitic effects of MOS transistors.Type: GrantFiled: January 29, 1998Date of Patent: April 17, 2001Assignee: Marvell Technology Group Ltd.Inventors: Gani Jusuf, Wen Fang
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Patent number: 6218903Abstract: A very-small-signal amplifier is capable of amplifying very small signals with high sensitivity up to high frequencies while simplifying the circuit, and a magnetic disk storage apparatus realizes a reading operation over a wide band up to high frequencies with high sensitivity. The signal amplifier is a modified differential circuit including a first transistor of a first conductivity type and a second transistor of a second conductivity type each having a control terminal, a terminal of the input side and a terminal of the output side. The terminals on the input side are connected in common, and a current corresponding to the voltage difference across the control terminals is allowed to flow. A very small voltage signal generated by an input signal source is applied to the control terminal of said first transistor. A bias voltage is applied to the control terminal of the second transistor.Type: GrantFiled: February 28, 2000Date of Patent: April 17, 2001Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd., Hitachi Information Technology Co., Ltd.Inventors: Takashi Hashimoto, Yuji Nagaya, Masaki Yoshinaga, Noriaki Hatanaka, Tatsuo Mochizuki, Katsuya Sonoyama
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Patent number: 6219194Abstract: An apparatus for substantially eliminating a switching voltage transient in a magnetic recording system so as to minimize a write-to-read recovery time includes a first bias enable switch, a bias current source responsive to the first bias enable switch, an MR sensor for receiving a bias current from the current source, and a read amplifier being capacitively coupled to the MR sensor. The bias current flowing through the MR sensor produces the switching voltage transient due to the RC time constant presented by the input of the read amplifier. The apparatus includes a first compensating circuit for generating a compensating voltage transient having a polarity substantially equal and opposite to the switching transient. The first compensating circuit is electrically coupled to the MR sensor, and a superposition of the switching voltage transient and the compensating voltage transient is substantially zero.Type: GrantFiled: April 9, 1999Date of Patent: April 17, 2001Assignee: Guzik Technical EnterprisesInventors: Anatoli B. Stein, Serguei Pantchenko
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Patent number: 6215302Abstract: A preamplifier for a resistive transducer, configured to generate an amplified output indicative of potential difference across the transducer (while the transducer is biased and in the presence of a magnetic field) and to generate a resistance signal indicative of the transducer's resistance, and a method for measuring the resistance of a resistive transducer during operation of the transducer in the presence of a changing magnetic field. The preamplifier preferably includes circuitry for generating a current signal indicative of the instantaneous current through the transducer and analog divider circuitry for generating the resistance signal from a signal indicative of the potential difference across the transducer and the current signal. When the resistance signal is an analog signal, the preamplifier can include circuitry for processing the analog resistance signal to generate a word of binary data indicative of a value proportional to the transducer resistance.Type: GrantFiled: May 4, 1999Date of Patent: April 10, 2001Assignee: National Semiconductor CorporationInventor: Brian Robert Carey
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Patent number: 6211736Abstract: A signal amplifying circuit has a differential amplifying circuit, a capacitor and a voltage follower. This circuit takes as input signal the signals outputted from the two terminals of an MR element to which a bias electric current is supplied, and amplifies and outputs the difference in input signals from output terminals. One input terminal of this circuit is connected directly with one of the terminals of the MR element. A capacitor connects the other input terminal of this circuit with the another terminal of the MR element. The two input terminals of this circuit are connected respectively with a non-inverting input terminal and an inverting input terminal of the voltage follower. The voltage follower provides an output to an input terminal of this circuit via a resistance.Type: GrantFiled: December 15, 1999Date of Patent: April 3, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Toru Takeuchi, Takehiko Umeyama
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Patent number: 6208482Abstract: A signal amplifying circuit for an MR element in which a first terminal of a selected MR element is connected to input of an amplifier through a first resistor as well as to a second input of the amplifier through a second resistor, and a second terminal of the MR element is connected to the input of the amplifier through a capacitor. The effect of an offset voltage generated in the MR element can be suppressed to minimum with a simple configuration.Type: GrantFiled: June 10, 1999Date of Patent: March 27, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yukihiro Araya, Takehiko Umeyama
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Patent number: 6204998Abstract: A magnetic head includes an inductive coil electrically partitioned into a plurality of segments by a plurality of conductive leads. During the data reading mode, magnetic flux changes emanating from a record medium are sensed by the magnetic head. The inductive coil transduces the magnetic flux changes into electrical signals at the conductive leads. The signals are amplified by serially cascading the plurality of segments and the signals are then fed into amplifiers. During the data writing mode, the electrical signal is applied to two of the conductive leads via a data writing amplifier. The inductive coil converts the electrical signal into changes in magnetic flux for recording onto a magnetic medium.Type: GrantFiled: March 23, 1998Date of Patent: March 20, 2001Assignee: Read-Rite CorporationInventor: Eric R. Katz
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Patent number: 6204980Abstract: An integrated circuit servo system demodulator that incorporates a high speed gain stage with DC offset cancellation. The gain stage receives a differential voltage signal representing a servo burst and converts the differential voltage signal to a differential current signal by a transconductance amplifier. The differential current signal is full-wave current rectified and converted to a full-wave rectified voltage signal by a transimpedance amplifier. A DC offset cancellation circuit is coupled between the full-wave current rectifier and transimpedance amplifier and functions to mirror and subtract, from the rectified current signal directed to the transimpedance amplifier, any DC leakage current developed by the rectifier which would generate a DC offset voltage through the transimpedance amplifier.Type: GrantFiled: June 18, 1998Date of Patent: March 20, 2001Assignee: Adaptec, Inc.Inventors: Afshin D. Momtaz, Mario T. Caresosa
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Patent number: 6191909Abstract: A system for polling a preamplifier unit to remotely determine pre-established parametric values in a disk drive is disclosed. The disk drive comprises a controller, a preamplifier, and a plurality of transducers. The system for polling the preamplifier comprises means in the controller for generating a succession of serial bit characters each representative of a different pattern. A means is provided for successively transferring said serial bit characters from the controller to the preamplifier unit. A plurality of individual bit lines are provided in the preamplifier unit representative of at least one parametric value. A means is included in the preamplifier unit for comparing each serial bit pattern character received with said plurality of individual bit lines, and for generating a match signal when a serial bit pattern character received matches the plurality of individual bit lines. A means is provided for transferring the match signal from the preamplifier unit to the controller.Type: GrantFiled: June 13, 2000Date of Patent: February 20, 2001Assignee: Western Digital CorporationInventors: Robert L. Cloke, David Price Turner, Robert Ellis Caddy, Jr., Michael Rodger Spaur
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Patent number: 6191908Abstract: A magnetic disk unit lowers a possibility to cause data reproduction errors by setting a gain of a variable gain amplifier (VGA) at a predetermined fixed level for a predetermined time when an output from the VGA which amplifies an input signal is changed to a value smaller than an optimum value upon occurrence of a thermal asperity and then restoring a variable gain condition so that an output amplitude automatically has a certain preset value.Type: GrantFiled: June 29, 1998Date of Patent: February 20, 2001Assignee: NEC CorporationInventor: Takashi Tachikawa
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Patent number: 6185060Abstract: A changeover circuit in a tape recorder includes a recording and reproducing integrated circuit (IC) having a signal terminal and a bias terminal and arranged such that a DC potential at the signal terminal is set equal to that at the bias terminal, a changeover transistor whose collector and emitter are connected between a signal line connected to the signal terminal and the bias terminal, a controller for controlling the changeover transistor by supplying an output therefrom through a resistor to a base of the changeover transistor, and a bypass circuit connected between the bias terminal and a ground. The bypass state of the bypass circuit is controlled based on a control voltage from the controller.Type: GrantFiled: August 20, 1997Date of Patent: February 6, 2001Assignee: Sony CorporationInventors: Kazuyuki Suda, Kazuo Murayama
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Patent number: 6181501Abstract: A magnetic recording and reproducing apparatus having a reproducing circuit structure which improves a high frequency characteristic of a reproduction signal output from a read head. The read head reads information recorded on a recording medium. A first amplifying circuit amplifies a reproduction signal generated by the read head. A second amplifying circuit, which comprises a high-frequency amplifying circuit, amplifies the reproduction signal amplified by the first amplifying circuit in a high-frequency amplifying manner. The first amplifying circuit and the second amplifying circuit together constitute a cascode amplifier. A third amplifying circuit amplifies the reproduction signal amplified by the second amplifying circuit. A reproducing circuit reproduces the reproduction signal amplified by the third amplifying circuit.Type: GrantFiled: December 17, 1997Date of Patent: January 30, 2001Assignee: Fujitsu LimitedInventor: Yuichiro Yamazaki
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Patent number: 6178055Abstract: An apparatus and method are disclosed for generating a low ripple negative voltage suitable for use in a disc drive. A negative voltage supply comprises a pulse generator circuit which generates first and second driver signals in relation to a load of the negative voltage supply. The first driver signal comprises a series of periodically occurring first pulses and the second driver signal comprises a series of periodically occurring second pulses. The first and second pulses are mutually exclusive in time so that at least a minimum delay of selected, nonzero length is provided between transitions of subsequently occurring first and second pulses. The negative voltage supply further comprises a regulator circuit, operably coupled to the pulse generator circuit, which generates the negative voltage in response to the first and second driver signals utilizing a pair of storage capacitors which alternately accumulate and transfer charge to an output capacitor in response to the first and second driver signals.Type: GrantFiled: June 26, 1998Date of Patent: January 23, 2001Assignee: Seagate Technology LLCInventor: Donald W. Janz
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Patent number: 6175456Abstract: A circuit for controlling a write current employed in a magnetic disk recording apparatus includes a write unit for delivering the write current to a plurality of magnetic heads to enable writing of data on surfaces of magnetic disks by the magnetic heads. The write current exhibits a first magnitude that varies in dependence upon a second magnitude exhibited by a driving current provided to a write current control terminal of the write unit. A control unit generates pulse width modulated signals having duty cycles corresponding to respective predetermined write current control values to indicate the write current. A write current adjusting unit receives the pulse width modulated signals and delivers the driving current to the write current control terminal of the write unit. The write current adjusting unit adjusts the second magnitude exhibited by the driving current in dependence upon the duty cycles of the pulse width modulated signals.Type: GrantFiled: December 23, 1996Date of Patent: January 16, 2001Assignee: Samsung Electronics Co., Ltd.Inventor: Jong-Yun Yun
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Patent number: 6175462Abstract: The present invention is a preampifier circuit for magnetoresistive (MR) elements which has a high imput impedance with respect to the MR resistance so that the resultant system would not be sensitive to the series input inductance of the leads necessary to connect the MR element with the preamplifier. With former preamplifiers, nearly all are low impedance types, (using either BiCMOS or BiPolar technology), or differential (using BiPolar technology). The present invention fills a need in the prior art by providing a preamplifier curcuit using BiCMOS technology with a high input impedance, and single ended (SE) topology for minimum power dissipation.Type: GrantFiled: November 14, 1997Date of Patent: January 16, 2001Assignee: International Business Machines CorporationInventors: Paul Wingshing Chung, Stephen Alan Jove
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Patent number: 6172548Abstract: The present application discloses an innovative improved circuit, in which the long transient at write-to-read transitions is avoided by using a shorting switch to short the inputs of the first amplifier stage together when the read amplifier is activated. This speeds up write-to-read transition. Moreover, since read mode can now be entered more quickly after a power-down condition, this circuit also permits the use of other power-saving tricks to idle the read amplifier momentarily.Type: GrantFiled: December 30, 1994Date of Patent: January 9, 2001Assignee: STMicroelectronics, Inc.Inventors: Scott Warren Cameron, Axel Alegre de La Soujeole
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Patent number: 6172832Abstract: A magnetic storage system capable of separating thermal signals from data signals is disclosed. The magnetic storage system includes a magnetic media and a head associated with the magnetic media. The head includes a magneto-resistive element which is biased by a modulated bias current. The modulated bias current modulates thermal signals to a first frequency and modulates data signals to at least a second frequency. A method of separating thermal signals from data signals read from a magnetic storage media is also disclosed. The method includes the steps of (1) providing a head for reading information from the magnetic storage media, the head having an MR element; and, (2) biasing the MR element with a modulated bias current.Type: GrantFiled: November 2, 1999Date of Patent: January 9, 2001Assignee: Maxtor CorporationInventors: Moris M. Dovek, Gang Herbert Lin, Erhard T. Schreck
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Patent number: 6169638Abstract: An automatic gain control 20 is adapted to compensate to equalise the gain for signals of different characteristics (e.g. the preamble region and the main data region of a signal retrieved from a tape). The signals are amplified by a VGA 32, the output of which is monitored by a peak detector 44, whose output is compared at amplifier 48 with a respective target value for the particular signal region from a associated counter or register 60, 62, 65, to control the gain control signal applied to the VGA 32 by a gain control 50. The output of the comparator amplifier 48 is monitored before and after the transition between the first and second signal regions and the reference values in the appropriate register 60, 62 incremented or decremented in accordance with any step in the output of the amplifier 48, substantially to equalise the gain before and after the transition.Type: GrantFiled: September 22, 1997Date of Patent: January 2, 2001Inventor: Robert Philip Morling
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Patent number: 6154333Abstract: An amplification circuit for an MR head which can realize a reduction of the power consumption, simplification of the circuit configuration by providing capacitors inside the circuit, and reduction of the number of externally provided parts, wherein a current is supplied to an MR head resistor from a bias current source and the amount of change of the head resistance is converted to a voltage change when reproducing magnetically recorded data. A direct current component of the voltage dropped in the head resistor is cut by capacitors, and only the alternating current component is input to a differential amplification circuit configured by transistors. Recorded data can be distinguished in accordance with an amplified output voltage, so capacitances of direct current cut-off capacitors can be set small and thus the direct current cut-off capacitors can be provided in the IC chip and the number of external parts can be reduced.Type: GrantFiled: December 17, 1998Date of Patent: November 28, 2000Assignee: Sony CorporationInventors: Keiji Narusawa, Norio Shoji
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Patent number: 6147824Abstract: A signal reproducing circuit includes first power supply lines having different potentials, a magneto-resistive effect head having one end thereof coupled to the first power supply line, for reproducing data recorded on a magnetic recording medium in a read operation, and a first constant current source coupled between another end of the magneto-resistive effect head and the second power supply line, for supplying the magneto-resistive effect head with a sense current in the read operaion. Also included are first and second transistors having collectors thereof coupled to the first power supply line, respectively, and responsive to voltage signals obtained from the one end and the other end of the magneto-resistive effect head.Type: GrantFiled: December 23, 1996Date of Patent: November 14, 2000Assignee: Fujitsu LimitedInventors: Hidekazu Shibasaki, Hiroaki Ueno