Abstract: One circuit generates a constant positive potential, other circuit generates a constant negative potential. The positive potential and the negative potential are applied to a magneto-resistive head that reads or writes data from/to a magnetic disk. The positive potential is generated using a positive voltage source, an operational amplifier, and an NMOS transistor. The negative potential is generated using of a negative voltage source, an operational amplifier, and a PMOS transistor.

Abstract: A digital information reproducing apparatus using rotary heads that reproduces digital information signals recorded on a magnetic tape using magneto resistive heads installed on a rotary drum. The apparatus includes, in the fixed side of the apparatus, a magnetic tape checking circuit that checks the type of the magnetic tape; and a control signal generation circuit that generates a control signal for controlling the gain of a reproduction amplifier circuit; and on the rotary drum, a decoder circuit that identifies the control signal transmitted from the control signal generation circuit. The control signal generation circuit generates the control signal based on a checking result given by the magnetic tape checking circuit, and the decoder circuit identifies the transmitted control signal to control the gain of the reproduction amplifier circuit.

Abstract: A method and apparatus for removing second order distortion is disclosed. The method couples a differential load between two source followers of a gain stage. The apparatus includes a differential load having two MOS transistors of unequal channel width/length ratios. The differential load implements a square and summing function in a single circuit eliminating the need to split the signal path.

Abstract: A reproducing circuit for a MR head is proposed, wherein a MR head is interposed between a pair of current source circuits and a feedback amplifier is provided for controlling the current of the pair of the current source circuits so that a terminal voltage of the MR head becomes a predetermined value. Reproduced output from the MR head is derived from an amplifier having balanced input terminals for canceling noises and ripple components included in a power source.

Abstract: A circuit for measuring signal output of a transducer includes an amplifier having a differential input and a single ended output referenced to a fixed potential. One transducer terminal is coupled through a source follower to an input terminal of the differential input and the other transducer terminal is coupled through a source follower and a resistive element to the other input terminal of the differential input whereby the transducer terminals are isolated from the fixed potential. A voltage to current converter converts the voltage at the single ended output to an output current that is applied to an input branch of a current mirror. A first output branch of the current mirror supplies a current equal to the converter output current to one terminal of the differential input. A second output branch of the current mirror supplies a current equal to the converter output current to the other terminal of the differential input.

Abstract: A mass data storage device system (70) and method for providing frequency compensation within it are disclosed. The system has a moving media (72) that contains signals encoded in oriented magnetic domains that are detected by a magneto-resistive head (78) positioned in proximity thereto. An amplifier stage (100 or 120) is connected to sense the change in the electrical characteristic of the head, and capacitors (102-105 or 126-131) are operatively connected within the amplifier stage to produce two or three poles in a frequency response of the amplifier stage to reduce a second order frequency response of the head. Preferably, the poles have substantially identical pole locations.

Abstract: A write driver circuit for driving a magnetic head applicable to a variety of magnetic heads or magnetic storage media is disclosed. The circuit includes a write current generating section for generating plural types of write current for magnetizing a predetermined area of a magnetic storage medium in a predetermined direction; a switching signal generating section for generating a switching signal for switching among the write currents; a switching section for changing the direction of magnetization through the magnetic head by switching among the write currents based on the switching signal; and an overshoot current generating section for generating an overshoot current for instantaneously increasing the write current when the direction of magnetization is changed by the switching section; wherein the circuit further includes an overshoot current generation signal producing section, and is designed so that the overshoot current is generated based on an overshoot current generation signal produced thereby.

Abstract: A nonlinear transition shift (NLTS) measurement procedure for read/write heads employing a giant magnetoresistive (GMR) merged heads. The method of this invention includes the pulse-shape distortion effects on recording nonlinearity, which can significantly affect the existing theoretical formulae for calculating nonlinearity correction factor from measured partial erasure values, and second-order approximation of equation of NLTS and nonlinearity correction factor. Transition broadening effects (TBE) and partial erasure (PE) are incorporated in the NLTS measurement procedure to permit accurate isolation of the NLTS from the unrelated TBE/PE and GMR nonlinear transfer characteristic (NTC). First, a fifth harmonic elimination (5HE) test is performed at bit period T to measure a first nonlinearity value X.

Abstract: The present invention relates to a preamplifier circuit comprising a plurality of amplifier stages coupled together and operable to consecutively amplify a signal associated with a head of a hard disk drive. The preamplifier circuit further comprises a power delivery circuit operably coupled to the amplifier stages and operable to provide power to the amplifier stages in a substantially concurrent manner when the hard disk drive is transitioning from a write state to a read state. In addition, the circuit comprises a control circuit operably coupled to the amplifier stages, and operable to activate at least two of the plurality of amplifier stages in a generally consecutive manner after the providing of power to the amplifier stages. In the above manner a saturation of an output of the preamplifier circuit is avoided by preventing substantially a propagation of glitches through the preamplifier circuit and providing for a substantially fast write-to-read transition time.

Abstract: In a magnetic disk drive, overshoot caused in reversing the flowing direction of a recording current flowing through a magnetic head is intensified. The magnetic disk drive includes first and second differential pulse generation units for respectively generating first and second differential pulse signals by differentiating first and second recording signals; and first and second transistors that are provided in parallel to a resistor disposed between ground and an H bridge circuit for driving the magnetic head and are respectively turned on in accordance with the first and second differential pulse signals. When the flowing direction of the recording current is reversed in response to the first and second recording signals, one of the first and second differential pulse signals is generated, and hence, one of the first and second transistors is temporarily turned on. As a result, the overshoot of the recording current is intensified.

Abstract: A magnetic recording channel front-end for a magnetic storage system includes a magnetoresistive element, an interconnect and a readback amplifier. The interconnect, which has a characteristic impedance, couples the magnetoresistive element to the readback amplifier. The readback amplifier includes a gain stage and an active termination. The gain stage, which has an associated impedance, has an input that is connected to the interconnect. The active termination is coupled to the input of the gain stage, such that an input impedance of the readback amplifier, which is formed by a combination of the impedance associated with the gain stage and the active termination, is substantially equal to the characteristic impedance of the interconnect. Additionally, the gain stage generates a first noise signal that has a first magnitude appearing at an output of the gain stage. The active termination generates a second noise signal that has a second magnitude that also appears at the output of the gain stage.

Abstract: There is provided a semiconductor integrated circuit for magnetic recording including a write circuit which may be operated with the power supply voltage of 5V system without any problem on the dielectric strength thereof and also assures high speed data write operation to media of the magnetic recording system and a high-speed and highly reliable storage media reading system which has employed the same semiconductor integrated circuit. The write circuit described above is configured to apply a drive voltage to a head through superimposition so that a write current generates over-shoot when the current is inverted by providing the write head with a voltage and moreover a protection element is provided to protect a switch MOSFET for the current switching from a high voltage which is applied to the write head when the current is inverted.

Abstract: A magnetic recording apparatus has a head for recording information on a magnetic recording medium, a write current setting circuit for controlling a write current that is passed through the head, a fault detection circuit for detecting a fault in the head based on the result of comparison between head voltages appearing at both ends of the head and a reference voltage, and a reference voltage setting circuit for varying the reference voltage according to the write current. This configuration permits correct detection of faults in the head all the time irrespective of the write current or the supply voltage.

Abstract: A circuit (80) and method (84) for protecting read heads (18) of a hard-disk drive system (100). Capacitor C1 is controllably coupled to a dummy head Rdummy during a Vbias mode, so that capacitor C1 has a low, predictable voltage upon returning to Ibias mode, protecting the read heads (18) from damage. The circuit (80) includes logic (82) and algorithm (84) determining when to couple the capacitor C1 to the dummy head Rdummy during a servo bank write (SBW) sequence.

Abstract: A magnetic recording apparatus equipped with a recording circuit for generating a recording current corresponding to an input recording signal, a magnetic head, operable in response to the generated recording current, for recording, in a magnetic recording medium, data corresponding to the input recording signal, and a waveform shaping section for shaping the generated recording current such that a current value of said recording current approximates to a predetermined value while keeping thereover throughout a period corresponding to the data length. Both the recording circuit and the waveform shaping section may be mounted in an integrated form on a single microchip. The result is that the input recording signal can be transferred at high speed as measures are provided to reduce both a rise time and a fall time of the recording current.

Abstract: A preamplifier circuit for a hard disk drive system comprises a preamplifier circuit having a bias voltage circuit stage associated therewith. The preamplifier circuit further comprises a current bias boost recovery circuit operatively coupled to the bias voltage circuit stage which is configured to increase a rate of charging of a noise reduction capacitor associated with the bias voltage circuit stage. A head select boost recovery circuit is also operatively coupled to the bias voltage circuit and is configured to increase a rate of charging or discharging of a bias capacitor associated with the bias voltage circuit stage. Together the circuits allow for a concurrent head switch and current bias switch and avoids the problems associated with the prior art.

Abstract: An aspect of the invention can be regarded as a disk drive that includes a disk drive base and a magnetic disk. The disk drive further includes a rotary actuator coupled to the disk drive base. The rotary actuator has an MR read element disposed adjacent the magnetic disk. The MR read element has a bias voltage. The disk drive further includes a rotatable spindle motor hub for rotating the magnetic disk positioned on the spindle motor hub. The spindle motor hub is in electrical communication with the magnetic disk. The spindle motor hub is mechanically coupled to and electrically insulated from the disk drive base. The disk drive further includes a circuit for applying a voltage equivalent to the bias voltage to the spindle motor hub such that a voltage potential between the MR read element and the magnetic disk is mitigated.

Abstract: A voltage buffer and follower includes a single ended output, a source follower, and a current feedback loop. The current feedback loop is coupled to the source follower and to the single ended output. When two voltage followers are used in a differential configuration, the voltage followers can become part of a high bandwidth gain cell. The high bandwidth gain cell includes a first and a second source follower circuit that are coupled to the first and the second current feedback loops, respectively. The first and the second source follower circuits are further coupled to a first and a second current mirror circuit, respectively. The first and second current mirror circuits are coupled to a load, which is coupled to a common-mode feedback circuit. The common-mode feedback circuit controls a constant current source that sinks mirrored direct currents that flow through the first and the second current mirror circuits.

Abstract: An active damping circuit including an H-bridge circuit having an inductive load and a switching circuit, an impedance circuit responsive to a bias signal to damp the H-bridge circuit, and a bias circuit to generate the bias signal responsive to the voltage drop across the H-bridge circuit.

Abstract: There is disclosed a disk drive of a perpendicular magnetic recording system including a write compensator against magnetic disturbance. The write compensator estimates strength and direction of the magnetic disturbance based on the detection result of the magnetic disturbance from a magnetic sensor during a write operation. The write compensator executes write compensation in accordance with the direction of the magnetic disturbance and the recording magnetization direction on a disk medium.

Abstract: The magnetizing control signal MAGCH becomes the high level if there is no magnetic reversal during a period of a predetermined number of clocks and becomes the low level if there is a magnetic reversal. If the magnetizing control signal MAGCH is the low level, the high voltage VH is applied to the center tap of the bifilar winding 31 of the magnetic head via the transistor 39. The transistors 40, 41 or the transistors 42, 43 are turned on in accordance with the write data signal DATA, *DATA. Therefore, the magnetizing current flows through one of the winding elements 31a and 31b. If the magnetizing control signal MAGCH is the high level, the transistors 46, 41 or the transistors 48, 43 are turned on in accordance with the write data signal DATA, *DATA. Therefore, the magnetizing current flows from the low voltage VL to both the winding elements 31a and 31b.

Abstract: A magnetic head reader circuit comprises a gain stage that is configured to effect multiple functions. In a preferred embodiment, the gain stage is a single stage circuit that includes programmable gain, programmable bandwidth and high-frequency boost, and squelch control. The single stage circuit also includes a folded cascode current drive that provides an increased dynamic range of the gain stage. To provide a low DC offset, the reader also includes an integrator that is operated in closed loop to appropriately attenuate the currents from the cascode current drive. By employing a multi-function single stage reader, a substantial reduction in circuit area, and a substantial increase in bandwidth, is achieved.

Abstract: A circuit and method are disclosed for relatively rapidly causing the current flowing through a write head to transition between steady states without generating an appreciable amount of capacitively-coupled noise. Embodiments of the present invention generally provide drive voltage signals to the write head that have no common mode voltage levels during transitions between steady state current levels in the write head. In other words, the drive voltage signals applied to the write head are substantially entirely differential during write head current transitions. In an exemplary embodiment of the present invention, a driver circuit includes switching circuitry connected between the terminals of the write head and reference voltage supplies, such as positive and negative voltage supplies. The driver circuit further includes timing circuitry that generates control signals for controlling the switching circuitry.

Abstract: A preamplifier circuit of a preamp configured for measuring microwave noise of a magnetoresistive element biased by a pair of current sources is disclosed. In a preferred embodiment, the preamplifier circuit includes a differential amplifier disabled from the preamplifier circuit by a amplifier bypass switch, one of the pair bias current sources disabled from the preamplifier circuit and referenced to ground by a current bypass switch, a test point communicating with the amplifier bypass switch providing single ended access to the biased magnetoresistive element for measuring the microwave noise of the biased magnetoresistive element relative to the ground reference and a ground point communicating with the ground reference providing the ground reference for measuring the microwave noise of the biased magnetoresistive element.

Abstract: A write current circuit (40) adapted to drive a thin film write head (L0) of a mass media information storage device. The write current circuit includes a write current reference voltage circuit (42) adapted to selectively establish amplitude of a write current signal. The write current circuit further includes programming circuitry (M5-M10) driven such that several parameters of the write current waveform can be controlled, including the write current amplitude, overshoot amplitude and overshoot duration. The present invention achieves technical advantages by providing the ability to both produce an accurate write current, and also providing the ability to establish the write current waveform shape so that customers can optimize disk drive performance even when using different thin film write heads available from different suppliers.

Abstract: High-accuracy position signals are obtained by correcting nonlinear position sensitivities of two phase signals demodulated from two-phase servo information, into linear ones. A position sensitivity adjusting unit detects the signal level at the intersection of position signals N and Q having different phases by a predetermined track pitch which are demodulated from read signals of two-phase servo information buried and recorded in a disk medium and makes an adjustment of the gain of an AGC amplifier so that the intersection signal level coincides with a predetermined level. A sensitivity correcting unit corrects into linear position sensitivities the nonlinear position sensitivities approximated by sine functions or cosine functions relative to the actual track position X of the two position signals N and Q output from the AGC amplifier.

Abstract: A system and method for acquisition signal error estimation is provided which uses one or more past values of the sequence to determine the nearest ideal sample value. According to one embodiment, four consecutive samples are used. According to another embodiment, two samples are used. The acquisition signal error estimator maybe used in conjunction with gain, DC offset, or magneto-resistive asymmetry control loops in a sampled amplitude read channel.

Abstract: A selectively adjustable impedance boosting circuit for a magneto-resistive head in a disk drive to compensate a frequency pole by introducing a zero in proportion to the resistance of the magneto-resistive element and with selectable circuit parameters to further adjust the pole compensation. The invention includes selectively adjusting the sensitivity of the pole compensation to changes in the resistance of the head, selectively adjusting the peak compensation, and adjusting the frequency of the compensating zero.

Abstract: The present invention covers circuits to achieve high data rate writing on thin film transducer. The circuit comprises an ECL pre-driver adapted for driving a high current H-switch driver driving a write head, such as for a hard disk drive (HDD) circuit (10). Preferably, the pre-driver (16) includes emitter-follower transistors (Q8-Q13) and resisters (R8-R12), configured in three stages of an emitter-follower buffer. This ECL level pre-driver is used to build enough current and voltage drive capability to drive the high-current H-switch driver. Three pairs of PMOS transistors (M5-M10) are configured to switch in the pseudo ECL level logic swing. One pair of transistors is used to switch the right data signal, while another set of transistors is used to switch a pulsing signal to create a write current overshoot. A third set of transistors are used to switch the pulsing signal in the other direction.

Abstract: A magnetic data storage and retrieval system includes a magnetoresistive head, a resistor, a preamplifier circuit, a voltage measurement circuit, and a resistance calculation circuit. The preamplifier circuit is operably coupled to the magnetoresistive head and the resistor, and applies a first current to the magnetoresistive head and a second current to the resistor. The voltage measurement circuit measures a first voltage across the magnetoresistive head and a second voltage across the resistor. The resistance calculation circuit calculates a resistance of the magnetoresistive head based upon the first and second voltages.

Abstract: In hard disk drives (HDD), a magnetic read head moves over a portion of the hard disk when reading data. A preamplifier, having an initial amplification stage of the single ended type, connects to the magnetic read head and amplifies a data signal picked up by the magnetic read head. The preamplifier typically has multiple read heads, or channels. In order to reduce noise coming into the read channels of the preamplifier from the substrate capacitances of the input transistors connected to the read heads, the input transistors are grouped together into multiple banks that are multiplexed, or turn on separately. To further aid noise reduction, the poles of the single ended amplifier are matched, that is, the frequency response of the constant voltage side is matched to the frequency response to the signal side. This effectively reduces both ground noise and Vcc power supply noise as the the noise becomes common mode on the inputs to a differential amplifier that is connected to the single ended amplifier.

Abstract: A servo controller for correcting a read position of a head when reading data recorded on a recording medium. In accordance with the amplitude ratio of data signals read from each segment of a servo section defined on a recording medium, the servo controller generates an AGC signal corresponding to the next segment before reading the next segment. The data signal read from a phase detection segment of the servo section is amplified to an amplitude greater than the predetermined determination range. The amplified data signal is converted to a two-value digital signal in accordance with the determination range. The phase used during servo control is calculated in accordance with the digital signal.

Abstract: A preamplifier system includes an amplifier stage having at least one feedback network. The feedback network has a feedback resistance that may be adjusted to improve a frequency response of the preamplifier. A feedback control system is operative to set the resistance of the feedback network as a function of a resistance value of an associated read/write head.

Abstract: A representation of the signal level on a data head is obtained by combining the signal level values corresponding to more than one sector of a track on a disc surface. This makes it much easier to lock on to a relatively accurate representation of the actual head signal amplitude, even in the presence of servo disturbances.

Abstract: Arm electronics (AE) suitable for use in a disk drive are disclosed. The AE has write circuitry configured to operate the AE in a write mode during which a write mode supply current is drawn, and read circuitry configured to operate the AE in a read mode during which a read mode supply current is drawn. The AE uses a decaying current pulse generator that generates a decaying current pulse at the beginning of each write-to-read mode transition. The decaying current pulse has an initial value that is equal to the difference between the write mode supply current and the read mode supply current. This controlled load forces the AE to draw a gradually decreasing supply current for each write-to-read mode transition such that supply voltage transients (otherwise present due to parasitics in cabling between the AE and power supply) are reduced. Thus, the undesirable effects of such transients in the read circuitry are reduced so that write-to-read mode recovery times can be shortened.

Abstract: A technique for converting asymmetric waveforms into symmetric ones. The technique is used in disk drive read channels which receive asymmetric waveforms from magnetoresistive heads. Conversion of these waveforms into symmetric ones results in improved bit error rate of the read channel. The correction technique can be used for any general asymmetry transfer function, and in any general application where the correction of asymmetric waveforms is needed. The technique involves splitting the input signal into two rectified paths and applying correction independently on each of the paths.

Abstract: An offset circuit to correct an offset between differential signals includes a read circuit to read the differential signals, a circuit to measure the offset of the differential signals, and a programmable trim circuit to compensate for the offset of said differential signals.

Abstract: A magnetoresistive element input circuit includes a first resistor connected between a magnetoresistive (MR) element and a first power source. A first current source is connected between the MR element and a second power source and supplies a DC bias current to the MR element in an active mode. A second resistor is connected between the MR element and the first current source. A capacitor is connected to a node between the second resistor and the first current source and to the first power supply. A differential amplifier is connected to the MR element. A voltage supply circuit is connected to the node and supplies the node with a voltage, when the input circuit is in an inactive mode, which is substantially equal to the voltage supplied to the node when the input circuit is in the active mode.

Abstract: A head protection device in a data recording circuit Is disclosed in which write-current of a given level that corresponds to a high or low level of coercive force of the magnetic recording portion of a recording medium is provided as an output and supplied to a magnetic head for data recording and reproduction. The data recording circuit comprises an alternate write-current supply portion for alternately providing, by a suitable current switching means, a low write-current corresponding to a low coercivity magnetic head and a high write-current corresponding to a high coercivity magnetic head, a common output portion for providing data to be recorded using a low current or a high current from the alternate write-current supply portion. The low coercivity magnetic head and the high coercivity magnetic head can be at least electrically switched. A current protection portion for a current switching means is provided so as to prevent generation of high write-current at the alternate write-current supply portion.

Abstract: A view DAC feedback inside an analog front circuit for a partial response, maximum likelihood based read/write channel is disclosed. The view DAC feedback circuit may be configured to apply an analog signal associated with an operation level of the PRML based read/write channel to the analog front circuit of the read channel. The view DAC analog signal may be used to calibrate operating parameters for a continuous time filter component of the analog front circuit. The view DAC feedback circuit may be configured to add digitally-controlled noise to the PRMIL read/write channel to optimize performance of the channel in a low signal-to-noise (SNR) environment.

Abstract: There is disclosed a disk drive which can appropriately execute a gain control of an AGC amplifier included in a read channel for each zone on a disk. A CPU refers to table information stored in a memory, and reads initial gain data corresponding to the zone during switching of the zone as a read object. The CPU sets the read initial gain data into the AGC amplifier.

Abstract: A signal processing circuit of a spin-valve magnetic sensor includes a polarity detection circuit for detecting a polarity of an output signal produced by the magnetic sensor and a polarity control unit controlling the polarity of the output signal in response to a result of the polarity detection.

Abstract: A method and apparatus for handling end of data processing in a data storage device. The method includes receiving a plurality of user data bits at a write channel. The method further includes appending primary padding bits to user data bits if the plurality of user data bits is less than a multiple of an input block length of an encoder in the write channel and encoding the plurality of user data bits and any primary padding bits into a plurality of encoded data bytes. Additionally, the method includes appending an end of data marker to an end of the plurality of encoded data bytes, wherein the end of data marker has a length of no more than one byte, and writing the plurality of encoded data bytes and the end of data marker to the data store.

Abstract: A differential circuit to read differential data from a disk by a voltage bias includes a read circuit having a read circuit pole to read the differential data from the disk by maintaining the voltage bias and a feedback circuit having a feedback pole to sense deviations in the voltage and to adjust the voltage in response to the deviations. The read circuit pole is separated from the feedback pole in frequency.

Abstract: A data recovery method for a read assembly of a magnetic memory device. The magnetic memory device has a moving magnetic medium, such as a disk, and a transducer spaced from the disk by a normal gap distance. The read assembly includes a variable gain amplifier and a control computer that controls the read and write operations of the magnetic memory device. The data recovery method uses the control computer to adjust the gain of the amplifier when an error is detected in a read signal. The method tests to see if the error is due to a variance from the normal gap distance by the head that is caused by either an thermal asperity of the disk surface or by a change in temperature of the moving magnetic medium. If a variance is found, the amplifier gain is adjusted and the data is reread. If there is no error the data is provided to an output interface.

Abstract: A disk drive system including a write circuit for controlling current through a magnetic write head includes an H-switch circuit and a pulse-mode power supply circuit. The H-switch circuit controls direction of current through the magnetic write head. The pulse-mode power supply circuit is connected to the H-switch circuit for providing a higher voltage pulse at a beginning of a switching event of the H-switch circuit to accelerate a change in direction of current through the write head, followed by a lower voltage until a next switching event.

Abstract: A differential circuit to read differential data from a disk by a voltage bias includes a read circuit to read the differential data from the disk by maintaining the voltage bias by a first transistor and a second transistor, the first transistor being positioned in a first current path to maintain a first current and the second transistor being positioned in a second current path to maintain a second current. The first current is approximately equal to the second current.

Abstract: A VCM power driver having an input for receiving an external supply voltage VDD. A voltage-mode driver is coupled to the power supply voltage and generates a drive signal to a load. A system processor generates commands indicating a programmed voltage output desired from the voltage-mode driver. A comparator compares VDD to a reference voltage to generate an error signal. A combination mechanism generates a modified command using the error signal. The modified commands are coupled to the voltage-mode driver, such that the voltage-mode driver generates a voltage output based upon the modified command.

Abstract: A circuit (50) and method are presented to provide positive biasing voltages to an MR head (18) in a mass data storage device (10). The circuit (50) includes upper (56) and lower (62) driver transistors to respectively bias respective opposite ends of the MR head (18) with positive voltages. A feedback circuit (58,60,74,84) controls a lower voltage (63) of the positive voltages to be a value as close as possible to a saturation voltage of the lower driver transistor (62), without causing the lower transistor (62) to saturate. Since the MR head (18) is connected between the upper (56) and lower (62) driver transistors, maintaining the lower voltage (63) just above the saturation voltage of the lower driver transistor (62) reduces the common mode voltage across the MR head (18) to a minimum value.

Abstract: A method and apparatus for removing second order distortion is disclosed. The method couples a differential load between two source followers of a gain stage. The apparatus includes a differential load having two MOS transistors of unequal channel width/length ratios. The differential load implements a square and summing function in a single circuit eliminating the need to split the signal path.