Abstract: A read/write device for a disk drive is disclosed. The read/write device includes a pre-amplifier and a recording head. The read/write device also includes a write signal path between the pre-amplifier and the recording head. The write signal path includes a write current. The read/write device also includes a read signal path between the pre-amplifier and the recording head. The read signal path includes an induced current related to the write current. The read/write device also includes a shunt path in the pre-amplifier to draw a part of the induced current from the read signal path.

Abstract: In order to solve a problem that it takes a long time to shift from a write mode to a read mode when there is a cross talk of an output signal of a recording head to a reproducing amplifier side, there is provided a reproducing amplifier including an amplifier circuit portion having a differential pair of transistors is provided with a switching circuit comprised of switches connected with resistors, which supply a bias voltage to each base of the differential pair of transistors, respectively in parallel. The switching circuit turns on for a write mode period and for a fixed period after a change from the write mode to a read mode to decrease the input impedance of the reproducing amplifier for the periods.

Abstract: A magnetic disk read/write circuit comprises a core having a pair of coils wound such that signals supplied to the coils becomes opposite in phase and a read circuit having a first input terminal connected to one of terminals of a read head through one of the coils to receive a read signal from the read head and a second input terminal connected to the other terminal of the read head through the other coil to receive the read signal from the read head or a write circuit in which the read head is a write head, the signal at the first input terminal is a signal at the first output terminal and the signal at the second input terminal is a signal at a second input terminal.

Abstract: A feedback system includes an emitter-follower as a gain stage in the forward path. The emitter-follower has a very wide band width and does not, by itself, effectively narrow the bandwidth of an information channel in which it is used. Emitter-followers are frequently used as buffers in many gain systems so using an emitter-follower which is already present effectively reduces die area for the feedback system. In an embodiment, the feedback system includes a differentiator with a programmable zero in the feedback path. The zero in the feedback path creates a pole in the forward path and the programmed location of the zero influences the pole and controls the bandwidth of the forward path. The emitter-follower also buffers the differentiator so that it does not effect the operation of any prior gain stages in which the feedback system is used.

Abstract: The present invention includes a circuit which can achieve a 200 nano second write to read time. The present invention eliminates a switch in the RMR measurement circuit.

Abstract: Sense current is applied in pulses, synchronized with the timing clock generated by a clock generator 5, to transducer 2 in the information storage device, reducing the time-averaged value of the sense current. The recorded information on the magnetic disk medium 1 is reproduced by the MR head as reproducing signal pulses in synchronism with the above timing clock. The amplitude of the reproducing signal pulses are proportional to the magnetic field of the magnetic disk medium 1. The reproducing signal pulses are sample-held by a sample-hold circuit 6, and after being digitized by an A/D converter 7, recorded data are retrieved through a demodulator circuit 8 of a partial-response system.

Abstract: A preamplifier system is provided for connection through an interconnect to a read head. The interconnect has a characteristic impedance associated therewith. The preamplifier system includes an amplifier circuit having an input for connection to the interconnect. The amplifier circuit amplifies an input signal carried from the read head through the interconnect, yielding an amplified input output signal. A feedback resistance is connected between the amplified output signal and the input of the amplifier circuit. The feedback resistance has a value selected to provide an effective input impedance of the preamplifier system to match the characteristic impedance of the interconnect.

Abstract: A drive circuit for a magnetic recording device is provided in which the stray capacitance and stray inductance of the peripheral wiring of the drive circuit is reduced. Also, the drive circuit increases the read/write frequency of data and the recording density of the magnetic recording device. Specifically, the drive circuit contains a write driver, a read preamplifier, a write predriver, a read postamplifier, and a current signal detecting circuit. The write driver inputs write data and outputs a corresponding writing current to a write head to store information onto a magnetic disk. The read preamplifier supplies a bias current to a read magnetic head to sense information stored on the magnetic disk and amplifies the information as output data. The write predriver inputs a write data signal via a data signal line and a write mode signal and supplies the write data to the write driver based on the write mode signal.

Abstract: An interface 400 for interfacing an optical pickup 101 is associated with processing circuitry 100. A plurality of inputs receive data retrieved from an optical disk by the pickup and 401, 402, 403 are each coupled to a corresponding one of the inputs and independently activated and deactivated to selectively pass the data to the processing circuitry.

Abstract: The storage device comprises a magnetic disk having a servo region with a two lines of servo pattern for each track, a servo demodulator for detecting a position of a head on the disk according to the servo patterns as a detected position signal, a comparing section for outputting a difference between a target position signal and the detected position signal as a positional error signal, an amplifying section for amplifying the positional error signal with a gain G1 lower than a gain G0 at the time of data reading, and a controlling section for outputting a VCM operation rate signal according to an operation rate for a VCM for moving the magnetic head to the VCM according to the amplified positional error signal.

Abstract: A circuit includes a differential amplifier that generates a differential offset signal on its output terminals. The circuit also includes an offset compensator that has input terminals respectively coupled to the amplifier output terminals and a compensation terminal coupled to the differential amplifier. The compensator maintains the differential offset signal at a predetermined value, for example 0 V. When used in an integrated read-head preamplifier, such a circuit compensates for the nonzero head bias voltage, i.e., the preamplifier input offset voltage, without using a component that is external to the integrated preamplifier circuit.

Abstract: A method and system for reproducing digital data read from a storage device. A second-order differentiation of a digital signal representing the digital data is calculated to control an automatic gain control (AGC) and phase lock loop (PLL) to rapidly correct amplitude and frequency offset of the digital signal being read from the storage device.

Abstract: Provided is an insulation resistance measuring apparatus capable of highly precisely measuring an insulation resistance characteristic of a capacitive electronic part in a short period of time while being unaffected by various kinds of noises such as from a power supply, measured power supply and the measured capacitor. A predetermined measurement voltage is applied to a capacitive electronic part, and a current flowing through the electronic part is measured in order to calculate an insulation resistance characteristic of the electronic part. A noise clipper circuit having a resistor and a switch connected in parallel with each other is connected on a path leading from a measurement power supply through the capacitive electronic part to a current detector. The switch is controlled to remain closed in an early stage of charging the capacitive electronic part. When charging the capacitive electronic part has progressed sufficiently, the switch is controlled to open.

Abstract: A preamplifier system includes an amplifier stage having at least one feedback network. The feedback network has a feedback resistance that may be adjusted to improve a frequency response of the preamplifier. A feedback control system is operative to set the resistance of the feedback network as a function of a resistance value of an associated read/write head.

Abstract: A magnetic recording and reproducing apparatus includes a read/write signal processor having a write data generator arranged to be of an interleave system and transmitting/receiving data to/from the read/write amplifier via a plurality of signal lines. In addition, the read/write amplifier has a compound circuit provided for the write data of the interleave system from the read/write signal processor and is formed as an integrated circuit, moreover, a 1/2 prescaler is provided at the output of the write data generator, transmitting and receiving write data in Non-Return-To-Zero-Interleave CODE.

Abstract: The present invention provides an apparatus, system and method of improving the bias response time for pre-amplifier circuits which utilize noise reduction capacitors 275. The system uses a quick recovery circuit 210 electrically connected to the capacitive node 216 of the pre-amplifier circuit. The quick recovery circuit 210 comprises a gain amplifier 218 with a resistive input and a controlled current source 219. The controlled current source corresponds to adjustments in a controlled current source 225 of the pre-amplifier and is electrically connected to the resistive input of the gain amplifier 218. The gain amplifier 218 can be selectively switched 211 to operatively connect an output to the capacitive node 216 of the pre-amplifier circuit.

Abstract: A sampled amplitude read channel is disclosed for magnetic disk storage systems utilizing a read head exhibiting a non-linear response such as a magneto-resistive (MR) read head. A sensor of the read head is adjusted to operate in a region of its response that provides optimum gain even though it may be a region of higher non-linearity. To compensate for the non-linearity introduced into the read signal, the read channel further comprises an adaptive non-linear correction circuit that is adaptively tuned by a least-mean-square (LMS) adaptation circuit. The analog read signal is sampled and the discrete time samples equalized into a desired partial response prior to sequence detection. The non-linear correction circuit is inserted into the read path prior to the sequence detector in order to attenuate the non-linear distortions that would otherwise degrade the performance of the sequence detector.

Abstract: A device for reading magnetic information, having at least one read head including at least one magnetoresistive bar MR for generating data pulses representative of information read by the head. To enable the bar to be biased accurately without requiring a measurement of the quiescent resistance of the bar, the device includes a control loop for controlling the power dissipated in the magnetoresistive bar, the control loop having a time constant which is large with respect to the duration of the data pulses.

Abstract: An offset correction circuit to correct DC offset in accordance with a data rate includes a detection circuit to detect a thermal asperity signal and a filter circuit to respond to the thermal asperity signal in accordance with the data rate.

Abstract: An apparatus and method for supplying bi-directional load current to a load device. Four current sensing metal oxide semiconductor field effect transistors are operably configured to form an H-bridge with the load device, each transistor having separately insulated gate, source and drain and sense terminals with a source to drain conductivity determined in relation to a voltage applied to the gate terminal and a sense current from the sense terminal determined in relation to a magnitude of source to drain current. Drive voltages are applied to the gate terminals of alternating pairs of the transistors to apply the load current to the load device. The sense currents are used to provide adaptive, closed-loop clamping of the drive voltages at levels sufficient to maintain the non-load current conducting transistors in a quiescent state.

Abstract: The storage media recording/writing system includes a media drive circuit, a head retaining means, a head moving means, a head drive circuit, a signal processing circuit, and a controller to control these. The head drive circuit possesses a first semiconductor integrated circuit having an amplifier that amplifies the read signal from the head, and a second semiconductor integrated circuit placed between the first semiconductor integrated circuit and the signal processing circuit, which has a circuit that receives write data from the signal processing circuit and generates a drive signal to drive a write head. Further, the first semiconductor integrated circuit is mounted on a part near the front of the head retaining means, and the second semiconductor integrated circuit is installed on the side of the moving means.

Abstract: A magnetic reproducing device which includes a signal detecting means for detecting a signal from a magnetic recording medium by a coil, an amplifying means for amplifying the signal detected by the signal detecting means, a filtering means for filtering the signal amplified by the amplifying means, and a capacitor connected in parallel to the coil of the signal detecting means. In this device, the actual resonance frequency of a resonance circuit including the coil, the capacitor and a floating capacitance is set to be four to eight times the maximum reproduced frequency, thereby attenuating the high-frequency high-energy electromagnetic noise inputted to the magnetic reproducing device.

Abstract: An apparatus and method for calibrating a cutoff frequency of a tunable filter, such as a tunable filter coupled to a read channel of a data storage system is disclosed. A calibration circuit includes a variable gain amplifier (VGA), an envelope detector, and a tunable filter coupled therebetween. A calibration signal having a preestablished frequency representing a specified cutoff frequency associated with the tunable filter is applied to the VGA. The gain of the amplifier is adjusted until an amplitude of an output signal provided by the filter is substantially equal to a first predetermined amplitude. A cutoff frequency of the filter is then adjusted until an amplitude of an output signal provided by the filter is substantially equal to a second predetermined amplitude, at which time the desired cutoff frequency of the tunable filter is precisely established. A single cutoff frequency or the low and high cutoff freqencies of a range of cutoff frequencies may be calibrated.

Abstract: A magnetic head driving circuit includes a main driving circuit symmetrical with respect to a centered recording coil, and at least two pairs of adding circuits, each pair including a positive pulse adding circuit and a negative pulse superposed circuit symmetrical with respect to the centered coil. And, by reversing the direction of the magnetic head coil current, at least one of the adding circuits is made to operate and make it as a magnetic head driving circuit for adding a potential equal to or higher than the power supply, thereby to drive as a sub-driving circuit arranged symmetrically with respect to the centered coil, which promotes the reversal of the magnetic head coil current, and which drives stably with a central potential of the coil at about the disk potential.

Abstract: A system and method are provided for calibrating a corner frequency of a tunable filter using an ADC code difference method. A method for calibrating a corner frequency of a tunable filter in a direct access storage device includes generating a signal having a frequency within a pass band of the tunable filter to be passed to the tunable filter. The gain of the signal is adjusted to a first threshold level. The corner frequency of the signal is shifted to a second threshold level, whereby the corner frequency of the tunable filter is calibrated at a desired frequency. A system for calibrating a corner frequency of a tunable filter in a direct access storage device includes calibrate control logic coupled to a tunable filter. A signal source generating a signal having a frequency within a pass band of the tunable filter to be passed to the tunable filter is coupled to the tunable filter by a variable gain amplifier. An analog-to-digital converter (ADC) is coupled to the tunable filter.

Abstract: A preamplifier for a multi-head disk drive includes a circuit that tests the connectivity of each magnetic head in the disk drive by driving each head with a small current, and detecting the flow of this current. By driving and sensing the current flowing through the magnetic heads, both open-circuit faults and bridging faults can be detected. In a preferred embodiment, each head is tested sequentially. The result of each test is stored as a bit value in a register, for subsequent access. The circuit may be activated by a test device, or by a microcontroller in an assembled disk drive. To minimize costs, the circuit is integral to the circuitry that is conventionally used to read and write information via the magnetic heads. The oscillator that is conventionally used to characterize the read heads of a disk drive is used in a preferred embodiment to control the sequencing of tests through each head.

Abstract: A magnetic storage apparatus includes first and second control devices to effectively reduce a disturbance which occurs in a read channel of the apparatus upon transition from a write mode to a read mode. The first control device is in a first gain stage coupled to a read sensor. The second control device is a back-end circuit and, in addition to reducing the duration of the write-to-read disturbance, is effective to significantly reduce offset of the apparatus. A user interface in the form of a serial interface allows user programmability of both of the first and second control devices. The serial interface and the read channel with the first and second control devices are embodied in a pre-amplifier integrated circuit. The programmability affords flexibility to the IC manufacturer as well as to the manufacturer of the magnetic storage device in optimizing the read channel to account for model-to-model and unit-to-unit variations in the write-to-read disturbance.

Abstract: A differential amplifier circuit for amplifying an input signal and for providing an output signal representative of the input signal includes first and second amplifier circuits, and first and second coupling circuits. The first and second amplifier circuits each include first and second transistors, a resistor, and a current generator. The first coupling circuit includes a transistor, a capacitor, and a current generator, and couples a first input signal node to the first transistor of the second amplifier circuit. The second coupling circuit includes a transistor, a capacitor, and a current generator, and couples a second input signal node to the first transistor of the first amplifier circuit.

Abstract: A method and system for providing a current-sensing preamplifier for use with a magnetoresistive sensor is disclosed. The method includes providing at least one input device coupled with the magnetoresistive sensor, providing a gain stage, and providing a feedback circuit. In a system aspect, the current-sensing preamplifier includes at least one input device. The at least one input device is coupled with the magnetoresistive sensor through an interconnect having a characteristic impedance. The at least one input device provides an input impedance for the current-sensing preamplifier. The current-sensing preamplifier also includes a gain stage coupled with the at least one input device and a feedback circuit coupled with the gain stage and the at least one input device. The feedback circuit provides at least one signal to the at least one input device. The at least one signal controls the input impedance based on at least one error signal.

Abstract: There is disclosed a disk drives of the perpendicular magnetic recording system capable of using a data channel of the longitudinal magnetic recording system. The drive has a preamplifier including a differentiation circuit which differentiates a read signal output from a read head. The preamplifier includes an adjusting circuit which adjusts low cut-off frequency for restricting waveform deformation of a read signal of rectangular waveform, as a front stage of the differentiation circuit.

Abstract: An apparatus and method for estimating one or more pole frequencies of an amplifier circuit, such as a readback signal amplifier circuit implemented in an arm electronics module of a data storage system, are disclosed. A bias signal that biases the read transducer is modulated at first and second modulation frequencies while a readback signal is obtained from a data storage medium using the read transducer. The readback signal is communicated to the amplifier, and an output signal of the amplifier circuit is measured at the respective first and second modulation frequencies. The amplifier pole frequency is determined by computing a square impedance measurement ratio using square magnitudes of the bias signal and the amplifier output signal respectively measured at the first and second modulation frequencies.

Abstract: A floppy disk drive comprises at least a data read/write-unit for reading or writing data through a head, motor drivers for driving a spindle motor and a stepping motor, a control unit for controlling overall operation of the floppy disk drive, and a data output unit for supplying data to a main controller via a set cable. The data output unit comprises an output transistor outputting the data to the set cable and supplied with a pull-up current from the main controller via the set cable, and a pull-up transistor and a pull-down transistor connected in series between a power source terminal and a ground. The pull-up transistor and the pull-down transistor drive the output transistor in cooperation, and a current limiting resistance is connected in series to the pull-down transistor.

Abstract: Preamplifiers are used in hard disk drive applications to read data stored on magnetic disk. Current bias current sense preamplifiers have a problem with bandwidth rolloff due to relatively high inductance. Voltage sense preamplifiers have a problem with peaking due to input capacitance. An improved current bias voltage sense preamplifier inserts a PMOS transistor M3 between the Rmr head and the bipolar transistor Q0. The PMOS transistor M3 and the bipolar transistor Q0 form a high impedance voltage sense preamplifier. Biasing of the MR head is performed transistors M6 and M7 that mirror the current supplied by the current digital to analog converter into the MR head. Hence, the preamplifier is also of the current bias type. Peaking is controlled through a programmable current in an input capacitance cancellation circuit 30.

Abstract: A read/write driver with a read/write head made of semiconductor material for writing and reading data from data media with a preamplifier forming a part of the read/write head for processing write signals from said read/write driver and driving a magnetic coil for writing, with power connections to the preamplifier thereby powering the coil. Also, a process for making the read/write head of the invention is described.

Abstract: Adaptive channel optimization in a disk drive is achieved by selecting a track of the recording medium and then writing a first data pattern to opposite sides of the selected track. The first data pattern is written a certain percentage off-track in relation to the centerline of the selected track. A second data pattern is then written directly on the selected data track and the off-track margin is determined as a function of how far the recording head can be positioned away from the center of the selected track during reading of the second data pattern while meeting a specified error rate. The off-track margin test is repeated iteratively using a combination of channel variable settings in order to find a set of variable settings which provides an optimal performance criterion for the drive.

Abstract: A circuit arrangement for correcting magneto-resistive head asymmetry includes a shift circuit which receives a read signal from a magneto-resistive head, and a polarity signal indicative of the polarity of any asymmetry of the read signal. Depending on the polarity of the asymmetry, the shift circuit either adds or subtracts a shift voltage to the read signal to produce a shifted read signal. The shift circuit outputs the read signal, the shifted read signal, and the shift voltage. First, second and third gain circuits are provided, which receive the read signal, the shifted read signal, and the shift voltage, respectively, and which each receive a respective control signal. The first, second and third gain circuits provide respective outputs amplified proportionally based on the respective control signals. Control circuitry provides the polarity signal to the shift circuit and the respective control signals to the first, second and third gain circuits, based on an amount of correction required.

Abstract: A data storage system and device is provided in which parasitic capacitance between multiple preamplifiers and a signal channel is minimized. Multiple read signals from multiple data heads are amplified by corresponding ones of the multiple preamplifiers. A connection device coupled to each of the multiple preamplifiers selectively electrically couples the amplified read signal from the active preamplifier to the signal channel, while electrically isolating the amplified read signals from the inactive preamplifiers from the signal channel. In addition, a method of coupling multiple preamplifiers to a signal channel is provided.

Abstract: A magneto-resistive head preamplifier structure has a difference amplifier with cross-coupled transistors configured to cancel the adverse effects on preamplified output signals due to parasitic capacitance associated with the difference amplifier transistors. The cross-coupled transistors extend the useable bandwidth of the preamplifier by substantially reducing internally generated thermal noise.

Abstract: A method and apparatus for processing a readback signal obtained from a storage medium using a magnetoresistive (MR) element restores a thermal signal component of the signal. A readback signal obtained from the storage medium comprises a thermal component representing a thermal response of the MR element, and may further comprise a magnetic component representing servo or user data. The readback signal is filtered so as to degrade the thermal component of the signal, typically by amplification circuitry exhibiting a highpass filtering behavior. The highpass filtered readback signal is further filtered using a lowpass filter. The filtered signal is sampled, and a sliding window comprising a series of binary values is applied to groups of the signal samples to produce a plurality of signal sample values for each of the signal sample groups.

Abstract: A method and apparatus for high voltage applications, with the latest MOSFET technology having limited terminal-to-terminal voltage capability, includes a switch circuit having at least two serially coupled MOSFETs and a two-stage MOSFET connection using a plurality of resistors, and/or a bipolar transistor, and a plurality of diodes. One of the high voltage applications is a high speed write driver in a computer disk drive. The switch circuit switches on/off between zero volt and a voltage higher than a maximum terminal-to-terminal voltage of a single MOSFET which is typically five volts. A required voltage in high voltage applications can be in excess of, for example, 8 or 9 volts.

Abstract: A variable gain amplifier to output a differential output signal includes an input circuit to input a differential input signal, a buffer circuit to buffer the differential output signal to a common mode voltage, a compensation circuit to compensate the differential output signal to prevent variation in the differential output signal, and a comparison circuit to compare the common mode voltage to a predetermined voltage and to adjust the common mode voltage to equal the predetermined voltage.

Abstract: A dB gain amplifier for providing a levelized output signal includes a first transconductance circuit to output a first current in a first current path, a second transconductance circuit to output a second current in a second current path, a first current mirror to control the first current in the first current path, a second current mirror to control the second current in the second current path, and a DAC circuit to control the first and second current mirrors piecewise linearly.

Abstract: An apparatus and method for determining the configuration of a disc drive head-disc assembly (HDA). The HDA includes an array of rotatable discs and an actuator adjacent the discs, with the actuator supporting a maximum number of heads in a fully populated configuration and a reduced number of heads in a depopulated configuration. Each head is disposed at a unique head position. During each spin-up of the disc drive, a servo circuit determines an impedance of a selected head position having a head when the disc drive is fully populated, but not when the disc drive is depopulated. The servo circuit identifies this configuration of the HDA in relation to the determined impedance, and initializes the drive accordingly. The drive then identifies the configuration of the HDA based on the value of the impedance, initializing the drive accordingly.

Abstract: In a disk drive of the perpendicular magnetic recording method, there is disclosed a servo data encoding method for recording servo data with a particularly low frequency on a disk. The coded data of the servo data by this method is coded with DC free code which is capable of suppressing a direct current component of the read signal waveform. As a consequence, in the case where signal processing is conducted in the read/write channel by the cut-off low frequency characteristic, a waveform distortion can be suppressed which is generated in the read signal waveform by the cut-off low frequency characteristic. Consequently, an improvement in the read error rate in the read/write channel can be realized.

Abstract: A circuit (50,100,1 12,1 30) for detecting a fault in a magneto-resistive head (18) includes a transconductance amplifier (52) having an input across which the head (18) is connected. A circuit (130) for determining a ratio of a current in the head, I VMR, to a variable control current, I1, is applied to maintain a substantially constant voltage at an output of the transconductance amplifier (52). The current, IVMR, in the head is a function of the variable control current, I1, The circuit for determining a ratio of a current, IVMR, flowing in the head (18) to the variable control current, I1, comprises first (112) and (100) second current mirrors, the first current mirror (112) mirroring the current flowing in the head (18), and the second current mirror (101) mirroring the variable control current, I1, Circuitry (132,135) is provided that triggers fault indicating output signals if the ratio falls outside a predetermined range.

Abstract: A preamplifier for an MR element having first and second ends includes first and second feedback loops controlling the biasing of the MR element. The first feedback loop responds to a center voltage of the MR element to control a current source coupled to the first end of the MR element, and the second feedback loop responds to an output voltage across the MR element to control a current sink coupled to the second end of the MR element. In one embodiment, the preamplifier includes a multiplexer coupled between first and second MR elements and the first and second feedback loops. The multiplexer electrically isolates the first and second MR elements to improve common-mode rejection and feedback performance of the preamplifier.

Abstract: A system for preventing off track data write operations in data storage devices such as hard disk drives. In a preferred embodiment, the amplitude of a head output signal is monitored. The output signal amplitude value is determined by measuring the voltage of a capacitor used in a Variable Gain Amplifier (VGA) in an Automatic Gain Control (AGC) circuit of a hard disk drive channel unit. The measured head output signal amplitude is compared with a previously determined minimum normal head output signal amplitude reference value to determine whether the head output signal amplitude is within a normal operating range. If the measured value is less than the reference value then the head is in an off track position, and the data write operation is inhibited. Radial position dependent amplitude reference values can also be used.

Abstract: A head apparatus is disclosed which is tough against disturbing noise and superior in the S/N ratio and can cope with an increase of the capacity of a recording medium. A first playback amplifier for amplifying a playback signal of an MR head and a register circuit for setting a bias current to the MR head are formed as a COS IC. The COS IC is mounted on a suspension together with the MR head. A feeble playback signal outputted from the MR head is amplified by the first playback amplifier once and then transmitted to a mother IC over a pair of signal lines. The amplified playback signal is tough against disturbing noise during transmission.

Abstract: In accordance with the present invention, a magneto-resistive head read amplifier circuit is provided which can be incorporated into a magnetic reader for reading information stored in magnetic form on a storage medium. The magneto-resistive head read amplifier of the present invention incorporates an inductor in the bottom current drain of the head read amplifier circuit which reduces or eliminates noise generated by the bottom current source transistor of the head read amplifier circuit. In accordance with a first embodiment of the present invention, the magneto-resistive head read amplifier is a single-polarity head read amplifier circuit which utilizes a bias current having a particular polarity. In accordance with a second embodiment of the present invention, the magneto-resistive head read amplifier is a dual-polarity head read amplifier circuit capable of operating with bias currents of opposite polarity.

Abstract: A disk control apparatus according to the present invention comprising a disk controller for controlling a circuit which controls read operation for reading data from a disk and a CPU for controlling the circuit and the disk controller. The disk controller comprises a buffer memory for storing data being for transferred between a host and the disk controller and a notification section for notifying the CPU that a first state in which an all buffer region of the buffer memory is stored with data to be transferred to the host transits to a second state in which a predetermined space occurs in the buffer region of the buffer memory as a result of transferring data to the host. The CPU comprises a main control section for stopping power supply to the circuit during the first state and for supplying power to the circuit in response to a notification from the notification section.