Specifics Of The Amplifier Patents (Class 360/67)
  • Patent number: 7061321
    Abstract: A read amplifier system for connection through interconnects to a magnetoresistive (MR) head includes two input transistors, two bias transistors connected to the two input transistors by common source connections, a bias voltage control circuit connected to base terminals of the two bias transistors, a common mode voltage control circuit connected between first and base terminals of the input transistors to provide feedback from the first terminals to the base terminals, and a compensating circuit connected between the outputs of the amplifier system and the base terminals of the input transistors for providing a feedback from the outputs to the base terminals. The two base terminals of the input transistors are respectively connected to the interconnects of the MR head. The bias voltage control circuit applies a bias voltage to base terminals of the two bias transistors, and through the common sources to the base terminals of the input transistors, and thereby across the MR head.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: June 13, 2006
    Assignee: Guzik Technical Enterprises
    Inventors: Anatoli B. Stein, Serguei Pantchenko
  • Patent number: 7057839
    Abstract: A magnetic recording apparatus has a head for recording information on a magnetic recording medium, a write current setting circuit for controlling a write current that is passed through the head, a fault detection circuit for detecting a fault in the head based on the result of comparison between head voltages appearing at both ends of the head and a reference voltage, and a reference voltage setting circuit for varying the reference voltage according to the write current. This configuration permits correct detection of faults in the head all the time irrespective of the write current or the supply voltage.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: June 6, 2006
    Assignee: Rohm Co., Ltd.
    Inventors: Daisuke Shikuma, Kunihiro Komiya
  • Patent number: 7054085
    Abstract: A read head for use with an interconnect transmission line having a characteristic impedance of Z0 includes a tunnel valve device and a shunt resistor RS that is connected in parallel across the tunnel valve device. The tunnel valve device has a device resistance RT corresponding to a predetermined resistance-area (RA) product. The value of the shunt resistance is based on the parallel combination of RT and RS substantially equaling the characteristic impedance Z0 of the interconnect transmission line. The predetermined resistance-area (RA) product is about equal to at least about 10 Ohms-?m2. Alternatively, the predetermined resistance-area (RA) product is about equal to a “corner” value of RAc for the tunnel valve device.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: May 30, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Tsann Lin, Daniele Mauri, Neil Smith
  • Patent number: 7046044
    Abstract: The present invention comprises a pair of circuits (171, 172) within the first stage (100) of an AC signal pre-amplifier. The present invention reduces the current mismatch at the base of the first stage transistors (141, 142, 143, 144) resulting in faster switching times by reducing input stage offset and, hence improving input dynamic range.
    Type: Grant
    Filed: February 5, 2004
    Date of Patent: May 16, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Yukihisa Hirotsugu, Naoyuki Hanajima, Hisao Ogiwara
  • Patent number: 7038417
    Abstract: Ascertaining through integration a bias calibration level for a current control loop of a driver motor of a tape drive. The driver motor includes a current controller having as inputs a demand signal, a bias signal, and a feedback signal. The current controller includes an integrator coupled to the output. The method includes setting the demand signal to a zero current level, setting the bias signal to a level that substantially prevents the integrator from driving itself high, stepping down the bias signal to form a stepped down bias signal, measuring a sense parameter at the output of the current controller, determining whether the sense parameter is high for the stepped down bias signal, and setting the bias calibration level to a level sufficiently above the stepped down bias signal such that the integrator is not driven high when the demand signal is set to the zero current level.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: May 2, 2006
    Assignee: Certance LLC
    Inventors: Kempton William Redhead, David James Brecht
  • Patent number: 7035030
    Abstract: The present invention provides a magnetic recording and reproducing apparatus having an amplifier apparatus, which is switched from a recording state to a readout state based on a control signal, reads out a signal containing a servo signal by the signal readout means, and includes the amplifier apparatus for amplifying the signal with an amplifier and outputting the amplified signal. In addition, the amplifier apparatus filters the signals by the filtering means that allows the high frequency portion of signals to pass through with a first cutoff frequency during a first prescribed time period after the readout state has been initiated; a second cutoff frequency that is lower than the first cutoff frequency during a second prescribed time period after the first prescribed time period has passed; and a third cutoff frequency that is lower than the second cutoff frequency after the second prescribed time period has passed.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: April 25, 2006
    Assignee: Sony Corporation
    Inventors: Kazue Takayoshi, Michiya Sako
  • Patent number: 7031089
    Abstract: A tape head assembly comprises a transducer head having plural arrays of transducing elements, the transducing elements comprising at least one of write elements and read elements. The tape head assembly further comprises a set of conditioning elements, the conditioning elements comprising at least one of write drivers and read amplifiers. Multiplexing circuitry selectively couples the conditioning elements to one of the plural arrays of transducing elements.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: April 18, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Lawrence A. Hansen, Ralph F. Simmons, Jr.
  • Patent number: 7027249
    Abstract: The invention enables a magnetic disk drive to be inserted and removed against an attraction force exerted by a magnetic force that is strong enough to erase data on a magnetic disk enclosed within a metal case. A converting mechanism comprising a ballscrew and a ballscrew nut bracket is provided that converts rotational motion of a handle into translational motion of an HDD holder; by rotating the handle, the HDD holder with the hard disk drive mounted thereon is moved in the inserting and removing directions by overcoming the attraction force being exerted by the magnetic field generated by means of a permanent magnet. An electric motor may be used to generate the rotational force.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: April 11, 2006
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Hasegawa, Hisato Suzuki, Kazutoshi Suzuki, Hiroyuki Uematsu, Takahiro Ono
  • Patent number: 7027245
    Abstract: An apparatus for providing head amplitude characterization using gain loops is disclosed. A variable gain amplifier (VGA) receiving input signals and generates a VGA output signal. A digital-to-analog converter (DAC) circuit provides a desired input signal to the VGA and a gain control loop drives the VGA to gain lock the VGA to the provided desired input signal. An analog-to-digital converter (ADC) provides a digital output representing an ADC code spread in response to the VGA output. A controller drives the DAC to provide the desired input signal to the VGA and generates control signals for controlling the ADC, the controller further determines read head channel amplitude based upon the signal provided to the DAC, the ADC code spread received from the ADC and gain code provided by the gain control loops.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: April 11, 2006
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Chad E. Mitchell, Vicki L. Pipal, Joey M. Poss, Raymond A. Richetta
  • Patent number: 6987633
    Abstract: A method and apparatus to read calibration information from a calibration region encoded in a tape information storage medium while acquiring a plurality of valid calibration signals. The method provides (N) read/detect channels. The method establishes a valid calibration signal threshold, and detects at a first time the (i)th valid calibration signal. The method further determines at the first time the frequency and phase of that (i)th valid calibration signal using a first PLL component disposed in the (i)th read/detect channel. The method determines if the valid calibration signal threshold is exceeded. If the valid calibration signal threshold is exceeded, the method then provides the frequency and phase to a second PLL component, and reads information encoded on the tape medium using that second PLL component.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: January 17, 2006
    Assignee: International Business Machines Corporation
    Inventor: Robert A. Hutchins
  • Patent number: 6987634
    Abstract: A high-speed transmission circuit includes an inductive head. The high-speed transmission circuit also includes a non-uniform transmission line having a variable characteristic impedance. The non-uniform transmission line is coupled between the inductive head and an endpoint node such that pulses are conducted over the non-uniform transmission line. The variable characteristic impedance is greater near the inductive head than near the endpoint node.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: January 17, 2006
    Assignee: Marvell International Ltd.
    Inventors: Farbod Aram, Leechung Yiu, Sehat Sutardja
  • Patent number: 6987628
    Abstract: A method and apparatus for detecting a high flying condition of a transducer head in a computer disk drive is provided. The method and apparatus allow the detection of high fly write events that occur over one or a small number of data sectors. In addition, the present invention provides a method and apparatus for detecting high fly write events with a great deal of sensitivity. The method and apparatus of the present invention provide quick response and high sensitivity by monitoring the strength of a signal derived from data written to the disk, and signaling a high fly write event if the monitored signal strength in connection with a particular piece of data is less than a stored high fly write number corresponding to that piece of data by a predetermined amount.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: January 17, 2006
    Assignee: Maxtor Corporation
    Inventors: Jerry A. Moline, Bruce Liikanen, Julian Lewkowicz
  • Patent number: 6975475
    Abstract: The invention includes a testing method which may be applied to at least one writer in a disk drive during the self-test phase to generate write parameters, focused on the Over Shoot Control (OSC) of the write current parameter to improve the reliability of write operations by that writer. The Minimum OSC is used for write operations in normal temperatures. The Optimum OSC is used for a first lower temperature range, preferably between essentially 15° Centigrade and essentially 5° Centigrade. The Maximum OSC is preferred below essentially 5° C. The Minimum OSC should preferably guarantee both an Adjacent Track Write (ATW) criteria, as well as guarantee a Write Induced Instability (WII) criteria. The invention includes the write parameter collection, as well as the disk drive containing the generated write parameter collection.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: December 13, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hae Jung Lee, Sang Lee, Keung Youn Cho
  • Patent number: 6972916
    Abstract: A magnetic storage system includes a preamplifier writer that selectively drives a write current through a write head to write data to a magnetic storage medium. The write current generated by the preamplifier writer has a boost stage and a settling stage. An impedance changing circuit communicates with the preamplifier writer and the write head and provides a lower resistance value during the boost stage and a higher resistance value during the settling stage.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: December 6, 2005
    Assignee: Marvell International Ltd.
    Inventors: Farbod Aram, Sehat Sutardja
  • Patent number: 6972920
    Abstract: A method and apparatus for preventing an adjacent track erase effect due to a magnetic head. In the method, a write command is received, an ambient temperature of a hard disc drive is measured, and whether the ambient temperature exceeds a threshold temperature is determined. If the ambient temperature exceeds the threshold temperature, the intensity of a write current is adjusted according to the position of a magnetic head on the hard disc drive. If an overshooting value of the write current exceeds a predetermined steady-state value, the overshooting value of the write current is adjusted. Applying the write current having the intensity and the overshooting value adjusted to the magnetic head. An algorithm having writing intervals can also be used in a hard disc drive. Thus, a writing field can be minimized and made suitable for variations in the temperature of the hard disc drive and coercivity of a magnetic disc so that an adjacent track erase effect can be reduced.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: December 6, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-il Kim, Jae Myung Jung
  • Patent number: 6970313
    Abstract: A write compensation circuit of a recording device includes a first delay portion driven by a first driving voltage, for receiving a clock signal, delaying the clock signal by a first delay time, and outputting the delayed clock signal, and a voltage supplying portion for supplying the first driving voltage to the first delay portion in such a manner that the first delay time is substantially equal to a clock period of the clock signal.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: November 29, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirokuni Fujiyama, Shiro Dosho, Hiroyuki Nakahira, Akira Yamamoto, Hiroki Mouri
  • Patent number: 6967797
    Abstract: A write driver circuit for driving a magnetic head applicable to a variety of magnetic heads or magnetic storage media is disclosed. The circuit includes a write current generating section for generating plural types of write current for magnetizing a predetermined area of a magnetic storage medium in a predetermined direction; a switching signal generating section for generating a switching signal for switching among the write currents; a switching section for changing the direction of magnetization through the magnetic head by switching among the write currents based on the switching signal; and an overshoot current generating section for generating an overshoot current for instantaneously increasing the write current when the direction of magnetization is changed by the switching section; wherein the circuit further includes an overshoot current generation signal producing section, and is designed so that the overshoot current is generated based on an overshoot current generation signal produced thereby.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: November 22, 2005
    Assignee: Sony Corporation
    Inventor: Michiya Sako
  • Patent number: 6965266
    Abstract: A high voltage differential amplifier including an input differential pair of low voltage transistors, a sense differential pair of low voltage transistors, first and second high voltage transistors, a low voltage bias transistor, a cascaded pair of low voltage transistors, and an output pair of high voltage transistors. The sense differential pair has a pair of control terminals that detect a common mode voltage of the differential input signal, and establishes a sense node which follows the common mode voltage. The first high voltage device is coupled to the sense node to establish bias node voltage levels which track the common mode voltage, including an output bias node biasing the output pair and a cascade bias node biasing the cascaded pair. In this manner, the terminals of the low voltage devices slide up or down with the common mode voltage and are protected from high voltage levels.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: November 15, 2005
    Assignee: Intersil America's Inc.
    Inventor: Sumer Can
  • Patent number: 6963459
    Abstract: There is disclosed a disk drive which can appropriately execute a gain control of an AGC amplifier included in a read channel for each zone on a disk. A CPU refers to table information stored in a memory, and reads initial gain data corresponding to the zone during switching of the zone as a read object. The CPU sets the read initial gain data into the AGC amplifier.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: November 8, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuji Sakai
  • Patent number: 6958875
    Abstract: A self-vaccine as used herein will refer to methods of operating a disk drive and the apparatus implementing such methods, which make the disk drive immune to changes in temperature, that keep the disk drive healthy when hot or cold. The invention includes a self-vaccine extending the read channel optimization parameter database of a track zone or sequence to test temperature ranges actually found in the user's operation of the disk drive. The invention also includes the self-vaccine updating the read channel optimization parameter database for an already tested temperature range, whenever there has been sufficient time passed since the read channel optimization was performed for that temperature range. The invention includes read channel optimized parameters for at least temperature ranges within the embedded disk controller, which are updated in the user's operating environment during idle time providing the self-vaccine. The invention includes disk drives including a self-vaccine method.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: October 25, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Yun Yun, Yeong Kyun Lee, Kang Seok Lee, Ho In Sou
  • Patent number: 6958872
    Abstract: A circuit for measuring signal output of a transducer includes an amplifier having a differential input and a single ended output referenced to a fixed potential. One transducer terminal is coupled through a source follower to an input terminal of the differential input and the other transducer terminal is coupled through a source follower and a resistive element to the other input terminal of the differential input whereby the transducer terminals are isolated from the fixed potential. A voltage to current converter converts the voltage at the single ended output to an output current that is applied to an input branch of a current mirror. A first output branch of the current mirror supplies a current equal to the converter output current to one terminal of the differential input. A second output branch of the current mirror supplies a current equal to the converter output current to the other terminal of the differential input.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: October 25, 2005
    Assignee: Marvell International Ltd.
    Inventors: Yi Cheng, Steven Lam
  • Patent number: 6954322
    Abstract: The invention provides a method insuring that each read channel optimization step is controllable in terms of quality divergence, that a systematic response can be made which can be readily automated. The method is applicable to a pre-existing read channel optimization (RCO) script. The method includes the following operations. Acquiring a first quality measure and a first parameter list. Performing the pre-existing RCO script creating a second quality measure and a second parameter list based upon the first parameter list. Convergence processing the first and second quality measures and parameter lists.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: October 11, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Yun Yun, Chin Won Cho, Hu Yul Bang, Jae June Kim
  • Patent number: 6954407
    Abstract: A device for amplifying and converting current signals into voltage signals for processing The current signals are delivered by sensors, e.g. optical transducers, magnetical heads. The current signals are first amplified using a current to current amplifier, the amplified current signals are then transported using electrical conductors and eventually amplified using a current to voltage amplifier. The invention may find application in consumer electronic devices, cars, planes, industrial machines.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: October 11, 2005
    Assignee: Deutsche Thomson-Brandt GmbH
    Inventor: Guenter Gleim
  • Patent number: 6947238
    Abstract: A bias circuit for a magneto-resistive head having a bias current output circuit for flowing a bias current through a magneto-resistive head, and a feedback circuit for controlling the bias current from a bias current output circuit by detecting voltage variation across the magneto-resistive head so that a voltage across the magneto-resistive head becomes a predetermined value. The bias current output circuit comprises a regulating circuit for regulating an operation of the bias current output circuit in the bias current output circuit, a control circuit for controlling the regulating circuit to be in a predetermined condition, and a switching circuit for switching a read/write condition for activating the control circuit for the regulating circuit in a non-read condition of the magneto-resistive head. The regulating circuit includes an oscillation suppressing capacitor; and the control circuit for the regulating circuit is a charging circuit for the oscillation suppressing capacitor.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: September 20, 2005
    Assignee: Sony Corporation
    Inventors: Kazue Takayoshi, Michiya Sako
  • Patent number: 6940673
    Abstract: A magnetic reproducing device which includes a signal detecting means for detecting a signal from a magnetic recording medium by a coil, an amplifying means for amplifying the signal detected by the signal detecting means, a filtering means for filtering the signal amplified by the amplifying means, and a capacitor connected in parallel to the coil of the signal detecting means. In this device, the actual resonance frequency of a resonance circuit including the coil, the capacitor and a floating capacitance is set to be four to eight times the maximum reproduced frequency, thereby attenuating the high-frequency high-energy electromagnetic noise inputted to the magnetic reproducing device.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: September 6, 2005
    Assignee: Sony Corporation
    Inventors: Satoshi Goto, Junji Takiguchi, Kiyoshi Tada
  • Patent number: 6927933
    Abstract: An apparatus configured according to characteristics for driving a write head to write to a memory device includes: (a) a current directing circuit directing a write current through a first circuit path or a second including the write head in response to a first or second write signal; (b) at least one of: (1) an impedance system for including at least one impedance unit within each of the first and second current paths; and (2) a current system for including at least one circuit element between a locus at each end of said write head and a supply voltage; and (c) a control unit coupled with at least one of the impedance system and the current system for effecting the including for at least one of the impedance system and the current system to effect configuring the apparatus.
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: August 9, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Davy H. Choi, Chuanyang Wang
  • Patent number: 6920002
    Abstract: In order to solve a problem that it takes a long time to shift from a write mode to a read mode when there is a cross talk of an output signal of a recording head to a reproducing amplifier side, there is provided a reproducing amplifier including an amplifier circuit portion having a differential pair of transistors is provided with a switching circuit comprised of switches connected with resistors, which supply a bias voltage to each base of the differential pair of transistors, respectively in parallel. The switching circuit turns on for a write mode period and for a fixed period after a change from the write mode to a read mode to decrease the input impedance of the reproducing amplifier for the periods.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: July 19, 2005
    Assignee: Sony Corporation
    Inventors: Michiya Sako, Kazue Tokuchida, Keiji Narusawa
  • Patent number: 6909569
    Abstract: One circuit generates a constant positive potential, another circuit generates a constant negative potential. The positive potential and the negative potential are applied to a magneto-resistive head that reads data from and writes data to a magnetic disk. The positive potential is generated using a positive voltage source, an operational amplifier, and an NMOS transistor. The negative potential is generated using a negative voltage source, an operational amplifier, and a PMOS transistor.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: June 21, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Chikao Makita, Hideki Miyake
  • Patent number: 6900956
    Abstract: A magnetic circuit is provided in an enclosure that can efficiently generate magnetic flux from the enclosure, configuring a magnetic disk, to a magnetic disk. Thus, by providing such a magnetic circuit, a magnetic field different from that in other enclosure parts, that is, a local magnetic field, is generated from the magnetic circuit in case the disk device is set in an external magnetic field. Hence, this local magnetic field can effectively erase data in the magnetic disk. In particular, since the local magnetic field is generated even if the external magnetic field is weak, it is possible to not only suppress the demagnetization of permanent magnets used in the spindle motor at minimum, but also effectively erase data in the magnetic disk.
    Type: Grant
    Filed: April 4, 2001
    Date of Patent: May 31, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Hiroki Kitahori, Kenji Kuroki, Hiroshi Matsuda, Satoshi Noguchi, Mutsuro Ohta, Keishi Takahashi, Hitoshi Tamura
  • Patent number: 6882486
    Abstract: A disk drive is disclosed comprising a plurality of disk surfaces and a plurality of respective heads actuated radially over the disk surfaces. Each disk surface comprises a plurality of tracks, each track comprising a plurality of data sectors and a plurality of embedded servo sectors, each embedded servo sector comprising a servo sync mark for synchronizing to the embedded servo sector. When the disk drive switches heads, a detection window for detecting the servo sync mark is opened early. An asynchronous gain control algorithm prevents a gain control system from diverging while reading an area of the disk surface preceding the servo sync mark, and a synchronous gain control algorithm maintains a proper gain of the read signal while reading the servo sync mark.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: April 19, 2005
    Assignee: Western Digital Technologies, Inc.
    Inventor: Hanan Kupferman
  • Patent number: 6879456
    Abstract: A write driver circuit selectively provides a write current through a write head in first and second opposite directions. The write driver circuit is connected to the write head through an interconnect. The write driver circuit provides an incident write current signal through the interconnect to the write head, and also provides a reflection cancellation signal through the interconnect to the write head. In an exemplary embodiment, the incident write current signal is provided by providing an incident voltage signal across the write head, and the reflection cancellation signal is provided by providing a reflection cancellation voltage signal across the write head. In an exemplary embodiment, the reflection cancellation signal is a delayed and filtered version of the incident write current signal that cancels a reflected signal that is reflected at the interface between the interconnect and the write head due to impedance mismatching.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: April 12, 2005
    Assignee: Agere Systems Inc.
    Inventors: John D. Leighton, Scott M. O'Brien, Robert J. Wimmer, Nameeta Krenz, Carl F. Elliott, Michael J. O'Brien, Cameron C. Rabe
  • Patent number: 6879455
    Abstract: A voltage-mode boosting write driver circuit (40) having a pair of voltage boosting PMOS transistor sets (44, 46) coupled to a high current H-switch (42). One set (44) of the boosting PMOS transistors correspondingly pulls output pin HY high, while the other transistor set (46) correspondingly pulls output pin HX high and the other output pin HY low thereby significantly improving the head voltage swing, and also achieving a faster slew rate. Moreover, resistors (R3, R4) of the H-switch are both matched to each other and impedance matched to a flex cable (T0) interconnection impedance, which interconnection is coupled to the thin film head, to thereby eliminate signal reflection such that the write current (Iw) settles quickly with minimum ringing to achieve a high data rate. Moreover, less power dissipation and smaller number of devices used are achieved by making use of existing transient currents of the pre-driver emitter follower stage.
    Type: Grant
    Filed: October 19, 2001
    Date of Patent: April 12, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Tuan Van Ngo, Raymond Elijah Barnett, Scott Gary Sorenson
  • Patent number: 6867941
    Abstract: A circuit controls the gain of an amplifier that amplifies an information signal. The circuit includes a buffer for storing first and second samples of the amplified information signal, and a gain-determination circuit coupled to the buffer. The gain-determination circuit generates a gain adjustment based on the sum of the first and second samples, the gain adjustment causing the amplifier to change the amplitude of the amplified information signal to or toward a predetermined amplitude. Such a circuit can provide an initial, coarse gain adjustment to a read-signal amplifier in a disk-drive read channel. Compared to prior read channels, this initial adjustment promotes faster settling of the amplifier gain at the beginning of a data sector. This faster settling allows the data sector to have a shorter preamble, and thus allows the disk to have a higher data-storage density.
    Type: Grant
    Filed: February 14, 2000
    Date of Patent: March 15, 2005
    Assignee: STMicroelectronics, Inc.
    Inventor: Hakan Ozdemir
  • Patent number: 6867938
    Abstract: A digital information reproducing apparatus using rotary heads that reproduces digital information signals recorded on a magnetic tape using magneto resistive heads installed on a rotary drum. The apparatus includes, in the fixed side of the apparatus, a magnetic tape checking circuit that checks the type of the magnetic tape; and a control signal generation circuit that generates a control signal for controlling the gain of a reproduction amplifier circuit; and on the rotary drum, a decoder circuit that identifies the control signal transmitted from the control signal generation circuit. The control signal generation circuit generates the control signal based on a checking result given by the magnetic tape checking circuit, and the decoder circuit identifies the transmitted control signal to control the gain of the reproduction amplifier circuit.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: March 15, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Shigeru Yamazaki, Kenmei Masuda
  • Patent number: 6862152
    Abstract: A channel adjustment control adjusts a channel to reduce bit error rate in a disc drive. Variable gain register settings are read and compared to filter characteristics to provide an operational boost register setting for an adjustable gain amplifier in the channel. An operational pole register setting is provided based on the operational boost register setting and known parameters of the adjustable low pass filter. Low and high frequency data patterns are applied while the channel adjustment control reads the variable gain register settings.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: March 1, 2005
    Assignee: Seagate Technology LLC
    Inventors: DetHau Wu, Edmun ChianSong Seng, Utt Heng Kan
  • Patent number: 6856481
    Abstract: An apparatus for providing a read signal at an output locus for access by an information processing device receives an input signal containing the information; the apparatus includes: (a) a read signal control unit receiving the input signal at a control unit input locus; the control unit is coupled with the output locus and controls the read signal; (b) a plurality of switches; and (c) a plurality of bias arrays coupled with the switches. A first bias array set cooperates with the plurality of switches in a first orientation to couple the first bias array set with the control unit to establish a first operational mode. A second bias array set cooperates with the plurality of switches in a second orientation to couple the second bias array set with the control unit to establish a second operational mode.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: February 15, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Ashish Manjrekar, Patrick Michael Teterud, Indumini Ranmuthu, Echere Iroaga
  • Patent number: 6856480
    Abstract: Methods and apparatus are disclosed for detecting PR4 equalized Gray codes, providing phase tolerant Gray codes and detection thereof. A Gray code detector is provided, which receives a PR4 equalized Gray code input signal and provides a binary detector output. The detector comprises a plurality of filters providing Euclidean distance values based on the input signal. A logic component selectively provides the detector output based on one or more of the Euclidean distance values from the matched filters, according to one or more criteria, such as the detector mode.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: February 15, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Ryohei Kuki, Isao Takigasaki
  • Patent number: 6853509
    Abstract: A system and method for acquisition signal error estimation is provided which uses one or more past values of the sequence to determine the nearest ideal sample value without comparing the received sample value to the potential sample values. According to one embodiment, the nearest ideal sample value is selected based on the received sample value and values of three consecutive samples. According to another embodiment, the nearest ideal sample value is selected based on the received sample value and a value of an immediately preceding sample. According yet to another embodiment, the nearest ideal sample value is selected based on the received sample value and a value of a previous sample. The acquisition signal error estimator maybe used in conjunction with gain, DC offset, or magneto-resistive asymmetry control loops in a sampled amplitude read channel.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: February 8, 2005
    Assignee: Infineon Technologies North America Corp.
    Inventors: Jonathan Ashley, Stephen J. Franck, Razmik Karabed
  • Patent number: 6853510
    Abstract: A variable gain amplifier to output a differential output signal includes an input circuit to input a differential input signal, a buffer circuit to buffer the differential output signal to a common mode voltage, a compensation circuit to compensate the differential output signal to prevent variation in the differential output signal, and a comparison circuit to compare the common mode voltage to a predetermined voltage and to adjust the common mode voltage to equal the predetermined voltage.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: February 8, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Alan I. Chaiken, Mark J. Chambers
  • Patent number: 6850378
    Abstract: A method and apparatus for providing quadrature biasing for coupled-pair circuits. A QBCP-circuit for quadrature amplifiers provides a new input common-mode sense point that separates the inputs for the differential-and-common mode feedback-control loops. The QBCP circuit biases all four transistors equivalently and reduces the feedback-loop interaction, thereby simplifying the bias control system and improves the voltage-transfer frequency-response performance.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: February 1, 2005
    Assignee: Hitachi Global Storage Technologies Netherlands BV
    Inventors: John Thomas Conteras, Paul Wingshing Chung, Stephen Alan Jove, Kevin Roy Vannorsdel
  • Patent number: 6847501
    Abstract: A method and apparatus for providing matched differential MR biasing and pre-amplification. Tightly matched and well centered low-level MR bias voltage is provided directly to the sensing element for controlled input-impedance differential pre-amplification without common-mode voltage level control with loops.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: January 25, 2005
    Assignee: International Business Machines Corporation
    Inventors: Wayne Leung Cheung, Stephen Alan Jove, Kevin Roy Vannorsdel
  • Patent number: 6831799
    Abstract: A differential amplifier circuit for amplifying an input signal and for providing an output signal representative of the input signal includes first and second amplifier circuits, and first and second coupling circuits. The first and second amplifier circuits each include first and second transistors, a resistor, and a current generator. The first coupling circuit includes a transistor, a capacitor, and a current generator, and couples a first input signal node to the first transistor of the second amplifier circuit. The second coupling circuit includes a transistor, a capacitor, and a current generator, and couples a second input signal node to the first transistor of the first amplifier circuit.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: December 14, 2004
    Assignee: Agere Systems Inc.
    Inventors: Elango Pakriswamy, Jong K. Kim, Michael P. Straub
  • Patent number: 6826003
    Abstract: A disk drive is disclosed comprising a disk and a head actuated radially over the disk. A pattern detector detects a predetermined pattern in write data to be written to the disk, and in response, adjusts a write current overshoot in a write current applied to the head.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: November 30, 2004
    Assignee: Western Digital Technologies, Inc.
    Inventor: Jai N. Subrahmanyam
  • Patent number: 6822817
    Abstract: Bi-Variant Coupled Pair (BVCP) circuits suitable for use in channel front-end low noise preamplifiers of magnetic storage devices are described. In a magnetic storage device, a BVCP circuit provides a DC bias voltage for a read transducer, low-noise amplification performance, and relatively small AC coupling capacitor values for reducing the cost of an integrated circuit (IC) in which the BVCP circuit may be embodied. The BVCP circuit also has a controllable input impedance for matching a transmission line impedance for high data rate applications.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: November 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Paul Wingshing Chung, John Thomas Contreras, Stephen Alan Jove
  • Patent number: 6819515
    Abstract: An improved bias circuit for a disk drive head which reduces or eliminates transients while switching biasing. Embodiments of the invention are directed to eliminating transients while switching the bias of a MR head such as from current bias to voltage biasing. In an embodiment of the present invention, bias enable signals from a control circuit are inputs to delay circuits. The delay circuits provide a delay on the high-to-low transition, and essentially no delay on the low-to-high transition. The unsymmetrical delay ensures that the read head bias current will continue to be driven during the biasing transition to reduce voltage swings that could damage the head.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: November 16, 2004
    Assignee: Texas Instruments Incorporated
    Inventor: Echere Iroaga
  • Patent number: 6819516
    Abstract: An unsafe detection circuit for detecting a kickback signal including an input circuit for inputting a kickback signal, a circuit for detecting the presence or absence of said kickback signal, and a fault detection circuit to respond to said presence or absence of said kickback signal to provide an indication of a fault.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: November 16, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Hiromichi Kuwano, Kaori Ichikawa
  • Publication number: 20040218301
    Abstract: A circuit (40) for use in a mass data storage device (10) has first (44) second (46) current driver circuits for providing write currents to the data transducer (18). The first and second current levels are different, the second current level being lower than the first. The first current driver circuit (44) may be used to apply currents representing user data to the data transducer (18) and the second current driver circuit (46) may be used to apply currents representing servo information to the data transducer (18). In addition, the first (44) and second (46) current drivers circuits may be operated at different frequencies. The first (44) and second (46) current driver circuits additionally may share at least some circuit components (70, 72, 74-75, 64-65), and may operate at different write speeds.
    Type: Application
    Filed: April 29, 2003
    Publication date: November 4, 2004
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Raymond Elijah Barnett, Tuan Van Ngo, Scott Gary Sorenson
  • Publication number: 20040218303
    Abstract: A magnetic disk device having a magnetic disk for recording information, a rotary mechanism for rotating the magnetic disk, a magnetic head unit for recording information on the rotating magnetic disk, a slider having mounted thereon the magnetic head unit and flying over the rotating magnetic disk, a magnetic head supporting mechanism for supporting the slider, and a positioning mechanism for setting the magnetic head unit at a predetermined radial position. The magnetic head supporting mechanism has mounted thereon an integrated circuit (IC) for amplifying an information write/read signal of the magnetic head unit, and a control circuit is connected to the IC. A record frequency is controlled according to the radial position of the IC on the magnetic disk by the control circuit.
    Type: Application
    Filed: June 3, 2004
    Publication date: November 4, 2004
    Inventors: Mikio Tokuyama, Ryoichi Ichikawa, Shigeo Nakamura, Toshihiko Shimizu, Hiromitsu Masuda, Hiromitsu Tokisue
  • Patent number: 6804073
    Abstract: Apparatus responsive to a signal derived by a magnetic transducer includes a variable gain amplifier arrangement having an input responsive to the signal and an output terminal. An analog gain control circuit responds to the signal at the output terminal. An analog to digital converter responds to the signal at the output terminal. Circuitry responsive to an output signal of the analog gain control circuit and an output signal of the analog to digital converter causes the gain of the variable gain amplifier to be simultaneously controlled in response to gain control output signals resulting from the output signals of the analog gain control circuit and the analog to digital converter. Both gain control output signals are derived in response to the same instantaneous value of the output signal at the output terminal of the variable gain amplifier arrangement.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: October 12, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Rafel Jibry, Peter Walsh
  • Publication number: 20040196584
    Abstract: For use with a servowriter that includes a writer core having a plurality of transistors that route servowriting current in response to a servo write signal, a write transition controller, a method of operating the same and a magnetic disk drive incorporating the controller or the method. In one embodiment, the controller includes: (1) logic circuitry, coupled to the writer core, that selectively blocks the servo write signal based on a state of a write current control signal and (2) current shunt circuitry, coupled to the writer core, that operates concurrently with the logic circuitry selectively to shunt current around the writer core based on the state.
    Type: Application
    Filed: April 1, 2003
    Publication date: October 7, 2004
    Applicant: Agere Systems Inc.
    Inventor: Ross S. Wilson