Abstract: An electrochemical device, e.g., an electric double layer capacitor, is applicable to high-temperature reflow soldering wherein a lead-free solder is used, and is provided with an electric storage element, a package having the electric storage element sealed therein, and a positive electrode terminal and a negative electrode terminal, each of which is led out from the electric storage element and is provided with a part sealed in the package with the electric storage element and other part led out to the outside the package. On a part of the positive electrode terminal and on a part of the negative electrode terminal, increased thermal resistance sections for suppressing heat transfer to the electric storage element via the terminals from other parts of the positive electrode terminal and other parts of the negative electrode terminal are arranged, respectively.

Abstract: A high reliable electric double layer capacitor is provided by increasing a sealing ability and strength of given portions of collecting terminals. In an electric double layer capacitor including a capacitor proper 1a produced by a plurality of stacked cells and an aluminum laminate film covering the exterior of the capacitor proper, a pair of collecting terminals 12 and 13 are provided at opposed portions of the capacitor proper 1a. Each collecting terminal 12 or 13 includes a first bent portion 12b or 13b that is bent to extend along a side surface 1b of the capacitor proper 1a and a second bent portion 12c or 13c that is bent to extend outward from a vertically middle position of the side surface 1b of the capacitor proper 1a.

Abstract: A capacitor is provided having a tough surface portion which prevents cracking that tends to occur when the capacitor is built-in or surface-mounted on a wiring board. A ceramic sintered body of the capacitor includes a capacitor forming layer portion, a cover layer portion and an interlayer portion. The capacitor forming layer portion has a laminated structure wherein ceramic dielectric layers and inner electrodes connected to a peripheral portion of capacitor via conductors, are alternately laminated. The cover layer portion is exposed at a surface portion of the ceramic body and has a laminated structure wherein ceramic dielectric layers and dummy electrodes not connected to the capacitor via conductors, are alternately laminated.

Abstract: A filament post used in plasma-enhanced chemical vapor deposition has an outer shell and an inner post. An electrical potential is applied only to the inner post to ensure that there is no impact on the plasma density and the carbon film properties. The inner post and the outer shell are electrically insulated by ceramic insulators, such that no electrical potential is applied to outer shell. The stress generated in the carbon film is directly related to the electrical potential of the surface to which the film is deposited. The carbon film deposited on the outer shell of the post is not highly stressed, which significantly reduces film delamination from the filament post surfaces.

Abstract: A process for fabricating a circuit board with an embedded passive component is provided. First, an electrode-patterned layer having electrodes is formed on a surface of a conductive layer. Then, a passive component material is filled in the intervals between the electrodes. Then, the conductive layer and the electrode-patterned layer are laminated to a dielectric layer, wherein the electrode-patterned layer is embedded in the dielectric layer. Next, the conductive layer is patterned to form a circuit layer.

Abstract: An exemplary light emitting diode (LED) assembly includes a cover, a substrate, a LED unit, a first electrode terminal, and a second electrode terminal. The substrate includes a first surface and a second surface on an opposite side of the substrate thereto. The substrate and the cover cooperatively define a cavity. The LED unit is received in the cavity. The first and the second electrode terminals extend from the second surface. The first electrode terminal is electrically connected to one of a positive lead and a negative lead of the LED unit and the second electrode terminal is electrically connected to the other. The second electrode terminal includes a first electrode portion and a second electrode portion symmetrically arranged at opposite sides of the first electrode terminal. The first and the second electrode portions are at least partially symmetrical with respect to the first electrode terminal.

Abstract: A semiconductor device includes a semiconductor bare chip and an electrically-insulative board member with a thin-film structure capacitor. The semiconductor bare chip has a power supply terminal and a grounding terminal on the back surface thereof. The semiconductor bare chip is mounted on a circuit board by flip-chip bonding. The board member includes a board and a thin-film structure capacitor provided on the board. The capacitor has terminals corresponding to the power supply terminal and the grounding terminal of the semiconductor bare chip thereon. The side of the board member where the capacitor is provided is bonded to the back surface of the semiconductor bare chip. The terminals of the capacitor are electrically connected to the power supply terminal and the grounding terminal of the semiconductor bare chip.

Abstract: A multi-layer micro-printed circuit board (PCB) is disclosed, which defines a magnetic component, such as a transformer, using planar technology. Instead of using the traditional twelve-layer PCB incorporating both a primary and a secondary winding, this invention stacks multiple PCBs, each having four or six layers and each including a single winding (either the primary or the secondary). The PCBs are stacked in an offset arrangement such that the pins penetrating the PCB or PCBs including the primary winding or windings do not penetrate the PCB or PCBs including the secondary winding or windings. Additionally, this offset arrangement prevents the pins penetrating the secondary PCBs from penetrating the primary PCBs in the same manner. This offset configuration thereby avoids significant flashover problems associated with current planar components.

Abstract: A variable capacitor is formed by a multilayer circuit board having a plurality of dielectric layers; a first conductive plate, provided within the multilayer circuit board, for serving as one electrode of the variable capacitor; a second conductive plate, provided within the multilayer circuit board, for serving as the other electrode of the variable capacitor; a plurality of third conductive plates provided between the first conductive plate and the second conductive plate; and a plurality of switching means provided for grounding the third conductive plates selectively.