Abstract: The disclosure provides a chemical reduction of a metal in a cable of an electrical network, which brings about an improvement in the conductive properties of said metal and a reduction in losses during electric power transmission. The invention discloses a reducing compound with a high concentration of quasi-free electrons, which is obtained as a result of the solvation of metals selected from group I and group II of the main group of the periodic table of elements and of amines selected from the group consisting of: pyridine, and dimethylformamide dispersed in a liquid oligomer, with a metal:amine:dielectric molar ratio of 1:2:1.5, allowing, in an alternating electromagnetic field, to initiate a pulsed injection of electrons into the network with a periodicity equal to frequency of alternation of the voltage.

Abstract: A three-terminal capacitor includes a main body having a cylindrical or substantially cylindrical shape extending in a first direction and including first and second inner electrodes alternately laminated together with dielectric layers interposed therebetween, a pair of first outer electrodes on two end surfaces of the main body in the first direction and electrically connected to the first inner electrodes, and a second outer electrode electrically connected to the second inner electrodes. The main body includes a projecting portion projecting in a direction perpendicular or substantially perpendicular to the first direction at a position between the pair of first outer electrodes. The second outer electrode is provided on one surface of the projecting portion viewable when viewed in the first direction.

Abstract: A capacitor component comprising a first busbar, a second busbar, one or more capacitor elements and a housing, the housing having a first portion and a second portion, wherein the first portion and the second portion are arranged to extend around an aperture, the first portion includes a section for housing the one or more capacitor elements, with the second portion extending between a first end and a second end of the first portion, wherein the first busbar and the second busbar are arranged to extend around the first portion and the second portion of the housing, a first power supply terminal is formed at the first end of the first portion and a second power supply terminal is formed at the second end of the first portion, wherein the first power supply terminal is coupled to the first busbar and the second power supply terminal is coupled to the second busbar, wherein a first conductive layer of the one or more capacitor elements is coupled to the first busbar and a second conductive layer of the one or m

Abstract: A multilayer ceramic capacitor (MLCC) includes a body including first dielectric layers and second dielectric layers, the body including first to sixth surfaces, a second surface, a third surface, a fourth surface, a fifth surface and a sixth surface; first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces; second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces; first dielectric patterns disposed in at least a portion of the first spaces, and second dielectric patterns disposed in at least a portion of the second spaces; and lateral insulating layers.

Abstract: A manufacturing method of a ceramic electronic device includes: preparing a ceramic electronic device having a multilayer chip, a first external electrode, and a second external electrode, and bonding an organic compound having a siloxane bonding to at least a part of a region including a surface of the multilayer chip where neither the first external electrode nor the second external electrode is formed and surfaces of the first external electrode and the second external electrode, by contacting heated silicon rubber to the region.

Abstract: A method of manufacturing a semiconductor device includes: coupling a semiconductor die to a protection layer; forming a first redistribution layer over the semiconductor die, wherein the first redistribution layer includes a first conductive plate of an antenna structure and a first dielectric layer laterally surrounding the first conductive plate; etching the first dielectric layer to form a recess exposing the first conductive plate; filling the recess with a second dielectric material to form an insulating film; and forming a second redistribution layer including a second conductive plate of the antenna structure over the insulating film. The insulating film electrically isolates the first conductive plate from the second conductive plate, wherein one of the first conductive plate and the second conductive plate is configured to radiate or receive electromagnetic wave. The insulating film has a thickness associated with a main resonance frequency of the antenna structure.

Abstract: A semiconductor package includes a substrate and a semiconductor chip disposed over the substrate. The substrate includes: a base layer including an upper surface facing the semiconductor chip; an upper ground electrode plate disposed over the upper surface of the base layer and configured to transmit a ground voltage to the semiconductor chip; and a dummy power pattern disposed in the upper ground electrode plate and having a side surface which is surrounded by the upper ground electrode plate and is spaced apart from the upper ground electrode plate with an insulating material between the dummy power pattern and the upper ground electrode plate. A ground voltage transmission path from the upper ground electrode plate to the semiconductor chip is spaced apart from the dummy power pattern.

Abstract: A thin film capacitor includes a capacitance portion in which a plurality of electrode layers and dielectric layers are alternately laminated, a cover layer, an insulating layer, a via hole in which one electrode layer different from an uppermost electrode layer among the plurality of electrode layers is exposed at a bottom surface thereof, and an opening which is provided inside the via hole and in which the one electrode layer is exposed at a bottom surface thereof, and in which the cover layer and the insulating layer are exposed at a side surface. The opening includes a first opening portion which passes through the insulating layer and a second opening portion which is provided below the first opening portion and passes through the cover layer, and when an inner diameter of the first opening portion is D1 and an inner diameter of the second opening portion is D2, D1>D2.

Abstract: A printed circuit board has: a first wiring pattern laid in a first layer such that, when a predetermined component is mounted in a predetermined mounting region, a first current path in an open ring shape leading from a first end to a second end is formed; a second wiring pattern laid in a second layer different from the first layer such that a second current path in an open ring shape leading from a third end to a fourth end is formed; a first conductive member formed between the second and third ends; and a second conductive member formed between the first and fourth ends. The first and second wiring patterns are so laid that, as seen in their respective plan views, the directions of the currents flowing across the first and second current paths, respectively, are opposite to each other.

Abstract: A multilayer electronic component includes a ceramic body having stacked dielectric layers to form a first capacitor part and a second capacitor part, wherein the first capacitor has a constant capacitance, and the second capacitor part has a variable capacitance; a voltage control terminal formed on a lateral surface of the ceramic body; an input terminal disposed on another lateral surface of the ceramic body corresponding to the first capacitor part; and an output terminal disposed on the other lateral surface of the ceramic body corresponding to the second capacitor part separate from the input terminal.

Abstract: A multilayer electronic component includes: a body including first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween; and first and second external electrodes disposed on the body to be connected to the first and second internal electrodes, respectively, wherein each of the dielectric layers includes BamTiO3 and includes a plurality of grains and grain boundaries formed between adjacent grains, and a sum of contents of Si and Dy in the grain boundary is 10 to 15 parts by weight.

Abstract: A multilayer ceramic electronic component includes: a ceramic body including dielectric layers and internal electrodes, stacked to be alternately exposed to one end surface and the other end surface of the ceramic body, with each of the dielectric layers interposed therebetween; and external electrodes disposed on outer surfaces of the ceramic body. The external electrodes include electrode layers connected to the internal electrodes, electrically insulating layers disposed on the electrode layers, and plating layers disposed on one surface of the ceramic body in a thickness direction of the ceramic body and connected to the electrode layers, respectively, and the electrode layers contain nickel.

Abstract: A capacitor includes a body including a dielectric layer and a plurality of first and second internal electrodes which are alternately disposed while having the dielectric layer therebetween, including first to sixth surfaces; a first external electrode disposed on the third surface and including a first extension portion extending from the third surface to portions of the first, second, fifth, and sixth surfaces, adjacent to the third surface; a second external electrode disposed on the fourth surface and including a second extension portion extending from the fourth surface to portions of the first, second, fifth, and sixth surfaces, adjacent to the fourth surface; and a plating prevention member covering the first and second extension portions disposed on the fifth surface and the sixth surface.

Abstract: A laminated ceramic electronic component that includes a laminate having a plurality of dielectric layers and a plurality of internal electrode layers laminated together. External electrodes having underlying electrode layers and plating layers are formed on both end surfaces of the laminate. When a cross-section including the underlying electrode layers is observed, the underlying electrode layers contain a plurality of Cu crystals and glass, and an average value of lengths of demarcation lines of the Cu crystals having different crystal orientations is 3 ?m or less.

Abstract: A multilayer ceramic capacitor that includes a laminated body of multiple dielectric layers and internal electrodes laminated alternately therewith. The dielectric layers contain Ba, Sr, Ti, Ca, Zr, Mg, and R, where R represents at least one element of Y, La, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb. When Ti is 100 parts by mol, the dielectric layers contain Sr at 0.5 to 3.0 parts by mol; Ca at 3 to 15 parts by mol; Zr at 0.05 to 3.0 parts by mol; Mg at 0.01 to 0.09 parts by mol; and R at 2.5 to 8.4 parts by mol.

Abstract: The invention includes; a sealed housing made of a plastic or metal material; a conductive plate made of a copper material, positioned in the center of the housing, and respectively connected to power lines so as to accumulate magnetic energy generated in an internal polymer-clay nanocomposite; a base insulation plate having insulation characteristics so as to fix the conductive plate; electric wires which are power lines for transmitting the magnetic energy stored on the conductive plate to the outside; the polymer-clay nano composite filled in the bottom portion of the housing such that the conductive plate is submerged therein; an upper ceramic layer coated on the inner wall of the housing so as to promote the magnetic interaction of a ceramic compound in the upper space portion of the polymer-clay nano composite.

Abstract: A voltage stabilization apparatus (1) for a motor vehicle electrical system to stabilize at least one voltage-sensitive consumer (9) is proposed. The voltage stabilization apparatus is distinguished by a DC/DC converter circuit (3), an energy storage device (5) and a changeover switch (7), which are designed and arranged so that the energy storage device (5) is changeable by the DC/DC converter circuit (3) and the changeover switch (7) enables an electrical connection between the voltage-sensitive consumer (9) and the energy storage device (5) in such a way that the energy storage device (5) in case of need supplies a stabilization voltage (USTAB) at the consumer (9).

Abstract: A dielectric thin film element having a high humidity resistance is provided. A dielectric thin film element includes a capacitance section having a dielectric layer and a pair of electrode layers formed on the respective upper and lower surfaces of the dielectric layer. Furthermore, a protection layer is provided on the capacitance section, a pair of interconnect layers are drawn out to an upper surface of the protection layer, and external electrodes are formed to be electrically connected to the interconnect layers. Further, first surface metal layers cover a portion of the interconnect layers that extends along the inner surface of the openings and second surface metal layers are formed at end of the first surface metal layers.

Abstract: A dielectric ceramic that contains Al and Si, as well as a barium titanate-based compound having a perovskite type crystal structure as a primary component. The total molar amount of Al and Si is 2 to 4 parts by mole with respect to 100 parts by mole of Ti, and the content ratio of Al with respect to the total molar amount is 0.2 or less (excluding 0) on the molar ratio basis. The dielectric ceramic may also contain at least one specific rare earth element Re, such as Gd, Tb, or Dy.

Abstract: There is provided a multilayer ceramic electronic part including: a ceramic body including dielectric layers; an active layer including a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body; upper and lower cover layers formed on upper and lower portions of the active layer; and first and second external electrodes formed on both end portions of the ceramic body, wherein the first external electrode includes a first base electrode, a first conductive layer formed on the first base electrode at a corner portion of the ceramic body, and the second external electrode includes a second base electrode, a second conductive layer formed on the second base electrode at a corner portion of the ceramic body, the first and second conductive layers being positioned outside the active layer in a thickness direction of the ceramic body.

Abstract: A number of semiconductor chips each include a first main face and a second main face opposite from the first main face. The second main face includes at least one electrical contact element. The semiconductor chips are placed on a carrier. A material layer is applied into intermediate spaces between adjacent semiconductor chips. The carrier is removed and a first electrical contact layer is applied to the first main faces of the semiconductor chips so that the electrical contact layer is electrically connected with each one of the electrical contact elements.

Abstract: A ceramic electronic component comprising; including a chip component of approximately rectangular parallelepiped, a first metal terminal portion having a first flat plate portion facing a first end face, at least a pair of first fitting arm portions connected to the first flat plate portion, having a first engagement projection engaging with a first wraparound portion holding the first wraparound portion in between, and a first mounting portion connected to the first flat plate portion and extending approximately parallel to one side face, and a second metal terminal portion having a second flat plate portion facing the second end face, at least a pair of second fitting arm portions connected to the second flat plate portion, having a second engagement projection engaging with a second wraparound portion, holding the second wraparound portion in between, and a second mounting portion extending approximately parallel to one side face.

Abstract: There are provided a multilayer ceramic electronic component and a method of manufacturing the same. Here, an average diameter (Dc) of ceramic grains in a cover area is smaller than an average diameter (Da) of ceramic grains in the active area, and when a thickness of the cover area is expressed by Tc, 9 um?Tc?25 um and Tc/Dc?55 are satisfied. A multilayer ceramic capacitor having excellent moisture-resistance properties may be obtained.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body having first and second side surfaces opposite to each other, and third and fourth end surfaces connecting the first and second side surfaces; a plurality of internal electrodes formed in the ceramic body and having one ends thereof exposed to the third or fourth end surface; and first and second side margin parts formed from the first and second side surfaces to respective edges of the internal electrodes, the first and second side margin parts having an average thickness of 18 ?m or less, wherein when a boundary surface between a cover layer and the first or second side margin part in the ceramic body is divided into two regions in a thickness direction of the ceramic body, a region adjacent to the internal electrode is S1, and a porosity of S1 is P1, 1?P1?20 is satisfied.

Abstract: A direct current (DC) link capacitor operable within an electrically drivable vehicle having a high-voltage battery is provided configured to facilitate output of a DC voltage to an inverter configured to process the DC voltage to facilitate powering an electric motor used to drive the vehicle. Thee DC link capacitor includes a housing enclosing capacitive elements configured to facilitate capacitive processing between an input and an output, at least a first pair of terminals configured to deliver the DC voltage to the input, the capacitive elements processing the DC voltage received at the input into a capacitive DC voltage, and at least a second pair of terminals configured to output the capacitive DC voltage to the inverter, the inverter relying on the capacitive DC voltage to facilitate powering the electric motor.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body having first and second side surfaces facing each other, and third and fourth end surfaces connecting the first and second side surfaces, a plurality of internal electrodes formed in the ceramic body and having one ends thereof exposed to the third end surface or the fourth end surface, and a first side margin part and a second side margin part formed such that an average thickness thereof from the first and second side surfaces to edges of the internal electrodes is 18 ?m or less.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body having first and second side surfaces and third and fourth end surfaces, a plurality of internal electrodes and having one ends exposed to the third or fourth end surface, and first and second side margin parts formed so that an average thickness from the first and second side surfaces to edges of the internal electrodes is 18 ?m or less, wherein when the first or second side margin part is divided into two regions by a virtual line obtained by connecting mid points of distances between the edges of the internal electrodes and points at which lines extended from the internal electrodes contact the first or second side surface, when a region adjacent to the internal electrodes is defined as S1 and a porosity of S1 is defined as P1, P1 is in a range of 1 to 20 (1?P1?20).

Abstract: There is provided a conductive resin composition including 10 to 50 wt % of a gel type silicon rubber such as polydimethylsiloxane (PDMS), and 50 to 90 wt % of conductive metal powder particles.

Abstract: A capacitor includes a dielectric layer, a first external electrode layer, a second external electrode layer, a first internal electrode portion, a second internal electrode portion, and an adsorbing portion. The first internal electrode portion is provided on a first through-hole portion, one end of the first internal electrode portion being connected to the first external electrode layer. The second internal electrode portion is provided on a second through-hole portion, one end of the second internal electrode portion being connected to the second external electrode layer. The adsorbing portion adsorbs the first external electrode layer and the second external electrode layer, the adsorbing portion being provided on a third through-hole portion.

Abstract: There is provided a multilayer ceramic electronic component including: a ceramic main body including a dielectric layer and internal electrodes disposed to face each other, while having the dielectric layer interposed therebetween; and external electrodes electrically connected to the internal electrodes, wherein the external electrodes include first external electrodes formed on outer surfaces of the ceramic main body and second external electrodes formed outwardly of the first external electrodes, and protective layers including one or more of an oxide layer and a glass layer are formed between the first external electrodes and the second external electrodes.

Abstract: Shielding performance and protection from radiated RF energy at a cable's point of entry to an enclosure are improved when a shield of the cable is AC coupled around an entire opening of the enclosure using a discoidal capacitor. The capacitor may be electrically coupled to the shield and the enclosure around the entire inner and outer circumferences of the discoidal capacitor. Compared to traditional DC coupling or the use of a drain wire and traditional capacitor, using the discoidal capacitor lowers inductance and improves shielding of the opening itself while improving AC filtering characteristics and preventing ground loops.

Abstract: There are provided a multilayer ceramic electronic component and a method of manufacturing the same. The multilayer ceramic electronic component includes: a ceramic body including a dielectric layer; first and second internal electrodes disposed within the ceramic body to face each other, while having the dielectric layer interposed therebetween; and first external electrodes electrically connected to first and second internal electrodes and second external electrodes formed on the first external electrodes, wherein the first and second external electrodes include a conductive metal and a glass, and when the second external electrodes are divided into three equal parts in a thickness direction, an area of the glass in central parts thereof with respect to an area of the central parts is 30 to 80%. Therefore, sealing properties of a chip is improved, whereby a multilayer ceramic electronic component having improved reliability may be implemented.

Abstract: There is provided a multi-layered ceramic capacitor having a dual layer-electrode structure formed by applying a dual layer of electrode paste to the multi-layered ceramic capacitor. The multi-layered ceramic capacitor having a dual layer-electrode structure includes a capacitor body having a preset length and width and having a plurality dielectric layers stacked therein, an internal electrode unit formed on the plurality of dielectric layers and having a preset capacitance, and an external electrode unit including first external electrodes respectively formed on both sides of the capacitor body to be electrically connected to internal electrodes, and second external electrodes formed on the first external electrodes.

Abstract: One object is to provide a porous capacitor having increased insulation reliability. In accordance with one aspect, the porous capacitor includes: a first conductor layer and a second conductor layer opposed to each other at a predetermined distance; a dielectric layer made of an oxidized valve metal and disposed between the first conductor layer and the second conductor layer; a large number of holes formed through the dielectric layer and oriented substantially orthogonal to the first conductor layer and the second conductor layer; and first electrodes and second electrodes formed of a conductive material filled in the holes; and insulation parts insulating the first electrodes from the second conductor layer and insulating the second electrodes from the first conductor layer. The thicknesses of the first conductor layer and the second conductor layer are equal to or greater than half of the inner diameter of the holes.

Abstract: A Z-directed capacitor according to one embodiment includes a body having top, bottom and side surfaces, a cross-sectional shape that is insertable into a mounting hole in a printed circuit board, and a plurality of stacked support members. Each support member includes an annular plate mounted on a surface thereof. A first conductive side channel and a second conductive side channel are formed in the side surface and extend along a top-to-bottom dimension of the body. A first set of the annular plates electrically contact the first conductive side channel but not the second conductive side channel and a second set of the annular plates electrically contact the second conductive side channel but not the first conductive side channel. A third conductive side channel is formed in the side surface, extends along the top-to-bottom dimension of the body and is electrically separated from the annular plates.

Abstract: There are provided a conductive paste composition for an internal electrode, a multilayer ceramic electronic component including the same, and a method of manufacturing the same, the conductive paste composition including: a metal powder; and an additive including at least one selected from glutamic acid, amino acids, thiols, and hydrocarbons.

Abstract: There is provided a chip type laminated capacitor including: a ceramic body formed by laminating a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 ?m or less; first and second outer electrodes; a first inner electrode having one end forming a first margin together with one end surface of the ceramic body at which the second outer electrode is formed and the other end leading to the first outer electrode; and a second inner electrode having one end forming a second margin together with the other end surface of the ceramic body at which the first outer electrode is formed and the other end leading to the second outer electrode, wherein the first and second margins have different widths under a condition that they are 200 ?m or less.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic sintered body having a plurality of dielectric layers laminated therein; first and second capacitance portions being formed on surfaces of the dielectric layers; first and second lead-out portions being respectively extended from both sides of the first and second capacitance portions to be respectively exposed through both side surfaces of the ceramic sintered body and spaced apart from each other; sealing parts enclosing both end portions and corner portions of the ceramic sintered body; and first and second external electrodes enclosing the sealing parts and formed on both end portions of the ceramic sintered body to be electrically connected to the first and second lead-out portions, respectively.

Abstract: There is provided a multilayered ceramic electronic component including: a multilayered body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes formed on the dielectric layers so as to be alternately exposed through end surfaces; a minimum margin indicating part formed on an L-direction margin part on which the first or second internal electrode is not formed on the dielectric layer and indicating a minimum size of the L-direction margin part, the L-direction minimum margin indicating part being inserted on the ceramic sheet, whereby a multilayered ceramic electronic component having high capacitance while reducing a defect and having excellent reliability may be implemented.

Abstract: A hard start capacitor replacement unit has a plurality of capacitors in a container sized to fit in existing hard start capacitor space. The capacitors are 4 metallized film capacitors wound in a single cylindrical capacitive element. The container has a common terminal and capacitors value terminals for the plurality of capacitors, which may be connected singly or in combination to provide a selected capacitance. An electronic or other relay connects the selected capacitance in parallel with a motor run capacitor. The hard start capacitor replacement unit is thereby adapted to replace a wide variety of hard start capacitors.

Abstract: Provided is a laminated ceramic electronic component which has excellent mechanical characteristics, internal electrode corrosion resistance, high degree of freedom in ceramic material design, low cost, low defective rate, and various properties. The laminated ceramic electronic component includes a laminate which has a plurality of laminated ceramic layers and internal electrodes formed along at a plurality of specific interface between the ceramic layers and having an Al/Ti alloy as a component; and an external electrode formed on the outer surface of the laminate. The Al/Ti ratio of the Al/Ti alloy is 91/9 or more.

Abstract: There is provided a multilayer ceramic capacitor, and a method of manufacturing the same, the multilayer ceramic capacitor including: a ceramic body; a first internal electrode; a second internal electrode; a first external electrode; a second external electrode; and an insulating layer.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic body having dielectric layers and first and second internal electrodes alternately stacked therein; and first and second external electrodes electrically connected to the first and second internal electrodes and formed at both ends of the ceramic body, wherein the ceramic body includes an effective layer contributing to capacitance formation and a protective layer provided on at least one of upper and lower surfaces of the effective layer, the protective layer including one or more step absorbing layers provided at both ends thereof, so that the multilayer ceramic electronic component can have excellent reliability by reducing defects such as electrode spreading, cracks, delamination and the like.

Abstract: Provided is a laminated ceramic electronic component having excellent mechanical characteristics, internal electrode corrosion resistance, high degree of freedom in ceramic material design, low cost, low defective rate, and various properties. The laminated ceramic electronic component includes: a laminate which has a plurality of laminated ceramic layers and internal electrodes at a plurality of specific interfaces between the ceramic layers and having an Al/Ni alloy as a component; and an external electrode formed on the outer surface of the laminate, wherein the Al/Ni ratio of the Al/Ni alloy is 85/15 or more.

Abstract: Systems and methods are provided for fabricating a thin film capacitor involving depositing an electrode layer of conductive material on top of a substrate material, depositing a first layer of ferroelectric material on top of the substrate material using a metal organic deposition or chemical solution deposition process, depositing a second layer of ferroelectric material on top of the first layer using a high temperature sputter process and depositing a metal interconnect layer to provide electric connections to layers of the capacitor.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic main body having internal electrodes laminated therein; and external electrodes formed on both ends of the ceramic main body in a length direction thereof, wherein each of the external electrodes includes a first layer formed on the ceramic main body and including a conductive metal, and a second layer formed on the first layer and including a conductive resin, and when Tc is a thickness of a cover layer of the ceramic main body, L1 is a length from either end of the ceramic main body in the length direction thereof to an end of the first layer formed on an upper surface or a lower surface of the ceramic main body, T1 is a thickness of the first layer, and T2 is a thickness of the second layer, Tc?70 ?m, T2?(1.5)T1, and L1<(1.5)Tc are satisfied, thus providing excellent reliability.

Abstract: A multilayer ceramic electronic component includes a ceramic main body having internal electrodes laminated therein; and external electrodes formed on ends of the ceramic main body in a length direction, wherein each external electrode includes a first layer formed on the ceramic main body and including a conductive metal, and a second layer formed on the first layer and including a conductive resin, and when Tc is thickness of a cover layer, Te is thickness of the internal electrode, Td is distance between neighboring internal electrodes, L1 is length from either end of the ceramic main body in the length direction in a region in which the cover layer adjoins a margin part of the ceramic main body to an end of the first layer formed on an upper or lower surface of the ceramic main body, and Lm is length of the margin part, Tc?70 ?m and L1<Lm+Tc×cot 50° are satisfied.

Abstract: A film capacitor element including a base dielectric film layer 12, a vapor-deposition metal film layer 14 formed on the base dielectric film layer 12 and consisting of a first film portion 20 and a second film portion 22 that are spaced apart from each other by a margin portion 18, and a dielectric covering film layer 16 which is formed integrally on the second film portion 22 by vapor-deposition polymerization or coating and which has a covering portion 30 which fills the margin portion 18 and covers an entire area of an end face of the second film portion 22 on the side of the margin portion 18. The first film portion 20 including a non-covered portion 34 which is not covered by the dielectric covering film layer 16.

Abstract: A chip capacitor and interconnecting wiring is described incorporating a metal insulator metal (MIM) capacitor, tapered vias and vias coupled to one or both of the top and bottom electrodes of the capacitor in an integrated circuit. A design structure tangibly embodied in a machine readable medium is described incorporating computer readable code defining a MIM capacitor, tapered vias, vias and wiring levels in an integrated circuit.

Abstract: A planar capacitor includes, in part, a first metal line forming spiral-shaped loops around one of its end point, and a second metal line forming spiral-shaped loops between the loops of the first metal line. The first and second metal lines are coplanar, formed on an insulating layer, and form the first and second plates of the planar capacitor. The planar capacitor may be used to form a filter. Such a filter includes a first metal line forming first spiral-shaped loops, a second metal line forming second spiral-shaped loops, and a third metal line—coplanar with the first and second metal lines—forming loops between the loops of the first and second metal lines. The filter further includes a first inductor coupled between the first and third metal lines, and a second inductor coupled between the second and third metal lines.