Abstract: High density packaging of semiconductor devices on an interconnection substrate is achieved by stacking bare semiconductor devices atop one another so that an edge portion of a semiconductor device extends beyond the semiconductor device that it is stacked atop. Elongate interconnection elements extend from the bottommost one of the semiconductor devices, and from the exposed edge portions of the semiconductor devices stacked atop the bottommost semiconductor device. Free-ends of the elongate interconnection elements make electrical contact with terminals of an interconnection substrate, such as a PCB. The elongate interconnection elements extending from each of the semiconductor devices are sized so as to reach the terminals of the PCB, which may be plated through holes. The elongate interconnection elements are suitably resilient contact structures, and may be composite interconnection elements comprising a relatively soft core (e.g., a gold wire) and a relatively hard overcoat (e.g., a nickel plating).

Abstract: The specification describes an interconnect strategy for memory chip packages to reduce or eliminate alpha particle contamination from the use of high lead solder interconnections in the vicinity of semiconductor memory cells. In the primary embodiment a high tin solder is recommended. A multi-layer under bump metallization is described that is compatible with high tin solders and flip-chip solder bump technology.

Abstract: An interconnect structure adapts one or more signals conducted between a printed circuit board (PCB) and an integrated circuit (IC) including leads, the IC having signal requirements not provided by the PCB. The interconnect structure includes sockets that provideA. conductive paths between the circuit board and some, but not all, of the leads on the package. To adapt the signals, the interconnect structure also includes an intermediate adaptor board that includes one or more electrical components. The adaptor board and the sockets fit beneath the package containing the IC and above the PCB, and do not extend beyond the lateral boundaries of the package. Heat generated by these components during operation of the IC is dissipated through the IC package via a layer of thermally conductive material sandwiched between the component and the package.

Abstract: The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends which electrically connect with lead ends of adjacent integrated circuit devices. The bus system provides a path for communication from the module to external electronic devices and internal communication between the individual integrated circuit devices in the module.

Abstract: The advantages of the invention are realized by a chip-on-chip module having at least two fully functional chips, electrically connected together, and a chip-on-chip component connection/interconnection for electrically connecting the fully functional chips to external circuitry.

Abstract: An integrated circuit package assembly that allows an integrated circuit package to be plugged into another integrated circuit package that is mounted to a printed circuit board. The assembly includes a first integrated circuit package assembly that is mounted to the printed circuit board. The first assembly includes a first integrated circuit package that contains a plurality of holes on the top surface of the package. The mating pins of a second integrated circuit package assembly can be plugged into the holes to couple the second assembly to the first assembly. The second integrated circuit package assembly can be added without occupying additional board space on the printed circuit board.

Abstract: An electrical interconnection structure. The electrical interconnection structure includes a mother board substrate having a plurality of layers. At least one layer includes a signal path having a characteristic impedance of Z.sub.O and a conductive ground plane. A signal via passes through each layer of the mother board substrate. The signal via electrically is connected to the signal path. A ground via passes through each layer of the mother board substrate. The ground via is electrically connected to the conductive ground plane. The electrical interconnection structure further includes a plurality of flex circuits. Each flex circuit includes a flex signal path having a characteristic impedance of Z.sub.O and a flex ground plane. Each flex signal path is electrically connected to the signal via and each flex ground plane is electrically connected to the ground via.

Abstract: A high density integrated circuit module having complex electrical interconnection is described, which includes a plurality of stacked level-one integrated circuit devices, wherein each level-one device includes an integrated circuit die and a plurality of electrical leads extending from the die; and a plurality of non-linear rails adapted to electrically and thermally interconnect selected leads of selected stacked level-one devices within the module, wherein at least some of the plurality of non-linear rail include a lead interconnect portion which is adapted to at most partially surround and receive a selected lead from one of the stacked level-one devices. Other embodiments include TSOP modules having leads reduced in width to allow additional selected non-linear rails to interconnect with select leads in the module. Strain relief for the rail/circuit board substrate connection in harsh environment applications is also provided.

Abstract: A modular system (10) is disclosed for use, e.g. in infusion systems. The system includes a base unit (20) and one or more modules (30). A mechanical/electrical connecting system (21 to 24) is disclosed enabling safe connection of the various units in the system while enabling easy disconnection of any of the modules (30). A signal processing arrangement is also disclosed enabling the number of modules (30) in the system to be sensed by the base unit (20).

Abstract: A stacked container assembly includes a variable number of stacked modular containers, and an engaging unit and a fastening unit provided on each container to permit the containers to connect with one another. The container assembly holds an electrical power supply assembly which includes a plurality of electrical power supply units respectively received inside the stacked containers, and an electrical control device electrically connected to the electrical power supply units and received inside a control box mounted on the top or bottom of the stacked containers.

Abstract: The invention discloses a three-dimensional module with the use of volume unpackaged and film electronic components.Between the independent electronic components comprising IC chips and the microboards comprising active and passive electronic components are disposed intermediate multifunctional boards. All module members are fabricated mostly from heat conductive materials, and together with the module's heatsinks make up an effective heat dissipation system. The microboards and intermediate boards further contain film active and passive components fabricated using semiconductor, thin film and thick film techniques and increasing the operational range of equipment. The proposed design is versatile and can be used in any-purpose electronic equipment.The module structure allows its application under severe operational conditions and increases the packing density up to the technological limit.

Abstract: The invention is component module (20) for combining a plurality of components (21, 23, 25, 27 and 29)into a single module (20) for use with a printed wiring board. A plurality of components, each component having a pair of contacts (21a,21b), are formed into the module with a plurality of insulating spacers (2,24,26 and 28). There is one spacer between adjacent components, said spacers serving to insulate adjacent components from each other and to secure the components together to form the module.

Abstract: Interchip and intrachip electrical discharge suppression connections or networks are disclosed for three-dimensional multichip semiconductor structures. The interchip suppression networks electrically intercouple the power planes of the semiconductor device chips in the structure. This, in combination with conventional intrachip suppression networks present on the external connects or input/output pins of the individual chips in the structure, provides complete power plane-to-power plane, external connect-to-power plane and external connect-to-external connect protection against electrical discharge events, such as an electrostatic discharge occurring during handling and testing of the structure. The interchip electrical discharge suppression networks can be placed on an end layer or end semiconductor chip of the three-dimensional multichip semiconductor structure and connect to individual chips in the structure via an edge surface metallization.

Abstract: The present invention provides multi-layer multi-chip circuit board comprising at least two ATAB carriers having chips thereon, stacked upon each other in a pyramid configuration and attached to a substrate, thus reducing the required area on the substrate for mounting components to form a circuit board.

Abstract: An assembly of electronic modules comprises electronic modules supported by a support structure. Each electronic module is in the form of electronic components stacked on at least two levels which are separated by an intermediate layer. Each electronic module comprises at least one hole formed in the intermediate layer. The support structure comprises at least one rod element that is introduced into respective holes of successive modules.

Abstract: An electronic assembly that includes a plurality of electronic substrates that are plugged into a polygonal shaped motherboard. The polygonal shape of the motherboard minimizes the electrical path between electronic substrates while providing enough space between adjacent substrates to allow a fluid to sufficiently remove heat generated by integrated circuits of the substrates.

Abstract: IC card of the present invention consists of a frame including a rectangular bottom plate and a U-shaped side wall along the three edges of the bottom plate; a connector fixed to the open side of the frame with the U-shaped side wall; a board module at least one including printed-circuit boards with electronic components mounted thereon, combined with the connector, and inserted in the frame; and a metal panel for sealing off the board module inside the frame with the connector fixed thereto.

Abstract: A modular electric arrangement for central power supply and control of valves in a valve block including at least one base module having a housing with tow opposed open ends, at least one connection module, and at least one termination module; the base, connection and termination modules having an identical cross-sectional configuration and being releasably connected in-line; the base module accommodating a circuit board and having a side wall with at least one opening therein for access to a connector on the circuit board; the connection module providing a central electric power supply for other modules in the arrangement; and the termination module closing an open end of an adjacent module in the arrangement.

Abstract: Stacked three-dimensional devices can be prepared by stacking wafers as an alternative to stacking individual devices. Chip regions are formed on several wafers with each chip region being surrounded by a separation region, such as an insulator filled trench. The wafers are then stacked with the chip regions in alignment. Aligning the wafers can be facilitated using notched regions in the periphery of the wafers. The wafers are then joined together by lamination. After laminating the stacks of wafers, stacks of chips are separated by etching, dicing or other processes, which separate out stacked chip devices from the stacked wafer at the chip separation regions. The process allows several stacked chip devices to be manufactured simultaneously.

Abstract: A frame structure for mounting telecommunications equipment including a frame, a plurality of sealing covers, a plurality of fasteners, and a plurality of wire protective sleeve. The frame having a base, two support frames, and an upper frame. A receiving recess is provided to accommodate transmission conductors (optic cables, electric cables or lead wires) of telecommunications equipment. A positioning recess formed between the plate bodies at the upper and lower covers of the inner side of the sealing covers and the fastening plates allows the sealing covers to be mounted over the edge of the inner lateral plates of the opening of the receiving recess on the support frames. A fastener is then passed into a hollowed hole of the outer lateral plate on the sealing cover and further into a fastening hole, with the plate body of the sealing cover being pressed downwardly. A press element is then pressed into a fastener body to secure the connection.

Abstract: An interconnected book-package system permitting the circuit boards within book packages to communicate exclusively of the backplane (e.g., 300). This permits a circuit board that would otherwise have to be constructed from a larger than standard size circuit board and housed within a larger than standard size book package to be formed out of two standard size or smaller circuit boards housed within standard size book package assemblies. This is especially useful to customers seeking upgrade flexibility. The book packages of the interconnected system are connected mechanically and electrically exclusively of the backplane by a connection assembly (e.g., 502, 414, 504, 416) that makes it possible to blindly plug the book packages together. Multi-book latch assemblies include a clip (e.g., 702 and/or 704) used to interconnect the latches on a pair of book packages so that the connected books can be plugged into the backplane as a unit.

Abstract: A leadless ceramic chip carrier useful in surface mounting of SAW devices includes electrically conductive vias and metalization between input and output bond pads for improved crosstalk suppression between input and output device connections. A protrusion extending from a top layer of a multilayer ceramic carrier provides additional electrical contact to a package seal brazed thereto. The vias are positioned between input and output bond pads and connect the metalized protrusion to package ground pads through contact with multiple metalized layers of the package for enhancing the electrical connection between the package Kovar seal ring and customer accessed ground pads. For further suppression of crosstalk, bond pads within the package for connection to the SAW device are spaced at a greater distance from each other than their corresponding pads on the package bottom surface thus maintaining an optimum spacing for package connection to printed circuit board pads for minimizing thermal mismatch effects.

Abstract: An apparatus and method for electrically connecting a plurality of electronic modules includes a power cord for supplying power to a plurality of electronic modules, the power cord including a first end and a second end, the first end of the power cord including a plug for connection to a power source, the second end of the power cord including a power cord terminal, the power cord terminal including a first receptacle for connection to a first electronic module and a second receptacle, and a connector cord including a first end and a second end, the first end of the connector cord including a plug for connection to the second receptacle of the power cord terminal, the second end of the connector cord including a connector cord terminal, the connector cord terminal including a first receptacle for connection to a second electronic module and a second receptacle.

Abstract: A circuit module for use in an implantable cardiac stimulation device contains a plurality of stacked substrate platforms. Electrical components of a hybrid circuit structure are attached to respective mounting surfaces of the substrate platforms. Electrical connectivity between components mounted on separate platform levels is established by connecting the components via wire bonds or other means. The wire bonds pass through a slot formed in an upper level substrate and are attached to electrical contacts of an associated lower level substrate.

Abstract: This interconnect chip provides the function of an antifuse device. The interconnect chip is initially disconnected. Application of a high voltage applied across two terminals on the chip causes intrinsic polysilicon, which serves as an insulator between the connections to break down and form a reliable short circuit between the pads by redistribution of impurities from the layers above and below the intrinsic polysilicon.

Abstract: A housing assembly for electrical components includes a plurality of tubular housing sections which are fixedly interconnected. Portions of the housing sections are then removed to form openings in the housing assembly. The openings formed in the housing assembly may be formed in either interior or exterior walls of the housing assembly. Each of the tubular housing sections forms a compartment in which an electrical component may be mounted. By removing portions of a plurality of the interior walls of the housing assembly, a chamber which extends across end portions of a plurality of the compartments is formed. Front and rear end plates may be connected with the housing assembly. In addition, covers may be provided for openings formed in the exterior of the housing assembly.

Abstract: A computer system is implemented by a plurality of electronic modules having different parts, cascaded in the vertical direction and each having a similar configuration. Adjacent two of the modules are coupled by rotating a pair of lock dials to a lock position at which the locked pin of the protrusion is engaged with a helical groove formed in the lock dials. A common signal bus is formed by engagement of a plug and receptacle at the locked position. The adjacent modules are separated by rotating the lock dial to an open position.

Abstract: An arrangement for the flexible design of a mounting rack is provided. A mounting panel is provided which accommodates partial-height modules as opposed to full-height modules. The mounting panel is connected to the rear wall of the rack and includes at least one guide rail for supporting the partial-height modules and securing the partial-height modules. A plurality of mounting panels may be disposed next to each other or a mounting panel may be disposed next to a full-height module.

Abstract: To provide an electronic equipment mounting device having flexibility in the mounting direction, the device is provided with a mounting jig on which a plurality of tongues are formed and a housing whose flat faces having different areas have slits in them, the tongues being inserted into the slits in a detachable manner. The mounting jig is mounted on, for example, the surface of a wall, and then the housing is coupled to the mounting jig by selectively using one of its side faces.

Abstract: A multiple chip module architecture capable of forming structures having selectable aspect ratios which themselves form the basis for higher levels of integration in analogous manner. The modular architecture uses a flexible interconnect of patterned copper on polymer to successively reorient the connection plane between successive levels, permitting the selective stacking of module levels to create the desired aspect ratio of the multiple chip module. Interconnection between levels may be accomplished by solder reflow, direct dendritic bonding, or connection through a dendritic interposer.

Abstract: SIP or ZIP packages are provided with locking elements of snap fasteners, or have package alignment tabs to combine several IC packages into an IC package assembly. Using a DIP printed circuit board socket, a high density DIP module, for example, a high capacity memory chip, is assembled. The leads of the module are inserted into a motherboard that carries the external conductors to be connected with the inner circuits of the package assembly, and soldered to the motherboard. To make the IC package assembly compatible with a conventional DIP socket, a plastic spacer can be provided between the IC packages. A retaining clip may be used to allow the IC package assembly to be repeatedly inserted and removed to and from the socket without the risk of falling apart.

Abstract: Stackable ball grid array packages are disclosed, wherein a plurality of separate ball grid array packages may be stacked, one on top of another, and interconnected by conductive terminals located on opposite surfaces of each of the ball grid array packages. Thus, the mounting of ball grid array packages on a printed circuit board may be conducted in three dimensions rather than two dimensions, requiring considerably less printed circuit board surface area and reducing parasitic inductances and capacitances between the terminals of the stacked ball grid array packages. An air gap is formed between adjacent, stacked packages for cooling. Connections between adjacent packages are made by conductive epoxy and noble metal balls.

Abstract: A semiconductor package is described which is constructed from a rectangular tape film, a wiring pattern formed on the tape film constituted by wiring composed of a conductive material, a semiconductor chip electrically connected to one end of the wiring pattern, and holes formed on the other end of the wiring pattern for connection by insertion of lead-pins. A method is then described for stacking and mounting a plurality of semiconductor packages on a wiring substrate by first vertically positioning lead-pins on a wiring substrate and then passing these lead-pins through the holes in the semiconductor packages.

Abstract: A high density integrated circuit module having complex electrical interconnection is described, which includes a plurality of stacked level-one integrated circuit devices, wherein each level-one device includes an integrated circuit die and a plurality of electrical leads extending from the die; and a plurality of non-linear rails adapted to electrically and thermally interconnect selected leads of selected stacked level-one devices within the module, wherein at least some of the plurality of non-linear rail include a lead interconnect portion which is adapted to at most partially surround and receive a selected lead from one of the stacked level-one devices. Other embodiments include TSOP modules having leads reduced in width to allow additional selected non-linear rails to interconnect with select leads in the module. Strain relief for the rail/circuit board substrate connection in harsh environment applications is also provided.

Abstract: A radio frequency compatible multi-board cluster (300) having three shielded housings (301, 301, 303) for containing three component parts of a radio, namely, the controller, the transmitter, and the receiver. These shielded housings (301, 301, 303) are electrically and physically intercoupled with one another at 90.degree. angles to form a bracket-receiving cavity (401) there between.

Abstract: An improved packaging scheme for a CPU of a main frame computer improves the performance while at the same reduces the cost of manufacture of the main frame computer. A single packaging technology is used to package the whole CPU and eliminates cable connections inside the CPU. Surface power bus technology permits the fabrication of a module with chips mounted on both front and back sides of the substrate. The surface power bus is installed on one or both sides of the module surface and derives power directly from the power cable and distributes power to chip sites directly. In a specific implementation, a uni-processor CPU with chips mounted on both surfaces of the substrate and power fed from the surface power bus results in improved processor package density and system performance.

Abstract: Integrated circuit (IC) packages having leads projecting in the vertical direction are provided with male and female locking elements of snap fasteners that allow a pair of IC packages to be stacked into a module so as to align the leads of one package with the leads of another package. The leads of the packages are soldered to a PCB that carries the external conductors to be connected with the inner circuits of the packages. The male locking element on one of the IC packages is tightly engaged with the female locking element on another IC package to prevent the soldered leads of one package from touching the leads of another package. Multiple modules are positioned on the PCB to double the packaging density of the PCB.

Abstract: Each flat package is provided with locking elements of snap fasteners that allow several packages to be assembled into a stack so as to align the leads of each package with respect to the leads of other packages. The leads projecting from both edges of the stack package assembly are inserted into a pair of PC boards having holes arranged so as to accommodate the leads of the assembly. The leads of the PC boards are inserted into a motherboard that carries the external conductors to be connected with the inner circuits of the package assembly.

Abstract: An image control apparatus includes a communication control unit for effecting a communication with the outside of the apparatus, an image processing control unit for controlling processings required for a given image data, and a main control unit for controlling the communication control unit and the image processing control unit. Respective control units are provided on separate printed boards, respectively, and each printed board is connected to each other using respective connectors. By the constitution, it is possible to make a maximum use of resources such as hardware resources and thereby improve an efficiency in development of the image control apparatus. Also, by mounting the above printed boards with being divided into lower-side units and upper-side units, it is possible to increase the component mounting space and to have the printed board drawings for common use.

Abstract: A multi-chip module includes an insulating board, a semiconductor chip, a plurality of carriers, and semiconductor devices. The insulating board has a recess portion formed in a central portion of a lower surface. A wiring pattern is formed on the insulating board. The semiconductor chip is mounted in the recess portion in the insulating board. Each carrier is mounted on the upper surface of the insulating board and has a leg portion with a side-surface electrode formed on a side surface. The resin-sealed semiconductor devices are respectively mounted on the carriers. The resin-sealed semiconductor devices are mounted in a stacked state.

Abstract: An improved multichip semiconductor module compatible with existing SIMM memory sockets comprising a molded module frame and a composite semiconductor substrate subassembly received in a cavity in said frame. The composite semiconductor substrate subassembly or subassembly(s) comprises a plurality of semiconductor devices which are connected to electrical contacts on an edge of the molded frame by a variety of configurations described herein. In one embodiment of the invention, the subassembly(s) includes a composite substrate which comprises a thin metal cover plate and thin laminate circuit which is bonded to the metal cover plate by a film adhesive. The composite substrate provides a mounting surface for the placement of semiconductor devices and their associated passive components.

Abstract: An electronic assembly of two planar electronic devices for insertion into a shelf for back plane connection. Each device may be a printed circuit board or a circuit pack incorporating such a board. A flexible flat cable extends between front ends of the devices to interconnect their circuitry. This cable is torsionally flexible to allow relative pivoting movement of the electronic devices in their respective planes. The cable is also bendably flexible to allow movement towards each other or apart of the rears of the electronic devices. A movement limiting device restricts the degree of relative movement of the electronic devices. The relative movement overcomes tolerance issues between terminal positions of one device relative to the other during connection into the back plane and damage to terminals and connectors is avoided.

Abstract: Ends of inner leads are disposed in the vicinity of a peripheral end of a semiconductor chip and a portion of an insulating film tape is affixed to a main surface of the semiconductor chip by an adhesive while other portions of the insulating film tape are affixed to portions of the inner leads by an adhesive. Electrode pads provided in the main surface of the semiconductor chip are electrically connected to the ends of the corresponding inner leads by bonding wires, and the semiconductor chip, the inner leads, the electrode pads, the insulating film tape and the bonding wares are sealed by a resin molding. The thickness of the insulating film tape is smaller than a height from the main surface of the semiconductor chip to an apex of the bonding wire. Surfaces of the ends of the inner leads connected to the bonding wires are positioned lower than the main surface of the semiconductor chip and the inner leads are positioned between the main surface and an opposite surface of the semiconductor chip.

Abstract: A stacked semiconductor package including a plurality of semiconductor devices stacked over one another and having outer leads, which are extended from sides of the devices and bent downwardly. A plurality of supports are vertically interposed between the outer leads. The supports electrically connect the outer leads in vertical direction only.

Abstract: Interchip and intrachip electrical discharge suppression connections or networks are disclosed for three-dimensional multichip semiconductor structures. The interchip suppression networks electrically intercouple the power planes of the semiconductor device chips in the structure. This, in combination with conventional intrachip suppression networks present on the external connects or input/output pins of the individual chips in the structure, provides complete power plane-to-power plane, external connect-to-power plane and external connect-to-external connect protection against electrical discharge events, such as an electrostatic discharge occurring during handling and testing of the structure. The interchip electrical discharge suppression networks can be placed on an end layer or end semiconductor chip of the three-dimensional multichip semiconductor structure and connect to individual chips in the structure via an edge surface metallization.

Abstract: An integrated multichip memory module structure and method of fabrication wherein stacked semiconductor memory chips are integrated by a controlling logic chip such that a more powerful memory architecture is defined with the appearance of a single, higher level memory chip. A memory subunit is formed having N memory chips with each memory chip of the subunit having M memory devices. The controlling logic chip coordinates external communication with the N memory chips such that a single memory chip architecture with N.times.M memory devices appears at the module's I/O pins. A preformed electrical interface layer is employed at one end of the memory subunit to electrically interconnect the controlling logic chip with the memory chips comprising the subunit. The controlling logic chip has smaller dimensions than the dimensions of the memory chips comprising the subunit.

Abstract: Stacked, multimodular circuit assemblies are provided which comprise stacked, resealable, modules containing electronic circuitry, each module having a plurality of electrically conductive, embedded through-vias between the upper and major surfaces thereof. The through-vias are contained within the module matrix outside of the circuit-containing cavity or "tub" of the module and within the outer edges of the module body. Electronic circuitry contained in the module cavity is electrically connected to the through-vias by signal traces or vias passing out of the cavity and into contact with the through-vias, and adjacent modules are electrically interconnected by a resealable, multichannel connector array between adjacent modules having electrically conductive channels coupling opposing through-vias of the adjacent modules.

Abstract: Circuit supporting modules form a three-dimensional communication interconnect mesh. A first embodiment three-dimensional communication interconnect is a tetrahedral lattice having a regular, isotropic, three-dimensional topology in which each module connects to its four physically closest neighbors. The structure of the tetrahedral interconnect is isomorphic with a diamond lattice structure. In a second embodiment the interconnect is hexahedral. A characteristic of both is embodiments is that, although connections are made to plural other modules, the physical connections are made along the same direction.

Abstract: An electronic circuit board enclosure comprised of a planar member having dimensions at least equal to dimensions of the circuit board, first pillars fixed to at least one side of the planar member and extending orthogonally to the planar member above the planar member, apparatus for aligning and fixing bottoms of second pillars of another circuit board enclosure to tops of the first pillars, apparatus for fastening a first circuit board to and above the planar member, and locating apparatus for precisely locating the fastening position of the circuit board to the planar member relative to the first pillars, whereby the position of the first circuit board can be located precisely relative to another circuit board fastened to another circuit board enclosure.

Abstract: A meter-module is compactly and integrally formed by a combination meter 1, an electric junction box 2 and a switching unit 3. Meters and indication lamps are mounted on the combination meter 1. A circuitry for controlling module components is incorporated into the electric junction box 2. Various kinds of switches are incorporated into the switch unit 3. Connectors 6, 6' and 8 and so forth, are provided for the outer wall 2a of the electric junction box 2 and electrical connection is carried out between the connectors thereof and connectors in respect to both the combination meter 1 and the switch unit 3. The combination meter 1, the electric junction box 2 and the switch unit 3 are removably integrated by engaging guide grooves 5, 5' of the electric junction box 2 with a guide projection 11 of the combination meter 1.