Abstract: A system for packaging integrated circuit components including a ball grid array substrate with a plurality of solder balls coupled to the substrate. A semiconductor device is mounted on the substrate and electrically coupled to the solder balls. One or more terminals are coupled to the substrate and electrically coupled to said semiconductor device. A detachable module contains auxiliary component, such as a data acquisition device, a wireless communications device, an output device or driving devices for a clock circuit. The module comprises a body portion for containing the component and one or more electrical connectors for mating with respective terminals to hold the module to the substrate and to electrically couple the component with the semiconductor device.

Abstract: A printed circuit board (PCB) subassembly of first and second PCB's disposed back to back, a group of jumper pins extending through the PCB's to electrically connect the circuit elements of the first and second PCB's and supporting the second PCB from the first PCB in back to back relationship, a cutout defined in the first PCB, and an electro-optic sensor disposed on the second PCB and extending through the cutout in the first PCB.

Abstract: Two modules, each of which has a plurality of memory IC chips installed therein, are stacked to form a module unit. Furthermore, a plurality of the module units are installed on a mother board so as to form a multilevel semiconductor integrated circuit device. By further stacking a specific module containing an IC chip for replacing the functions of a defective chip, a repair process can be conducted more easily and efficiently. Alternatively, instead of the module units, a plurality of TAB packages stacked in a multilayer structure are installed on the mother board. Outer leads of each of the TAB packages and terminal pads on the circuit board are respectively connected to each other in a one-to-one way. Thus, only a defective TAB package need be taken away and consequently, efficiency in the repair process further improves.

Abstract: A connector element and electronic component arrangement in which the connector element cooperates with receiving slots provided in first and second electronic components to electrically connect the components. The connector element includes ground traces and signal traces which are brought into electrical contact with signal leads and ground leads of the electronic components when the connector element is inserted into the receiving slots located in the first and second electronic components. Multiple electrical components may be electrically connected in a stack using multiple connector elements which cooperate to form a substantially continuous bus. The connector element and electronic component arrangement eliminates the signal delay, signal reflection, and interference associated with data cables.

Abstract: Each IC package carrier holds a single ZIP or SIP package between its side walls having openings to provide air flow for cooling the package and to allow heat generated within the package to dissipate. A locking strip member is provided to prevent loosening of the held package. Locking elements of snap fasteners are mounted on the side walls to allow several IC package carriers be attached to each other for producing an IC package assembly. The IC package assembly held by the several attached carriers can be inserted into a socket to connect circuits within the packages with external circuitry.

Abstract: In order to provide a multilayer electronic component which can reduce arrangement pitches for external electrodes, via holes filled up with conductive materials are provided in a mother laminate, which is obtained by stacking a plurality of insulating sheets with interposition of conductor films, in positions parted by cutting. The conductive materials define external electrodes of individual multilayer electronic components which are obtained by cutting the mother laminate. No specific step is required for forming the external electrodes, and characteristics of each multilayer electronic component can be efficiently measured in the state of the mother laminate.

Abstract: A multilayer electronic component having reduced arrangement pitches for external electrodes is formed by providing via holes in a mother laminate with conductive materials. The mother laminate is obtained by stacking a plurality of insulating sheets with interposition of conductor films in positions that are parted by cutting. The conductive materials define external electrodes for individual multilayer electronic components which are obtained by cutting the mother laminate. A specific step for forming the external electrodes is not required, and characteristics of each multilayer electronic component can be efficiently measured while each multilayer electronic component is still part of the mother laminate.

Abstract: SIP or ZIP packages are provided with locking elements of snap fasteners that allow several packages to be attached to each other to produce an IC package assembly. Using a DIP printed circuit board socket, a high density DIP module, for example, a high capacity memory chip, is assembled. The leads of the module are inserted into a motherboard that carries the external conductors to be connected with the inner circuits of the package assembly, and soldered to the motherboard. To make the IC package assembly compatible with a conventional DIP socket, a plastic spacer can be provided between the IC packages. A retaining clip may be used to allow the IC package assembly to be repeatedly inserted and removed to and from the socket without the risk of falling apart.

Abstract: Apparatus for housing circuit cards that comprises a cylindrical housing having an internal wall having a single diameter. First and second cylindrical heat sinks are provided that each comprise a sloped outer surface. The heat sinks are disposed such that the sloped outer surfaces face each other. First and second circuit cards are secured to distal edges of respective heat sinks, or pairs of circuit cards are secured to both edges of respective heat sinks. Each circuit card comprises at least one internal interface connector that is designed to mate with an internal interface connector of an adjacent circuit card. A cylindrical card lock is provided that has an outer surface that is designed to contact the internal wall of the housing and an inner surface that has a V-shaped cross section having oppositely sloped surfaces. The respective sloped surfaces of the card lock are designed to mate with the sloped outer surfaces of the respective heat sinks.

Abstract: The invention is to an array of stacked devices utilizing vertical surface mounted semiconductor devices stacked side by side and inserting the stack of devices into a casing. The packaged stack of devices creates a cube package which is capable of replacing SIMM boards, and saves considerable space. The casing dissipates heat generated in the devices, and may be of metal or thermally conductive plastic.

Abstract: A socket having primary conductors and secondary conductors. The socket provides electrical connection between active circuitry installed on a substrate and external circuitry. The impedance between each primary conductor and each secondary conductor is a predetermined value selected in order to match impedances of the active circuitry and the external circuitry.

Abstract: An interconnect system is provided in which one or more laminated modules embodying electrical devices can be stacked in a three dimensional configuration upon a printed circuit board. One or more electrical devices is surface mounted to a recessed area at the upper surface of each laminated module, and each laminated module includes male pins and female sockets. The male pins can be releasibly engaged within sockets upon a printed circuit board. Additionally, the male pins of one laminated module can be engaged within female sockets of another laminated module in building-block fashion. Conductive paths are formed entirely through the laminated module between respective sockets and pins. The conductive paths are arranged in a less dense fashion than bond locations adjacent each electrical device. The bond locations are therefore offset from conductive paths to provide fan-out and redistribution features.

Abstract: In order to provide a multilayer electronic component which can reduce arrangement pitches for external electrodes, via holes filled up with conductive materials are provided in a mother laminate, which is obtained by stacking a plurality of insulating sheets with interposition of conductor films, in positions parted by cutting. The conductive materials define external electrodes of individual multilayer electronic components which are obtained by cutting the mother laminate. No specific step is required for forming the external electrodes, and characteristics of each multilayer electronic component can be efficiently measured in the state of the mother laminate.

Abstract: The structure of an outdoor communication device includes a device body and a mounting base. The device body includes a device body, a disk-like mounting portion, a plurality of units, and a cylindrical cover. The units are enclosed in rectangular parallelepiped cases and are stacked and mounted on the mounting portion and serve to separately store electrical circuits for driving the device. The cylindrical cover has an opening portion on one end face side and serves to store the stacked units. The opening portion is fixed to the mounting portion. The mounting portion is detachably mounted on the mounting base such that the device body is suspended from and fixed to the mounting base with the mounting base being located above the device body. Fixing members are used to fix the units while the units are stacked on the mounting portion, such that the units are stacked substantially in a form of a cross.

Abstract: A filter module for a frequency converter comprises a filter circuit housed in a casing adapted for connection to the converter. The filter module includes an input filter and an output filter so arranged that input terminals for connection to the AC line voltage and output terminals for connection to an electric motor are disposed on a common side of the casing and so that the connections between the frequency converter and the filter module are disposed on a side of the casing which in use faces the converter.

Abstract: The present invention includes a high density integrated circuit module which includes a plurality of stacked, individual integrated circuit devices wherein serpentine electrical interconnect rails connect electrical leads extending from the individual integrated circuit devices within the module.

Abstract: The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends which electrically connect with lead ends of adjacent integrated circuit devices. The bus system provides a path for communication from the module to external electronic devices and internal communication between the individual integrated circuit devices in the module.

Abstract: A semiconductor module includes a plurality of circuit boards superposed one on another, each circuit board having two opposed surfaces; and groups of electronic parts mounted on the two opposed surfaces of each of the circuit boards, the groups of electronic parts including IC packages, each IC package having a package body and leads extending outward from at least one side surface of the package body, wherein the IC packages mounted between an adjacent pair of the circuit boards in a back-to-back relationship are located on the circuit board so that the leads of one of the IC packages on one of the circuit boards are directly opposite the package body of an IC package on the other of the circuit boards.

Abstract: A reconfigurable apparatus for computing systems including a set of baseboards and a family of daughtercards, together with a programmable interface to an external bus for a host system. Daughtercards attach to the baseboard through complementary connectors mounted on the baseboard and the daughtercards. In addition, daughtercards are constructed to allow stacking of daughtercards vertically. The baseboard and daughtercard approach of the present invention allows simple, incremental upgrade of installed boards by adding or replacing the daughtercards and allows simple migration to new systems by changing baseboards.

Abstract: An electronic package is disclosed in which a plurality of stacked "same function" IC chips are designed to be used in lieu of a single IC chip, and to fit into a host computer system, in such a way that the system is "unaware" that substitution has been made. Memory packages are of primary interest, but other packages are also feasible, such as packages of FPGA chips. In order to "translate" signals between the host system and the stacked IC chips, it is necessary to include suitable interface circuitry between the host system and the stacked chips. Specific examples are disclosed of a 4 MEG SRAM package containing 4 stacked IC chips each supplying a 1 MEG memory, and of 64 MEG DRAM packages containing 4 stacked IC chips each supplying a 16 MEG memory. The interface circuitry can be provided by a single special purpose IC chip included in the stack, referred to as a VIC chip, which chip provides both buffering and decoding circuitry. Additionally, the VIC chip should provide power supply buffering.

Abstract: A chip-on chip type semiconductor device is provided in which semiconductor chips provided in a package cannot be displaced during a transfer molding process so as to eliminate a short circuit. At least two lead frames are provided in and extend from the package so that the first semiconductor chip and the second semiconductor chip can be electrically connected to external devices. A die stage is provided between the first semiconductor chip and the second semiconductor chip. A bonding wire is provided for wiring between the first semiconductor chip and the lead frames, and TAB leads connect the second semiconductor chip to the lead frames. The lead frames may extend between the first and second semiconductor devices instead of the die stage. The lead frames may include one having a portion extending in a direction perpendicular to the longitudinal direction of the lead frames between the first and second semiconductor chips.

Abstract: Circuit supporting modules form a three-dimensional communication interconnect mesh. Each module has fewer than six sets of connectors, preferably four. The preferred three-dimensional communication interconnect is a tetrahedral lattice having a regular, isotropic, three-dimensional topology in which each module connects to its four physically closest neighbors. The structure of the tetrahedral interconnect is isomorphic with a diamond lattice structure.

Abstract: The device is used for the mutual alignment of perforated printed circuit boards and pattern carriers, for example films. It consists of a support (10) with parallel pins (16) axially slidable and laterally immovable within guides disposed thereon. In order to achieve a very exact alignment of the printed circuit boards and the films in spite of unavoidable tolerances regarding the position and the diameter of the centering bores cooperating with the pins (16), the pins are substantially polygonal in cross-section, having parallel lateral surfaces with either chamfered or rounded corners. The corners of the pins taper from the support (10) toward their free ends. They furthermore can be retracted into the support (10) using an actuator to prevent the tilting of the printed circuit boards in the course of their removal.

Abstract: A system of modules is provided in which each module has a set of n connectors which are spatially invariant as the module is rotated in steps of 360/n degrees about a module axis. The connectors are configured for axial engagement and a switching one of the modules includes a switch that can connect any one of its connectors with any other of its connectors. The modules are coaxially arranged with respective connectors of adjacent modules engaged. This arrangement is spatially compact and any one of the modules can be selectively connected to any other. In other embodiments, the modules have polygon-shaped perimeters and the connectors are configured for axial and radial engagement. These modules can be arranged both in vertical stacking and planar tiling relationships.

Abstract: A z-interface-board includes an array of vias or holes for interconnecting z-plane modules with other electronic components. The vias are plated with an electrically conductive material to create conductive elements or connecting contacts on both sides of the board. The plating can be manipulated to form different contact configurations at the vias. Different types of tops for the vias on one side of the board may be used for mating with other electronic components. Different types of bottoms for the vias on the other side of the board may be used for mounting the interface board to the z-plane module. The interface board provides a flat wafer-like surface for allowing process development including indium bump bonding. After the process development, the interface board is mounted to a stacked z-plane module. This final mounting may be performed by hard solder bumps or pins, instead of the soft indium bumps.

Abstract: The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends which electrically connect with lead ends of adjacent integrated circuit devices. The bus system provides a path for communication from the module to external electronic devices and internal communication between the individual integrated circuit devices in the module.

Abstract: A three-dimensional compact array of electronic circuitry includes a plurality of stacked modular compact arrays of electronic circuitry. Each modular compact array of electronic circuitry includes a substrate-less multi-chip module supporting a number of integrated circuits and interconnect which electrically connects the integrated circuits. Each modular compact array of electronic circuitry further includes an integrated heat exchanger and stacking connector supporting the substrate-less multi-chip module. The integrated heat exchanger and stacking connector includes a transverse connector region including a plurality of connector vias for connection to the interconnect of the substrate-less multi-chip module, and a transverse flow region including channels for circulating a coolant to remove heat from the substrate-less multi-chip module.

Abstract: The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends which electrically connect with lead ends of adjacent integrated circuit devices. The bus system provides a path for communication from the module to external electronic devices and internal communication between the individual integrated circuit devices in the module.

Abstract: Power semiconductor device structures and assemblies with improved heat dissipation characteristics and low impedance interconnections include a thermally-conductive dielectric layer, such as diamondlike carbon (DLC) overlying at least portions of the active major surface of a semiconductor chip, with vias formed in the dielectric layer in alignment with contact pads on the active major surface. A patterned metallization layer is formed over the thermally-conductive dielectric layer, with portions of the metallization layer extending through the vias into electrical contact with the chip contact pads. A metal structure is electrically and thermally coupled to selected areas of the patterned metallization, such as by solder bonding or by a eutectic bonding process. In different embodiments, the metal structure may comprise a metal conductor bonded to the opposite major surface of another power semiconductor device structure, a heat-dissipating device-mounting structure, or simply a low-impedance lead.

Abstract: A device and method for interconnection packages in a stack. Each package encapsulates, for example a semiconductor chip containing an integrated circuit, which for example may be a memory. The packages (2) which have connecting pins (21) are mounted on support grid (4) which preferably act as a heat shunt, and are stacked and linked to each other with a resin coating (5). A stack (3) is cut out so that the pins on the packages and one edge of the grids are flush with faces (31, 32) of the stack (3). Connections between the packages themselves, and between the packages and stack connecting pads, are made on the faces of the stack. The connecting pads are where necessary fitted with connecting pins.

Abstract: An electrical loadcenter bus bar mounting assembly which has a plurality of juxtaposed synthetic plastics moulded members. Each member is formed to interlock with each next adjacent member and has a plurality of location lugs for engagement with apertures in a support member.

Abstract: A multi-chip memory module comprises multiple standard, surface-mount-type memory chips stacked on top of each other, and a pair of printed circuit boards mounted on opposite sides of the memory chips to electrically interconnect the memory chips. Each printed circuit board has vias that are positioned to form multiple rows, with each row of vias used to connect the printed circuit board to a respective memory chip. The vias falling along the bottom-most row of each printed circuit board are also exposed and are used to surface mount the multi-chip module to pads of a memory board.

Abstract: An apparatus for cooling a switching circuit for an electric vehicle, wherein the switching circuit has at least two switching elements connected in series, includes first and second heat sinks, each having two thermally-conductive planar members forming a passage therebetween for channeling cooling fluid, an inlet port in communication with the passage, and an outlet port in communication with the passage, and a substrate for mounting at least one switching element to each of the first and second heat sinks. An ac terminal connects the switching element attached to the first heat sink in series with the switching element attached to the second heat sink, and inlet and outlet manifolds, coupled to the inlet and outlet ports of the first and second heat sinks, circulate cooling fluid through the passages of the first and second heat sinks to cool the switching elements.

Abstract: A meter module assembly includes a combination meter panel implemented with meters/indicating lamps and a drive circuit thereof, an electric junction box integrating functional circuits to distribute and control power sources and input/output signals for vehicle-mounted electric equipment including the meters/indicating lamps, and a switch unit integrating switches for vehicle-mounted electric equipment. The combination meter panel, the electric junction box, and the switch unit are integrally united. The electric junction box is integrally combined with the switch unit at the rear surface of the unit being arranged side by side with the combination meter panel. The electric junction box is electrically connected with the combination meter panel by a flexible circuit board.

Abstract: An integrated multichip memory module structure and method of fabrication wherein stacked semiconductor memory chips are integrated by a controlling logic chip such that a more powerful memory architecture is defined with the appearance of a single, higher level memory chip. A memory subunit is formed having N memory chips with each memory chip of the subunit having M memory devices. The controlling logic chip coordinates external communication with the N memory chips such that a single memory chip architecture with N.times.M memory devices appears at the module's I/O pins. A preformed electrical interface layer is employed at one end of the memory subunit to electrically interconnect the controlling logic chip with the memory chips comprising the subunit. The controlling logic chip has smaller dimensions than the dimensions of the memory chips comprising the subunit.

Abstract: A three dimensional logic cube comprises a base plate having two vertically mounted backplanes attached thereto. A plurality of horizontally stacked substrates are coupled by connectors to the backplanes, with enough clearance between adjacent substrates to ensure heat dissipating air or fluid flow between the substrates. Typically, the substrates are multi-chip modules having a plurality of logic and interconnect chips attached at die mounting locations. Preferably, the logic and interconnect chips are attached to the substrate using flip TAB frames. The substrate includes a pattern interconnect for connecting together all of the chips. The logic chip is based on a standard 10K-50K gate array design with 100 micron pad spacing. The interconnect chip uses an interconnect pattern to connect the logic chips. The interconnect chip uses a lead placement identical to the logic chip, so that a single TAB frame can be used for both chips.

Abstract: The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends which electrically connect with lead ends of adjacent integrated circuit devices. The bus system provides a path for communication from the module to external electronic devices and internal communication between the individual integrated circuit devices in the module.

Abstract: An integrated circuit package that includes three base substrate support members. One base substrate support member is rigid and has two sides and the other two base substrate members are flexible and are located adjacent each side of the rigid base substrate support member. Each flexible base substrate support member has an inner surface and a series of flip chips are located between the inner surfaces of the flexible base substrate support members and the sides of the rigid base substrate support member. The three base substrate support members are electrically connected together and a termination connection is provided at one end of the assembly. In addition, logic chips are provided that are located adjacent the connector for controlling the various flip chips.

Abstract: The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends which electrically connect with lead ends of adjacent integrated circuit devices. The bus system provides a path for communication from the module to external electronic devices and internal communication between the individual integrated circuit devices in the module.

Abstract: A chip-on chip type semiconductor device is provided in which semiconductor chips provided in a package cannot be displaced during a transfer molding process so as to eliminate a short circuit. At least two lead frames are provided in and extend from the package so that the first semiconductor chip and the second semiconductor chip can be electrically connected to external devices. A die stage is provided between the first semiconductor chip and the second semiconductor chip. A bonding wire is provided for wiring between the first semiconductor chip and the lead frames, and TAB leads connect the second semiconductor chip to the lead frames. The lead frames may extend between the first and second semiconductor devices instead of the die stage. The lead frames may include one having a portion extending in a direction perpendicular to the longitudinal direction of the lead frames between the first and second semiconductor chips.

Abstract: A high density electric power supply device formed by stacked circuit modules including top, bottom and intermediate modules, each of the modules having electrical contact elements retained in engagement with complementing contact elements on an adjacent one of the stacked modules under a force having a direction to press the top and bottom modules against the intermediate modules. Each of at least the intermediate modules have supply and return ports parallel to the direction of the aforementioned force and at least some of the modules having a passageway for circulation of cooling fluid between the supply and return ports therein. An elastic seal circumscribes each of said supply and return ports on at least the intermediate modules for maintaining a continuous fluid-tight passageway through the supply and return ports among the stacked circuit modules, the elastic seals being maintained under compression by the compressing force.

Abstract: A unitized integrally fused multilayer circuit package having a substrate, walls disposed on the substrate to form a central circuit package cavity, and circuit traces contained in the walls.

Abstract: A packaging assembly for a semiconductor circuit chip is formed of a hermetically sealable, `tub`-like structure. The tub-like structure is comprised a laminated stack of thin layers of low temperature co-fired ceramic (LTCC) material. The laminated stack of LTCC layers contains an internally distributed network of interconnect links through which a semiconductor die, that has been mounted at a floor portion of the tub, may be electrically connected to a plurality of conductive recesses or pockets located at top and bottom sidewall edge portions of the tub, thereby allowing multiple tubs to be joined together as a hermetically sealed assembly and electrically interconnected at the conductive pockets of adjacent tubs.

Abstract: The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends which electrically connect with lead ends of adjacent integrated circuit devices. The bus system provides a path for communication from the module to external electronic devices and internal communication between the individual integrated circuit devices in the module.

Abstract: Thin and durable level-one and level-two integrated circuit packages are provided. Moisture-barriers may be provided to upper and/or lower surfaces of the thin level-one package. Additionally, a thin level-one package may be constructed with one or more metal layers to prevent warpage. These level-one packages are aligned in a stacked configuration to form a thin and durable horizontal level-two package. Various thermal conductors are thermally coupled to the level-two package to help dissipate heat.

Abstract: A system including a number of circuit boards is provided that configures itself automatically. Any number of circuit boards can be placed in any order including sandwich arrangements where the circuit boards automatically configure themselves without any manual intervention by a skilled individual changing jumpers or strapping devices. The multi-board system removes the possibility of an error occurring while configuring the memory and registers.

Abstract: A sealed semiconductor unit includes an electrical component within a defined area on a semiconductor material. A cover with the dimensions of the semiconductor defined area is placed over the semiconductor material with a sealant there between. The dimensions of the cover are aligned with the dimensions of the semiconductor. The sealed unit includes electrical contacts extending from outside the sealed unit to the electrical component within the sealed unit on the semiconductor material. The sealed semiconductor unit, including the cover, the semiconductor material, and the electrical component, has an area of the semiconductor material.

Abstract: Disclosed is a stacked die carrier assembly and method for packaging and interconnecting silicon chips such as memory chips. The carrier is constructed from a metalized substrate onto which the chip is attached. The chip is wire bonded to the conductor pattern on the substrate. Each conductor then is routed to the edge of the substrate where it is connected to a half-circle of a metalized through hole. A frame is attached on top of this substrate. This frame has also a pattern of half-circle metalized through holes that aligns with the holes on the bottom substrate. The combination of the bottom substrate with the silicon die, and the frame on top, forms a basic stackable unit. Several such units can be stacked and attached on top of each other. The top unit can finally be covered with a ceramic lid that also has a matching half-circle metalized through hole pattern along its edge.

Abstract: A modularized electronic system such as notebook or palmtop computer for packaging and assembling one or more electronic I/O module assemblies comprises one upper case assembly and one lower case assembly for mounting the I/O modules in between. Each I/O module comprises a module head and a substantially rectangular module body. The module head further comprises a rigid module connector on its bottom, vertically plugged in a receptacle on the lower case assembly. The module body further comprises a substantially rectangular protruding port on its rear end. The lower case assembly further comprises a U-shaped side opening wherein the rear protruding port of the module body engages and securely attaches to the U-shaped side opening. The I/O module is upwardly supported by the lower case assembly over the module head and the rear protruding port only.

Abstract: A semiconductor device includes at least one semiconductor element contained in a casing, with main terminals and auxiliary terminals drawn from the semiconductor electrodes disposed on the upper face of the casing. The main terminals and the auxiliary terminals are arranged on the same plane at the same height without disposing partitions between the terminals so that the devices can be mounted on a printed wiring board on which the necessary conductor patterns for the main circuit have already been formed. In an alternative embodiment, the main terminals are arranged at a level slightly higher than the auxiliary terminals with the auxiliary terminals being surrounded by a supporting guide.