Capacitor And Resistor Patents (Class 361/766)
  • Patent number: 5598131
    Abstract: The present invention is directed to an AC termination which includes a substrate having first and second surfaces. A resistor is mounted on the first surface of the substrate. An input termination is at one end of the resistor. At least one plate of a capacitor is on the substrate and is electrically connected in series with the other end of the resistor. In one form of the termination, the capacitor is a metal film on the substrate extending from the other end of the resistor to and across the second surface of the substrate to form one electrode of the capacitor. A dielectric layer is over the metal film and another metal film extends over the dielectric layer to form the other electrode of the capacitor and the output termination of the termination. In another form of the termination, the capacitor is formed on a cover plate which extends over the first surface of the substrate and is electrically connected between the resistor and an output termination.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: January 28, 1997
    Assignee: EMC Technology, Inc.
    Inventor: Joseph B. Mazzochette
  • Patent number: 5557252
    Abstract: A thick film circuit board includes a substrate, a thick film resistor on the substrate and having a trimming region and a protecting element on the substrate for protecting the thick film resistor and having a window through which the trimming region is exposed. The protecting element may be a protective coating disposed on the substrate. Alternatively, the protective element may be a protective frame extending along an external periphery of a region where the thick film resistor is located on the substrate and having a height for protecting the thick film resistor from mechanical damage.
    Type: Grant
    Filed: May 9, 1994
    Date of Patent: September 17, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Shogo Ariyoshi
  • Patent number: 5444223
    Abstract: A method of and apparatus for identifying an item to or with which a radio frequency identification tag is attached or associated is provided. The tag is made of a nonconductive material to have a flat surface on which a plurality of circuits are pressed, stamped, etched or otherwise positioned. Each circuit has a capacitance and an inductance. The capacitance is formed from the capacitive value of a single capacitor. The inductance is formed from the inductive value of a single inductor coil having two conductive ends each connected to the capacitor. Each tag is associated with a binary number established from a pattern of binary ones and zeros which depend on the resonance or nonresonance of each circuit, respectively and the circuits position with respect to the binary table. The binary number may be converted to a decimal number using the binary table for conversion.
    Type: Grant
    Filed: January 11, 1994
    Date of Patent: August 22, 1995
    Inventor: Michael J. Blama
  • Patent number: 5404265
    Abstract: A bypass capacitor for use with an integrated circuit module, and method of making the same, are shown. The integrated circuit module comprises an integrated circuit "chip" mounted in opposing relationship to a carrier substrate and having a plurality of interconnects, such as solder bumps or wire interconnects, for providing signal lines and supplying power to the chip. Some of the interconnects are, instead, used to form capacitors such that bypass capitance is placed in close proximity to the chip, while not using up valuable real estate on the chip or on the carrier substrate. Various embodiments of such bypass capacitors are shown.
    Type: Grant
    Filed: August 28, 1992
    Date of Patent: April 4, 1995
    Assignee: Fujitsu Limited
    Inventors: Larry L. Moresco, David G. Love, Wen-Chou V. Wang
  • Patent number: 5384434
    Abstract: A dielectric substrate element of a multilayer structure provided with a capacitor in its interior and a magnetic substrate element of a multilayer structure provided with an inductor in its interior are prepared independently of each other. These substrate elements are respectively fired, then superposed with each other, and electrically connected and mechanically bonded by solder bumps to be integrated with each other. Thus, it is possible to obtain a multilayer ceramic circuit board with no integral firing, and the materials for the dielectric substrate element and the magnetic substrate element are not restricted in their capability of integral firing.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: January 24, 1995
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Harufumi Mandai, Kimihide Sugo
  • Patent number: 5383093
    Abstract: A multilayer substrate is constituted by laminating a plurality of sheet substrates, the respective sheet substrates are constituted by forming conductive layers of a refractory metal such as tungsten (W) on ceramic green sheets composed mainly of an alumina ceramic, and the ceramic green sheets are laminated and sintered to constitute the multilayer substrate. Conductive material layers are formed on the surface of the multilayer substrate so as to be selectively connected to the conductive layers, and copper-plated layers are formed on the conductive material layers. Thick film conductor layers are formed on the copper-plated layers, to constitute terminal conductors, and, a thick film resistor layer for example is connected to the terminal conductors.
    Type: Grant
    Filed: July 12, 1993
    Date of Patent: January 17, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventor: Takashi Nagasaka
  • Patent number: 5379190
    Abstract: When resistor elements, common electrodes and individual electrodes are formed on a substrate, a disconnected portion, i.e., open portion is formed in one of the common electrodes. After the respective resistor elements are trimmed, the disconnected portion of the one common electrode is bridged by a conductor.
    Type: Grant
    Filed: February 24, 1993
    Date of Patent: January 3, 1995
    Assignee: Rohm Co., Ltd.
    Inventors: Toshihiro Hanamura, Kaotu Sakai
  • Patent number: 5367436
    Abstract: In a probe terminating apparatus, ground terminals, power supply terminals, and open terminals are provided on a print circuit board, and a ground potential applying terminal and a power supply voltage applying terminal are also provided on the print circuit board. In addition, a pull-down resistance apparatus is inserted to be connected between each of the ground terminals and the ground potential applying terminal, and a pull-up resistance apparatus is inserted to be connected between each of the power supply terminals and the power supply voltage applying terminal. Terminals of an evaluation microcomputer in an in-circuit emulator are connected to the ground terminals, the power supply terminals, and the open terminals by the connection of a probe and an IC socket, or connectors. The probe is connected to the terminals of the evaluation microcomputer, and the IC socket is connected to the ground, power supply and open terminals of the probe terminating apparatus.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: November 22, 1994
    Assignee: NEC Corporation
    Inventor: Satoshi Ikei
  • Patent number: 5365405
    Abstract: A multi-chip module has a carrier (21) of monocrystalline silicon whose surface is at least partially enlarged by anodic electro-chemical etching in a fluoride-containing acidic electrolyte. At least one capacitor (23) that has a dielectric layer and a conductive layer is arranged on the enlarged surface of the carrier (21), whereby the carrier (21) and the conductive layer act as capacitor electrodes.
    Type: Grant
    Filed: May 21, 1993
    Date of Patent: November 15, 1994
    Assignee: Siemens Aktiengesellschaft
    Inventors: Wolfgang Hoenlein, Volker Lehmann