Abstract: A method of forming a capacitive core structure and of forming a circuitized printed wiring board from the core structure and the resulting structures are provided. The capacitive core structure is formed by providing a central conducting plane of a sheet of conductive material and forming at least one clearance hole in the central conducting plane. First and second external conducting planes are laminated to opposite sides of the ground plane with a film of dielectric material between each of the first and second external planes and the central conducting plane. At least one clearance hole is formed in each of the first and second external planes. A circuitized wiring board structure can be formed by laminating a capacitive core structure between two circuitized structures. The invention also relates to the structures formed by these methods.

Abstract: An integrated circuit (IC) mounting board is provided for use to mount an IC module and as least one bypass capacitor thereon. The IC mounting board allows the layout of the wiring between the IC module and the circuit lines on the IC mounting board to be more convenient to carry out. Moreover, the IC mounting board allows the bypass capacitor to provide the bypass effect more effectively.

Abstract: A multiple line grid (MLG) for use in a multiple line grid array(MLGA) packaging incorporates therein circuit elements, e.g., metal lines, resistors, capacitors, inductors, transistors or combinations thereof, with a view to reducing a size of a printed circuit board on which it is mounted. The MLGA package includes a semifinished package including a surface with a first metal pattern formed thereon for connecting a number of input/output terminals, a printed circuit board(PCB) including a top surface with a second metal pattern formed thereon according to the first metal pattern; and at least of a MLG which is disposed between the semifinished package and the PCB. The MLG includes a non-conductive body incorporated therein a plurality of circuit elements and multiple number of conductors in the form of a column. Each of the conductors is electrically isolated from each other and is electrically connected to the first and the second metal patterns.

Abstract: A method of manufacturing a printed circuit board with a polymer thick-film (PTF) resistor whose dimensions can be defined with improved precision by providing a circuit board construction having a planar surface where the resistor is to be deposited. To achieve the desired board construction, the interconnect for the resistor is pattern plated using a permanent photodielectric layer as a plating mask instead of a sacrificial plating resist. The interconnect can be patterned before or after the PTF resistor ink is printed. The x and z dimensions (width and thickness, respectively) of the resistor are determined by the deposition process, while the y dimension (electrical length) is accurately determined by copper terminations.

Abstract: A method is provided for producing a capacitor to be embedded in an electronic circuit package comprising the steps of selecting a first conductor foil, selecting a dielectric material, coating the dielectric material on at least one side of the first conductor foil, and layering the coated foil with a second conductor foil on top of the coating of dielectric material. Also claimed is an electronic circuit package incorporating at least one embedded capacitor manufactured in accordance with the present invention.

Abstract: In a method wherein, before forming a thin film of, for example, metal on a supporting base in a vacuum, a vapor stream of patterning material for forming a pattern in the thin film is applied from nozzle holes, and the thin film is formed after this liquid has been adhered onto the supporting base, the patterning material is applied from the nozzle holes in such manner that it unifies on the supporting base. Thus, even when the pattern width is enlarged, a pattern can be formed in which the blurring at the pattern edges is small.

Abstract: A circuit board substrate assembly includes a generally planar circuit board substrate material having a longitudinal axis extending along a length of the substrate material between a first end and a second end thereof. The circuit board substrate material further has a first edge and a second edge extending along the length of the circuit board substrate material between the first end and the second end. A plurality of openings are defined in the substrate material. Each opening extends between a first distance from the first edge of the circuit board substrate and a second distance from the second edge of the circuit board substrate. Further, each opening separates adjacent circuit forming regions lying along the longitudinal axis and has first and second opposing end portions.

Abstract: Noise frequency generated from a circuit is determined. The distance between two arbitrary lines of a plurality of power feed lines or a plurality of power return lines extending parallel to each other is determined on the basis of the determined noise frequency in question. The distance between jumper lines for bridging the two arbitrary lines is determined on the basis of the noise frequency, thereby suppressing emitted noise which can be generated on a printed circuit board.

Abstract: Nanolaminates are formed by alternating deposition, e.g., by combustion chemical vapor deposition (CCVD), layers of resistive material and layers of dielectric material. Outer resistive material layers are patterned to form discrete patches of resistive material. Electrical pathways between opposed patches of resistive material on opposite sides of the laminate act as capacitors. Electrical pathways horizontally through resistive material layers, which may be connected by via plated holes, act as resistors.

Abstract: A wave transmission line terminator having application in computer data buss termination, single and multiple channel analog transmission line termination and other similar terminations uses thick film components including resistors and capacitors in combination with a ball grid array termination. The thick film resistors are placed on a first side of a substrate opposite the capacitors and ball grid array, and are electrically connected thereto by electrically conductive vias in the substrate. Several different configurations are disclosed which make the terminator more suitable for specific application.

Abstract: The present invention relates generally to a new method and apparatus to enable high yielding double sided and/or multipass screening in the manufacture of multilayer ceramic packages. Also, the present invention enables the screened features to be buried partially or fully with flat surface being available for high yielding post-sinter operations.

Abstract: In a printed circuit board, electronic components such as a component having a pair of leading portions, a chip component having a pair of electrodes, and the like, are connected to circuit patterns; and a resist layer covering a copper foil portion formed as a ground pattern is removed in vicinity of the high-impedance side leading portion of the current leading component and the high-impedance side electrode of the chip component to thereby form removed portions so that discharge paths are formed between the copper foil portion exposed through the removed portions and the leading portion and the electrode.

Abstract: Bare IC chips (201 through 203) are mounted on respective areas (101 through 103) of a printed wiring board (100). The outer electrode pads (105) on the peripheries of the board (100) are soldered to another printed wiring board (1) such as a mother board. Lead pads (107) and the outer electrode pads (105) are interconnected through a circuit pattern (109), through holes (111) and interstitial via holes (112). The circuit pattern (109) is disposed on a die bonding surface of the bare IC chips (201 and 202) for which insulation is not necessary. A multi-chip module is thus completed.

Abstract: A method for high resolution trimming of PCB components, such as capacitors, inductors, transmission lines, transformers, antennas, resistors, etc. The method includes drilling or milling the PCB to effect the electrical characteristics of the component. The actual component can be machined to reduce the size of the component, or electrical connections to the component can be severed. The method can be used to set the capacitance of a tuning capacitor for an oscillator circuit. The tuning capacitor is etched out of the conductive planes on opposing sides of the PCB. The dielectric substrate of the PCB acts as the dielectric for the capacitor. The conductive planes are also etched to define conductive traces and connection pads suitable for surface mounting and electrically connecting the various electrical components on the PCB. The area of the selectively etched capacitive plates has a capacitance that is predetermined.

Abstract: A resistance element, a capacitor and an intermediate electrode are formed on a substrate. The capacitor and the resistance element are connected with the intermediate electrode interposed. Two terminal electrode portions are connected to each other through the intermediate electrode.

Abstract: The surface-mount device package comprises a pad located on a face of the surface-mount device, a solder bump bonded to the pad, and a terminal spaced radially apart from the pad. A terminal surrounds the pad in at least one common plane that bisects the pad and the terminal. An electrically resistive volume intervenes between the pad and the terminal. The pad is electrically coupled to the terminal through the resistive volume. The terminal, the pad, and the electrically resistive volume cooperate to form a passive component associated with at least one device interconnection. The passive component preferable comprises an integral resistor. The integral resistor serves to eliminate or at least substantially reduce electrical resonances and reflections that may otherwise degrade the signal integrity.

Abstract: A land grid array (LGA) carrier includes an interposer having a first surface and a second surface opposite the first surface, with a plurality of locations on the first surface adapted to receive a plurality of semiconductor dice and passive components. The second surface has a plurality of conductive pads coupled thereto.

Abstract: A line circuit module is disclosed which comprises effectively all of the required circuitry for a line card apart from mechanical components such as relays and edge card connectors. The module includes a small ceramic substrate 2.0 inches by 0.825 inches on to which surface mount components which include a heat sensitive integrated circuit and a field effect transistor are mounted to one side and thick film components which include two battery feed resistors are printed on an opposite side. Various innovative techniques are disclosed which significantly reduce compromising component thermal interactions. Heat concerns from using a small thermally conductive substrate have been managed through advantageous use of printed battery feed resistor layouts which provide for larger portions of heat to be dissipated in resistor portions removed from a heat sensitive integrated circuit than resistor portions adjacent to the heat sensitive integrated circuit.

Abstract: A unitized discrete electronic component array being surface mountable as a unit on a printed circuit board comprising a plurality of discrete electronic components physically secured to one another by an adhesive. The adhesive is a non-conducting high temperature resistant epoxy, polyimide or glass. The electronic components are capacitors, resistors or inductors, or combinations thereof.

Abstract: The amplification of crosstalk between two isolated circuits due to a resonant condition between the two circuits is reduced by coupling the electrical grounds associated with the circuits with a series Resistor-Capacitor network.

Abstract: In a surface mount assembly, an active integrated circuit device, such as, for example, a dynamic random access memory, typically has a lead finger attached to a solder pad of a printed wiring board. The surface mount assembly is significantly improved by configuring a passive component, such as a resistor or capacitor, such that it has metallic terminations on an upper and lower surface so that it may be positioned between the solder pad of the printed wiring board and the lead finger.

Abstract: A structure for a capacitor or inductor. The structure includes a set of modular elements which stack together in a rectilinear stack and are electrically coupled at known coupling points. The modular elements may be combined (by connection at the coupling points) to form a capacitor, an inductor, or a circuit having both capacitors and/or inductors as elements. The circuit is constructed by stacking modular elements together and laminating the stack. Multiple circuits having capacitors and/or inductors are constructed at once using a stack of sheets of modular elements. Each stack is then cut into individual circuits and the circuits are fired to bake out organic material.

Abstract: A multi-layered printed circuit board having a plurality of burried passive elements and a method for producing the circuit board wherein the passive elements can include resistors, capacitors and inductors. The method includes the steps of manufacturing individual layers of the multi-layer printed circuit board with electrical circuits thereon and subsequently screening polymer inks having resistive, dielectric or magnetic values to form the resistors, capacitors and inductors. Each layer of the circuit board is cured to dry the polymer ink and thereafter the individual layers are bonded together to form the multi-layer board.

Abstract: A constraining ring increases the modulus of an interconnect substrate to maintain flatness of the substrate. The constraining ring is made of materials selected to match the coefficient of thermal expansion of the substrate to that of the constraining ring. Circuit components including capacitors and resistors are formed on the constraining ring to provide enhanced electrical properties without adding to the size of the device.

Abstract: A high degree of freedom of design and high density mounting are achieved with a laminated electronic part having a structure such that the occurrence of floating capacitance can be restrained. The laminated electronic part is formed of a first layer and a second layer which are joined to each other with a third layer sandwiched therebetween. The first and second layers may be formed of dielectrics having substantially different respective dielectric constants, and the third layer is formed of a dielectric having a dielectric constant lower than that of the first and second layers, or an insulator. Connecting conductors are provided inside the third layer. A through-conductor inside the first layer can be connected to a through-conductor inside the second, for example, layer via the connecting conductor inside the third layer.

Abstract: A ball grid array capacitor has a substrate with a top and bottom surface and a via extending through the substrate. Several capacitors are located on the bottom surface. The capacitors include a top electrode connected to the via, a dielectric layer connected to the top electrode, and a bottom electrode that is connected to the dielectric layer and a ball pad over the bottom electrode. A passivation layer is located between the capacitors. Several solder spheres are electrically and mechanically connected to the bottom electrode. A resistor can be mounted on the top surface and connected to the via to form a filter.

Abstract: Concerning a resistance element comprising a laminated and sintered article of an insulating material substrate layer and a conductor layer formed on or embedded in the insulating material substrate layer, a material which is constituted of tungsten and carbon and has an atomic ratio of tungsten to carbon equal to 1:0.4 to 1:0.98 is used as said conductor layer. Such resistance element can be used at a temperature of 1400.degree. C. or more and even further at a temperature of 1500.degree. C. or more. The resistance element can increase its temperature rapidly to 1100.degree. C. or more within about 3 seconds without any control circuit. The resistance element is a rapid temperature-rise resistance element with a high ignition performance constituted of ceramics with superior durability including resistance to repetitions of temperature increase and decrease, and resistance to oxidation at a high temperature.

Abstract: A land grid array (LGA) carrier includes an interposer having a first surface and a second surface opposite the first surface, with a plurality of locations on the first surface adapted to receive a plurality of semiconductor dice and passive components. The second surface has a plurality of conductive pads coupled thereto.

Abstract: A printed circuit board which has a layer of electrically resistive material that can provide a pull-up/pull-down resistor for the board. The printed circuit board includes a substrate which has a conductive plane located on the top surface of the board. The conductive plane is typically dedicated to electrical power. The board also has a via that is connected to an internal signal line. The resistive material is applied to the top surface to connect the conductive plane to the via and the signal line. The resistive material can be applied with a screening process which simplifies the assembly process of the resistor. Additionally, the resistive material is relatively small and located adjacent to the via so that the resistor does not occupy valuable board space.

Abstract: A printed circuit board or card includes a pair of ball grid array packages connected one over the other on opposite sides of the board or card. The packages may connect through feed-through vias so that board space on the underside of the board, populated by feed-through vias, can be utilized to provide additional functionality. In one implementation, GTL resistive terminations and decoupling capacitors may be included in the ball grid array package on the underside of the board or card.

Abstract: A multichip module having a carrier substrate, on whose component side an IC component and other electronic components are mounted which are interconnected by way of electrically conductive interconnects. Electrical through-lines are led from the component side to the bottom side of the carrier substrate and being joined to solder contacts arranged on the bottom side for the electrical connection of the multichip module to a card cage. To reduce the density of printed circuit traces on the top side of the multichip module, and to decrease the number of layers necessary in the carrier substrate, a carrier part is arranged between an IC component and the carrier substrate, the carrier part having printed circuit traces and components which are connected to the respective IC component by way of first terminal pads, and are connected to terminals on the carrier substrate by way of second terminal pads.

Abstract: A printed capacitor-mounted circuit board capable of increasing a capacity of each of printed capacitors formed on a printed board. A copper-clad laminate is arranged so as to act as an insulating substrate. The printed capacitors each include a first electrode made of a copper foil and arranged on a front surface of the copper-clad laminate. Then, a dielectric layer made of a dielectric paste is arranged on the first electrode and a second electrode made of a conductive paint is arranged on the dielectric layer.

Abstract: Disclosed are a structure and a method of manufacture of a chip composite electronic component with improved moisture resistance. A pair of end electrodes are formed on a surface of the substrate at opposite end portions thereof. An intermediate electrode is formed at a location between the end electrodes on the surface of the substrate. The intermediate electrode includes a lower electrode, a resistor electrode and a pad electrode formed continuous therebetween. Another element is formed on the lower electrode so as to be electrically connected between the lower electrode and one of the end electrodes. A resistance element is formed between the other of the end electrodes and the resistor electrode. A glass layer is formed to cover another element, the resistance element and the pad electrode. A protective layer of a synthetic resin is formed to cover the entire surface of the glass layer and part of each the end electrode.

Abstract: A method is provided for producing a capacitor to be embedded in an electronic circuit package comprising the steps of selecting a first conductor foil, selecting a dielectric material, coating the dielectric material on at least one side of the first conductor foil, and layering the coated foil with a second conductor foil on top of the coating of dielectric material. Also claimed is an electronic circuit package incorporating at least one embedded capacitor manufactured in accordance with the present invention.

Abstract: A lossy capacitive circuit element, or DC scrubber, is printed on a circuit substrate and absorptively filters high frequency signals in circuit modules. A top conductor of the DC scrubber is separated from a ground conductor by a layer of high dielectric material. A resistive layer, positioned either above or below the top conductor absorbs high frequency signals applied to the top conductor while the dielectric layer shunts the signals to the ground conductor. Alternatively, a pair of DC scrubbers are stacked vertically to configure the lossy capacitive structures in parallel. Signal isolation provided by the DC scrubber and the stacked DC scrubber enables inexpensive DC interfaces to be used in the circuit modules.

Abstract: Disclosed are a structure and a method of manufacture of a one-chip electronic composite component which is reduced of size while providing a resistance value properly adjusted. A resistor is formed on an insulator substrate. The resistor has a trimming groove by which a resistance value thereof is adjusted. An electronic element is in electrical connection with the resistor on the substrate. A protection layer covers at least the trimming groove. The resistor is disposed close to one side edge of the substrate with respect to a centerline extending lengthwise of the substrate. The trimming groove extends toward the one side edge of the substrate from a side defining the resistor remote from the one side edge of the substrate.

Abstract: A communication interface between a computer and a vehicle device employs at least one large-area function element of the vehicle device which is developed as counter-electrode for an electrode of a capacitive coupling adapter. The adapter is connected to a computer, and can be applied from the outside to the vehicle device.

Abstract: An emulator probe comprising a plurality of upper connectors fixed to the upper surface of a direction changing board, the upper connectors having terminals electrically connected to the terminals of a lower connector, the upper connectors being fixed to the upper surface with different fixing angles to each other, whereby an emulator can be mounted on a user target board without deforming an emulator cable.

Abstract: In an R-C filter for preventing a noise signal from entering a power supply system through its output circuit, a circuit component acting as a resistive element for the filter is connected in series with the output circuit and a capacitive element is connected between one portion of the circuit component and ground to form an R-C type filter. A wiring member, a printed wiring foil, a through-hole member, a semiconductor device or other such circuit component can be used, as the circuit component acting as the resistive element for constituting the R-C type filter.

Abstract: An electronic component with reduced capacitance includes a substrate (12) with an interconnect line (14), an additional substrate (11) with an interconnect line (13) wherein the substrate (12) overlies the additional substrate (11), an electronic device (15) overlying the substrate (12) and electrically coupled to the interconnect line (14) of the substrate (12), and an additional electronic device (17) having a lead (23) and an additional lead (26) wherein the lead (23) overlies the substrate (12) and is electrically coupled to the interconnect line (14) of the substrate (12) and wherein the additional lead (26) overlies the additional substrate (11) and is electrically coupled to the interconnect line (13) of the additional substrate (11).

Abstract: A pad array carrier module for packaging discrete electronic components is provided. A circuit substrate (8) contains component mounting pad pairs (20), each consisting of a power pad (22) and a ground pad (21), on a first side (10). Component mounting pads are electrically connected by circuit traces (23), through conductive vias (14), to terminal solder pads (16) on the second side (12) of the circuit substrate. Some of the ground pads are connected to a common ground solder pad (17). Likewise, some of the power pads are connected to a common supply voltage solder pad (19). Solder spheres (18) are attached to the solder pads. Discrete electronic components (24) are conductively coupled (26) to the component-mounting pad pairs.

Abstract: A composite component includes a main body which is constituted by combining a first block which is made of dielectric material and contains capacitor electrodes, with a second block which is made of magnetic material and contains inductor electrodes. The main body is provided with recesses for receiving other components and connection electrodes to which the other components are connected. The connection electrodes are themselves connected to lead-out electrodes. The main body is further provided with external electrodes for connection to the capacitor electrodes, the inductor electrodes and the lead-out electrodes.

Abstract: A glass-ceramic substrate for encapsulating an electronic component, with at least two shrinkage control layers restricting shrinkage of the substrate during a co-firing process. The shrinkage control layers are chosen so that they have substantially the same shrinkage characteristics, during co-firing, as the buried electronic component. This results in substantially no differential shrinkage between the electronic component and the substrate, along predetermined directions, during co-firing. In addition, the thermal expansion coefficients of the substrate, shrinkage control layers and electronic component are chosen so that they substantially match, such that their thermal-induced contraction during the cooling phase of the co-firing process substantially match. In the preferred embodiment, the electronic component is buried within the layers of an LTCC structure. The shrinkage control layers are preferably implemented as Al.sub.2 O.sub.3 or TiO.sub.

Abstract: A circuit component assembly and a method for forming the assembly as an annular body in a laminate, preferably between a trough-hole or via and a surrounding conductive layer in a PCB are disclosed, the circuit component assembly including one or more resistors/conductors, inductors and dielectrics/capacitors or combinations thereof, outer and inner peripheries of the circuit component preferably having substantially constant radii permitting simple determination of operative electrical characteristics for the circuit component from (a) the inner and outer radii, (b) an effective thickness for the circuit component and (c) its electrical characteristics determined by the material formed in the annular recess, the circuit component body preferably being formed from a liquid precursor forming conductive interconnections for the circuit component assembly at its outer and inner perimeters.

Abstract: A termination for a high-temperature superconductive thin-film microwave device formed on the obverse side of a substrate with the reverse side of the substrate having a ground plane. The termination can include a thin-film resistor being integral with an operative component, with the substrate being a preselected dielectric substrate. The resistor can have an epitaxially-formed layer of molybdenum metal of a first preselected thickness on the obverse side, and an epitaxially-formed layer of titanium metal of a second preselected thickness thereon. The termination includes a epitaxially-formed thin-film capacitor integral with the resistor. The capacitor can have a layer of titanium metal formed on a portion of the obverse side with a layer of gold metal formed thereon. The substrate can be lanthanum aluminate, and the high-temperature superconductive film can be a yttrium-barium-copper-oxide film. The ground plane can be made of a high-temperature superconductive film and annealed gold.

Abstract: An vertically-integrated electronic assembly containing integral passive components is combined with an integrated circuit creating a three-dimensional package. The electronic assembly is formed as a multi-layered structure having deposited passive components on a substrate layer. Contact pads for the passive components extend to an edge of the substrate layer and are exposed for contact with surrounding circuitry and with the combined integrated circuit.

Abstract: A high-performance, high-density integrated circuit component package includes an IC chip having a plurality of IC bond pads and an interconnect substrate overlying the IC chip. The interconnect substrate includes a plurality of I/O surface pads arrayed across a surface of the interconnect substrate. The I/O surface pads are electrically connected to the IC bond pads via a plurality of traces internal to the interconnect substrate. The interconnect substrate further includes at least one layer comprising capacitive, resistive or inductive material integrally formed therein.

Abstract: A method and apparatus for constructing, repairing and operating modular electronic systems utilizes peripheral half-capacitors (i.e., conductive plates on the outside of the modules) to communicate non-conductively between abutting modules. Such systems provide lower cost, improved testability/repairability and greater density than conventional modular packaging techniques, such as printed circuit boards and multi-chip modules. The non-conductive interconnection technique of the invention can be applied to all levels in the packaging hierarchy, from bare semiconductor dies to complete functional sub-units. Numerous exemplary systems and applications are described.

Abstract: A Marx generator, includes a number of capacitors (E) connected in series via spark gaps (E), between two output terminals and a power supply circuit that charges the capacitors in parallel. The capacitors are connected in series by a flat line formed of two metal strips running parallel and facing one another. These strips are connected together electrically at one end of the line and respectively to the output terminals at the other end and consist of one continuous strip and a second strip subdivided by transverse slots into successive plane sections interconnected in series alternately by a capacitor and a surface spark gap. A structure of this kind reduces the inductance of the generator and hence improves the rise time of the output pulses.

Abstract: A collinear terminated transmission line structure and method for producing same is presented. The structure comprises a plurality of conductors electrically connected to a plurality of resistors. A predetermined spacing between each of the plurality of conductors ranges from 2 mils to 7 mils. Greater spacings are easily accomplished with the present method. The method comprises the steps of screen-printing a resistor swath onto a substrate, the swath being adjacent to one end of the plurality of conductors. After the substrate is dipped into a solution, the resistor swath is laser trimmed to form the plurality of resistors. The substrate is then rinsed with warm water to remove the solution. The solution can be a poly-vinyl alcohol and isopropyl alcohol mixture.