Abstract: Provided a filter and a redistribution layer structure including the same. The capacitor includes a first electrode, a second electrode, a third electrode, a dielectric layer, and a conductive through via. The second electrode is disposed above the first electrode. The third electrode is disposed between the first electrode and the second electrode. The dielectric layer is disposed between the first electrode and the third electrode and between the second electrode and the third electrode. The conductive through via penetrates the dielectric layer and the third electrode to be connected to the first electrode and the second electrode, and is electrically separated from the third electrode. The first electrode and the second electrode are signal electrodes, and the third electrode is a ground electrode.

Abstract: A connection structure embedded substrate includes a printed circuit board including a first insulating body and a plurality of first wiring layers disposed on at least one of an external region or an internal region of the first insulating body; and a connection structure embedded in the first insulating body and including first and second substrates. The first and second substrates are disposed adjacent to each other.

Abstract: A semiconductor package includes: a frame substrate having a plurality of wiring layers and a cavity; an adhesive member disposed at the bottom of the cavity; a semiconductor chip disposed in the cavity, with a connection pad on an upper surface and the lower surface in contact with the adhesive member; a first conductive bump disposed on the connection pad; a second conductive bump disposed on the uppermost of the plurality of wiring layers; an insulating post disposed in the cavity and whose lower surface contacts the adhesive member; an encapsulant filling the cavity and covering side surfaces of the first and second conductive bumps and the insulating post’ and a redistribution structure disposed on the encapsulant, including a redistribution layer electrically connected to the first and second conductive bumps, wherein the insulating post includes a material having a greater hardness than that of the first and second conductive bumps.

Abstract: A multilayer substrate that includes a first ceramic layer that is a dense body, a second ceramic layer that has open pores, and a resin layer adjacent the second ceramic layer, wherein a material of the resin layer is present in the open pores of the second ceramic layer.

Abstract: A component embedded circuit board includes a printed circuit board, a dielectric layer, and an antenna structure laminated in that order. The printed circuit board includes a first opening and a first circuit layer, and the first circuit layer includes at least one first connecting pad. A second opening is defined in the dielectric layer. A conductive structure is embedded in the dielectric layer. The second opening penetrates the dielectric layer. The antenna structure includes a first ground layer. A component is embedded in the first opening. One end of the conductive structure is connected to the first ground layer, and the other end of the conductive structure is connected to the first connecting pad. The second opening corresponds to the first opening. A gap is generated by the second opening and the component. A method for manufacturing the package circuit structure is also disclosed.

Abstract: A power supply device includes a power supply portion, a power supply coil portion having a first end connected to the power supply portion and a second end connected to ground, and a counter wound coil portion that faces the power supply coil portion, the winding direction of which is opposite to that of the power supply coil portion, and the counter wound coil portion has an opened first end and a second end connected to ground.

Abstract: A system and method for providing and programming a programmable inductor is provided. The structure of the programmable inductor includes multiple turns, with programmable interconnects incorporated at various points around the turns to provide a desired isolation of the turns during programming. In an embodiment the programming may be controlled using the size of the vias, the number of vias, or the shapes of the interconnects.

Abstract: The electric circuit includes a first inductor and a third inductor that, when viewed in plan view from a first direction, wind around a first axis extending in the first direction, and a second inductor that, when viewed in plan view from the first direction, winds around a second axis extending in the first direction. A second region where the second inductor is provided overlaps, in the first direction, with a first region where the first inductor is provided or a third region where the third inductor is provided. When a common mode signal is inputted to the first inductor to third inductor, the orientation of a magnetic field produced in the first axis by the first inductor and the third inductor is opposite from the orientation of a magnetic field produced in the second axis by the second inductor.

Abstract: An inductor element is formed in a multiple layer lead structure including a lead, an insulative layer that insulates leads above and below, and a via provided in the insulative layer and connecting leads above and below wherein lead layers are multiply laminated layers, characterized in that: at least a portion of at least a pair of vertically adjacent leads are coiled leads; the coiled leads are connected in series, wherein current directions of vertically adjacent coiled leads are the same by a via provided on an end portion thereof, and form a serial inductance; and an inter-lead capacitance of the vertically adjacent coiled leads is larger than an inter-lead capacitance between other coiled leads formed in the same lead layer.

Abstract: Electrical components such as integrated circuits may be mounted on a printed circuit board. To prevent the electrical components from being subjected to electromagnetic interference, radio-frequency shielding structures may be formed over the components. The radio-frequency shielding structures may be formed from a layer of metallic paint. Components may be covered by a layer of dielectric. Channels may be formed in the dielectric between blocks of circuitry. The metallic paint may be used to coat the surfaces of the dielectric and to fill the channels. Openings may be formed in the surface of the metallic paint to separate radio-frequency shields from each other. Conductive traces on the surface of the printed circuit board may be used in connecting the metallic paint layer to internal printed circuit board traces.

Abstract: Interposers and methods of making the same are disclosed herein. In one embodiment, an interposer includes a region having first and second oppositely facing surfaces and a plurality of pores, each pore extending in a first direction from the first surface towards the second surface, wherein alumina extends along a wall of each pore; a plurality of electrically conductive connection elements extending in the first direction, consisting essentially of aluminum and being electrically isolated from one another by at least the alumina; a first conductive path provided at the first surface for connection with a first component external to the interposer; and a second conductive path provided at the second surface for connection with a second component external to the interposer, wherein the first and second conductive paths are electrically connected through at least some of the connection elements.

Abstract: In a hybrid circuit including a high-voltage circuit and a low-voltage circuit having different power supply voltages from each other, a voltmeter serving as a high-voltage circuit, a high-voltage connector for connecting the voltmeter and the lithium ion battery, the control unit which is a part of the low-voltage circuit and performs switching control to turn on/off internal switches of the voltmeter are mounted on a hybrid integrated circuit. Then, the hybrid integrated circuit is stacked on top of a hybrid integrated circuit mounting area of a low-voltage substrate on which the rest of the low-voltage circuit is mounted.

Abstract: A coil component is provided with a first magnetic substrate, a laminate body, and a second magnetic substrate. A coil is formed inside the laminate body. In the coil, a plurality of coil patterns provided on one surface of an insulation layer and a plurality of coil patterns provided on the other surface of the insulation layer are connected at multiple locations through vias. The coil patterns are configured in such a manner that a portion which is in contact with each via has a wider width widened with equal size from the center of a coil pattern to both sides thereof in the width direction, and a portion which is adjacent to the portion having the wider width across a gap has a narrower width(s) narrowed with equal size from the center of the coil pattern to both sides thereof in the width direction.

Abstract: A wireless surface acoustic wave sensor includes a piezoelectric substrate, a surface acoustic wave device formed on the substrate, and an antenna formed on the substrate. In some embodiments, the antenna is formed on the surface of the substrate using one or more of photolithography, thin film processing, thick film processing, plating, and printing.

Abstract: A mounting land structure and a mounting structure include land patterns to be bonded to outer electrodes of a laminated ceramic capacitor. Each of the land patterns includes a first conductor pattern and a second conductor pattern separated from each other in a width direction and a third conductor pattern connecting the first conductor pattern and the second conductor pattern. The first conductor pattern and the second conductor pattern include respective portions to be bonded to first ridgeline portions of the laminated ceramic capacitor provided with the outer electrodes. The third conductor pattern is arranged at a position overlapping the corresponding outer electrode as viewed in a height direction, when the laminated ceramic capacitor is mounted.

Abstract: An embedded layered inductor is provided that includes a first inductor layer and a second inductor layer coupled to the first inductor layer. The first inductor layer comprises a patterned metal layer that may also be patterned to form pads. The second inductor layer comprises metal deposited in a dielectric layer adjacent the patterned metal layer.

Abstract: A high-frequency module has a multilayer board formed by laminating a plurality of sheets made of a thermoplastic resin material and subjecting the laminated sheets to thermocompression bonding, and an IC chip placed in a cavity provided in the multilayer board. A gap is provided between a side of the IC chip and an inner wall of the cavity. The multilayer board includes a via-hole conductor provided near the inner wall of the cavity for preventing the resin sheets from being softened and flowing into the cavity upon thermocompression bonding.

Abstract: Printed circuit board apparatus with electromagnetic interference shields and methods of making the same.

Abstract: A method for applying a protective coating to selected portions of a substrate is disclosed. The method includes applying a mask to or forming a mask on at least one portion of the substrate that is not to be covered with the protective coating. The mask may be selectively formed by applying a flowable material to the substrate. Alternatively, the mask may be formed from a preformed film. With the mask in place, the protective coating may be applied to the substrate and the mask. A portion of the protective coating that overlies the mask may be delineated from other portions of the protective coating; for example, by cutting, weakening or removing material from the protective coating at locations at or adjacent to the perimeter of the mask. The portion of the protective coating that overlies the mask, and the mask, may then be removed from the substrate.

Abstract: The present invention discloses methods and devices for encapsulating PCBs, assemblies of PCBs, and their electronic components. The encapsulation methods disclosed can be used to produce electromagnetic shields whose impedance is controlled.

Abstract: Provided is an in-millimeter-wave dielectric transmission device. The in-millimeter-wave dielectric transmission device includes a semiconductor chip provided on one interposer substrate and capable of in-millimeter-wave dielectric transmission, an antenna structure connected to the semiconductor chip, two semiconductor packages including a molded resin configured to cover the semiconductor chip and the antenna structure, and a dielectric transmission path provided between the two semiconductor packages to transmit a millimeter wave signal. The semiconductor packages are mounted such that the antenna structures thereof are arranged with the dielectric transmission path interposed therebetween.

Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.

Abstract: A method for manufacturing a chip arrangement in accordance with various embodiments may include: placing a chip on a carrier within an opening of a metal structure disposed over the carrier; fixing the chip to the metal structure; removing the carrier to thereby expose at least one contact of the chip; and forming an electrically conductive connection between the at least one contact of the chip and the metal structure.

Abstract: An electronic component includes an electrically conductive carrier. The electrically conductive carrier includes a carrier surface and a semiconductor chip includes a chip surface. One or both of the carrier surface and the chip surface include a non-planar structure. The chip is attached to the carrier with the chip surface facing towards the carrier surface so that a gap is provided between the chip surface and the carrier surface due to the non-planar structure of one or both of the carrier surface and the first chip surface. The electronic component further includes a first galvanically deposited metallic layer situated in the gap.

Abstract: A method for fabricating a substrate having transferable chiplets includes forming a photo-sensitive adhesive layer on a process side of a source substrate including active components or on a patterned side of a transparent intermediate substrate. The intermediate substrate is brought into contact with the source substrate to adhere the active components on the process side to the patterned side of the intermediate substrate via the photo-sensitive adhesive layer therebetween. Portions of the source substrate opposite the process side thereof are removed to singulate the active components. Portions of the photo-sensitive adhesive layer are selectively exposed to electromagnetic radiation through the intermediate substrate to alter an adhesive strength thereof. Portions of the photo-sensitive adhesive layer having a weaker adhesive strength are selectively removed to define breakable tethers comprising portions of the adhesive layer having a stronger adhesive strength.

Abstract: An electric power steering system is provided. It comprises a steering assist assembly and a motor assembly that actuates the steering assist assembly. A control module that provides steering assist commands to the motor assembly, the control module including a circuit board having a first portion having circuits thereon and a second portion that includes at least one sensor circuit that receives signals from at least one sensor subsystem. A potting material coats only the first portion of the circuit board.

Abstract: A method of manufacturing a printed circuit board (PCB) having an embedded bare chip includes attaching a tape to one side of an insulated substrate having a penetration hole formed therein, and attaching the bare chip onto the tape inside the penetration hole such that electrode pads of the bare chip face the tape; filling up the penetration hole with a filler, and removing the tape; laminating a metal layer onto a surface of the filler and the insulated substrate from which the tape is removed; and forming electrode bumps by removing portions of the metal layer. The forming of electrode bumps further includes simultaneously removing portions of the metal layer and forming an circuit pattern on one side of the insulated substrate. The circuit pattern is formed directly on the upper side of the insulated substrate and the electrode bumps are formed on the surface of the electrode pads.

Abstract: An electronic device may contain components such as flexible printed circuits and rigid printed circuits. Electrical contact pads on a flexible printed circuit may be coupled electrical contact pads on a rigid printed circuit using a coupling member. The coupling member may be configured to electrically couple contact pads on a top surface of the flexible circuit to contact pads on a top surface of the rigid circuit. The coupling member may be configured to bear against a top surface of the flexible circuit so that pads on a bottom surface of the flexible circuit rest against pads on a top surface of the rigid circuit. The coupling member may bear against the top surface of the flexible circuit. The coupling member may include protrusions that extend into openings in the rigid printed circuit. The protrusions may be engaged with engagement members in the openings.

Abstract: A thin-film transistor forming substrate includes a substrate that has flexibility or elasticity and at least one electronic component that is disposed so as to be buried inside the substrate. The electronic component is configured so as to include one or more types of an IC, a capacitor, a resistor, and an inductor.

Abstract: A method for forming vias in a multilayered printed circuit board is disclosed, which includes providing a multilayered printed circuit board having at least two or more layers; placing a donut pad on an upper layer of at least one layer of the multilayered printed circuit board for forming a via through one or more of the layers of the multilayered printed circuit board, the donut pad having a clearance of less than approximately 80 to 90 percent of a diameter of the via; and forming at least one via through the donut pad and at least one or more layers of the multilayered printed circuit board.

Abstract: The device includes a first inductor, a first insulating layer, a second inductor, and a third inductor. The first inductor includes a helical conductive pattern. The second inductor is located in a region overlapping the first inductor through the first insulating layer. The second inductor includes a helical conductive pattern. The third inductor is connected in series to the second inductor, and includes a helical conductive pattern.

Abstract: Systems and methods for providing biologically compatible pockets or envelopes that can contain chips and other circuit elements and can make electrical connection between those elements and living organisms. The assembled biologically compatible pockets and circuit components can have biomedical applications, such as bioimplantable devices such as retinal, cochlear and cortical prosthesis implants, muscular stimulators, and other uses. In various embodiments, the described technology explains how to make and use pocket systems for dealing with chips having connectors on one or two surfaces, and with other circuit components such as resistors, capacitors, inductors and transistors. Operation of chips encapsulated according to the described technology is demonstrated. Accelerated life testing suggests that the pocket systems described will survive for years at 37 degrees C.

Abstract: Electronic devices may have housings in which components are mounted. Some of the components may be sensitive to moisture. Other components may be insensitive to moisture and may form openings in a device housing that allow moisture to escape from within the housing. Components may be mounted on substrates such as printed circuit board substrates. Moisture repelling layers and moisture attracting layers may be patterned to form channels and other structures that guide moisture away from sensitive components towards insensitive components. Moisture repelling and attracting layers may also be used to limit the lateral spread of a conformal coating layer when coating components.

Abstract: A thin-film transistor forming substrate includes a substrate that has flexibility or elasticity and at least one electronic component that is disposed so as to be buried inside the substrate. The electronic component is configured so as to include one or more types of an IC, a capacitor, a resistor, and an inductor.

Abstract: A module board includes a base substrate. Electronic components are mounted on a first principal surface of the base substrate. The mounted electronic components are sealed by a sealing resin containing an SiO2 filler. A top surface and side surfaces of the sealing resin are covered with a shield layer containing a carbon filler, which is flat powder, as a conductive component. A terminal electrode is formed on a second principal surface of the base substrate that is disposed opposite to the first principal surface of the base substrate.

Abstract: A semiconductor device includes a first wiring board, a second semiconductor chip, and a second seal. The first wiring board includes a first substrate, a first semiconductor chip, and a first seal. The first semiconductor chip is disposed on the first substrate. The first seal is disposed on the first substrate. The first seal surrounds the first semiconductor chip. The first seal has the same thickness as the first semiconductor chip. The second semiconductor chip is stacked over the first semiconductor chip. The first semiconductor chip is between the second semiconductor chip and the first substrate. The second semiconductor chip is greater in size in plan view than the first semiconductor chip. The second seal seals at least a first gap between the first semiconductor chip and the second semiconductor chip.

Abstract: A wiring board is provided which can prevent a metal electrode from corroding due to a defect in a transparent conductive electrode covering an end face of an organic insulating film. An active-matrix substrate includes: a glass substrate; a metal wire provided on the glass substrate; a gate insulating film covering the metal wire; an interlayer insulating film covering the gate insulating film; and a transparent electrode formed on the interlayer insulating film. The scanning wire provided with a terminal area where the transparent electrode is laminated directly on the scanning wire. The transparent electrode extends over the terminal area in such a way as to cover an end face of the interlayer insulating film that faces the terminal area and an end face of the gate insulating film that faces the terminal area.

Abstract: An electronic device comprises a functional stack (10) and a cover (50) coupled thereto by an insulating adhesive layer (30). The functional stack (10) comprises a first transparent and electrically conductive layer (22), a second electrically conductive layer (24) and a functional structure (26), comprising at least one layer, sandwiched between said first and second conductive layer. The cover (50) includes a substrate (52) and at least a first conductive structure (66, 68) that is arranged in a first plane between the adhesive layer (28) and the substrate (52). First and second transverse electrical conductors (32, 34) transverse to the first plane (61) electrically interconnect the first and the second electrically conductive layer (22, 24) with the first and the second conductive structure (66, 68) in the first plane (61).

Abstract: Radio frequency system (250) which includes a first and second sub-assembly (100, 200), each formed of a plurality of layers of conductive material (504, 508, 516) disposed on a substrate (102) and arranged in a stack. The stacked layers form signal processing components (108, 110) and at least one peripheral wall (104, 204) surrounding a walled area (118, 218) of each substrate. The second sub-assembly is positioned on the first sub-assembly with a first walled area of a first substrate aligned with a second walled area of a second substrate.

Abstract: Embodiments relate to current sensors and methods. In an embodiment, a current sensor comprises a conductor portion having a first portion and a second portion; at least three slots formed in the conductor portion between the first and second portions, each of the at least three slots having a length and at least one tip portion; at least two bridge portions each having a width separating two of the at least three slots and a length coupling the first and second portions; a first contact region disposed relative to the first portion and a second contact region disposed relative to the second portion; and at least one pair of magnetic sensor elements, a first pair of magnetic sensor elements arranged relative to and spaced apart from a first of the at least two bridge portions.

Abstract: The present technology relates to fused capacitor structures provided with a leadframe design configured to accepting a plurality of selectively placed fuses. The leadframe and fuse configuration enables construction of fused capacitors exhibiting low Equivalent Series Resistance (ESR) and allows construction of a variety of fuse configuration using a single leadframe design.

Abstract: A multilayer printed circuit board, wherein, on a resin-insulating layer that houses a semiconductor element, another resin-insulating layer and a conductor circuit are formed with conductor circuits electrically connected through a via hole, wherein an electromagnetic shielding layer is formed on a resin-insulating layer surrounding a concave portion for housing a semiconductor element or on the inner wall surface of the concave portion, and the semiconductor element is embedded in the concave portion.

Abstract: An EMI noise shield board, in which an EBG structure is inserted, includes a first board portion and a second board portion. The first board portion has an upper surface, on which an electronic part is disposed, and a circuit for transferring a signal and power to the electronic part. The second board portion is located on a lower surface of the first board portion. The electromagnetic bandgap structure is inserted into the second board portion, and has a band stop frequency property such that an EMI noise transferred from the first board portion is shielded from being radiated to the outside of the EMI noise shield board.

Abstract: A protective, anti-tamper coating and methods of coating creation and application are provided. The coating may include an elastomeric layer to allow for strippability/removal. The coating may also include a “smart layer” for tamper detection, imaging prevention, and tamper prevention or underlying device de-activation/alteration upon tamper detection. The coating may also include one or more ground planes around the smart layer and one or more frangible layers designed to interrupt or alter smart layer function in the event of a tamper attempt.

Abstract: Electrical components such as integrated circuits may be mounted on a printed circuit board. To prevent the electrical components from being subjected to electromagnetic interference, radio-frequency shielding structures may be formed over the components. The radio-frequency shielding structures may be formed from a layer of metallic paint. Components may be covered by a layer of dielectric. Channels may be formed in the dielectric between blocks of circuitry. The metallic paint may be used to coat the surfaces of the dielectric and to fill the channels. Openings may be formed in the surface of the metallic paint to separate radio-frequency shields from each other. Conductive traces on the surface of the printed circuit board may be used in connecting the metallic paint layer to internal printed circuit board traces.

Abstract: The present invention relates to a device with portions of the device on plural substrate surfaces. The device includes a low resistivity substrate having first and second surfaces with a first electrically-conductive device component disposed over a first surface. An intermediate electrically-insulating layer may be disposed between the electrically-conductive component and the low resistivity substrate. A second electrically-conductive component is disposed over the second surface of the low resistivity substrate. A cavity formed in the low resistivity substrate is at least partially filled with a high resistivity material. One or more electrically-conducting pathways are formed in the high resistivity material electrically connecting the first electrically conductive component and the second electrically-conductive component to form a device. Exemplary devices include inductors, capacitors, antennas and active or passive devices incorporating such devices.

Abstract: Electronic components each having a chip module with module contacts and an antenna having antenna contacts is made by securing a plurality of the chip modules the inner face of a module film strip having an outer periphery projecting past the chip module with the chip modules spaced from one another at a uniform predetermined module spacing. A plurality of the antennas are secured to an inner face of an elongated antenna strip with the antennas spaced from one another by a predetermined antenna spacing. The module strip is longitudinally subdivided into sections each of which is of a length equal to the predetermined module spacing and each of which carries a respective chip module. The module-strip sections are pressed against the antenna strip such that the module contacts of each of the chip modules engage and bear on the antenna contacts of a respective antenna.

Abstract: A manufacturing technique for constructing passive electronic components in vertical configurations is disclosed. Electrically passive components are constructed in a structure that is substantially perpendicular to target platform including a first plane to provide a larger electrode contact area and a smaller physical dimension. Passive components structured to be substantially perpendicular to a plane associated with a target platform can be directly connected to pad contacts of an integrated circuit or substrate or can be embedded in a package to reduce the area overhead of a passive component while improving the effectiveness of the passive components in their applications.

Abstract: A printed wiring board semiconductor package or PWB power core comprising singulated capacitors embedded on multiple layers of the printed wiring board semiconductor package wherein at least a part of each embedded capacitor lies within the die shadow and wherein the embedded, singulated capacitors comprise at least a first electrode and a second electrode. The first electrodes and second electrodes of the embedded singulated capacitors are interconnected to the Vcc (power) terminals and the Vss (ground) terminals respectively of a semiconductor device. The size of the embedded capacitors are varied to produce different self-resonant frequencies and their vertical placements within the PWB semiconductor package are used to control the inherent inductance of the capacitor-semiconductor electrical interconnections so that customized resonant frequencies of the embedded capacitors can be achieved with low impedance.

Abstract: A multi-layer semiconductor element package structure with surge protection function includes a substrate unit, an insulated unit, a one-way conduction unit and a protection unit. The substrate unit has at least one top substrate, at least one middle substrate and at least one bottom substrate. The insulated unit has at least one first insulated layer filled between the top substrate and the middle substrate and at least one second insulated layer filled between the middle substrate and the bottom substrate. The one-way conduction unit has a plurality of one-way conduction elements electrically disposed between the top substrate and the middle substrate and enclosed by the first insulated layer. The protection unit has at least one protection element with anti surge current or anti surge voltage function electrically disposed between the middle substrate and the bottom substrate and enclosed by the second insulated layer.