Multiple Contact Pins Patents (Class 361/791)
  • Patent number: 7310240
    Abstract: An apparatus for buffering power transients in a supply power for expansion cards inserted into expansion slots on a computer motherboard. The apparatus comprises a printed circuit board, a connector on the printed circuit board, and at least one capacitor on the printed circuit board. The connector is configured to fit into one of the expansion slots on the motherboard, and comprises at least one power pin and at least one ground pin. The at least one capacitor is connected to the power and ground pins of the connector and has sufficient capacitance to buffer power transients within the supply power to the expansion slots.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: December 18, 2007
    Assignee: OCZ Technology Group, Inc.
    Inventor: Ryan M. Petersen
  • Patent number: 7307354
    Abstract: An integrated circuit (IC) carrier assembly includes a printed circuit board (PCB). A carrier is soldered to the PCB. The carrier includes a grid of electrical contact islands surrounding a receiving zone for receiving an IC. Pairs of adjacent islands are interconnected by respective resilient suspension means. The IC is received in the receiving zone and is electrically coupled to a number of the plurality of islands adjacent to the receiving zone. The IC is fast to a retainer, and the retainer is fast with the number of the plurality of islands and the IC.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: December 11, 2007
    Assignee: Silverbrook Research Pty Ltd
    Inventor: Kia Silverbrook
  • Patent number: 7290330
    Abstract: A system including a circuit board and several pluggable modules coupled to the circuit board. The several pluggable modules are insertable through side-by-side slots in an enclosure in which the circuit board resides. A first pluggable module is coupled to the circuit board via a first connector, while a second pluggable module is coupled to the circuit board via a second connector such that the second pluggable module is laterally offset from the first pluggable module. The first and second connectors are right angle connectors, and the second right angle connector is inverted relative to the first right angle connector. The first and second pluggable modules are I/O modules for transporting high speed differential signals, and wherein the first pluggable module includes several XFP connectors, and wherein the second pluggable module includes several SFP connectors. The second pluggable module includes several SFP connectors arranged on both sides of the pluggable module.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: November 6, 2007
    Assignee: EMC Corporation
    Inventors: Steven D. Sardella, Stephen E. Strickland, Bassem N. Bishay, Thomas J. Connor, Jr.
  • Patent number: 7289333
    Abstract: A first circuit board connectable to a second circuit board is disclosed. The first circuit board includes at least one set of contacts, a detection circuit, and a voltage generator. Each set of contacts is configured to receive an electrically conductive keypin for bridging a set of the contacts. The detection circuit is in signal communication with the contacts and produces a logic signal in response to a set of the contacts being bridged. The voltage generator is responsive to the logic signal and produces a voltage signal at a connector connectable to the second circuit board. The voltage signal at the connector has a first voltage in response to the keypin being disposed at a first location, and a second different voltage in response to the keypin being disposed at a second location, wherein at least one of the pin locations results in a set of the contacts being bridged.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: October 30, 2007
    Assignee: General Electric Company
    Inventors: William Arthur Warner, II, David Shannon Slaton
  • Patent number: 7249978
    Abstract: A USB device in which all of the devices ICs are located on a lower surface of a PCB (i.e., opposite to the metal contacts) to minimize the device's thickness, and at least one of the ICs is positioned on a relatively narrow portion of the USB plug to minimize the device's length. A card-like carrier for protecting the USB device when not in use includes a frame-like base portion having peripheral walls surrounding a relatively wide main chamber, and an end portion that is attached to the base portion and includes end walls that define a relatively narrow slot communicating with the main chamber. The USB device plug structure is inserted through the main chamber into the slot until a front edge of the handle structure abuts the end walls, and then the device is rotated downward into the main chamber.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: July 31, 2007
    Assignee: Super Talent Electronics, Inc.
    Inventor: Jim Ni
  • Patent number: 7247941
    Abstract: A printed circuit board (PCB) assembly includes a PCB. An integrated circuit (IC) carrier defines a receiving zone to receive an IC. The carrier has a plurality of island portions about the receiving zone. Each island portion includes a solder member for contacting the PCB. A plurality of resilient serpentine members interconnect neighboring island portions so that at least some relative displacement of the PCB and the carrier is accommodated by the serpentine member, thereby alleviating strain imparted to the solder member.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: July 24, 2007
    Assignee: Silverbrook Research Pty Ltd
    Inventor: Kia Silverbrook
  • Patent number: 7239013
    Abstract: A multilayer wiring board exhibiting excellent moldability and having a capacitor where variation of capacitance is suppressed, its producing method, a semiconductor device mounting a semiconductor chip on the multilayer wiring board, and a radio electronic device mounting the semiconductor device.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: July 3, 2007
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Yasushi Shimada, Yoshitaka Hirata, Hiroyuki Kuriya, Kazuhisa Otsuka, Masanori Yamaguchi, Yuichi Shimayama, Ken Madarame, Etsuo Mizushima, Yuusuke Kondou, Kazunori Yamamoto
  • Patent number: 7154172
    Abstract: An integrated circuit carrier is claimed comprising at least one receiving zone for an integrated circuit. A plurality of island-defining portions, having electrical terminals, is arranged about each of the receiving zones. Rigidity-reducing arrangements are disposed between neighbouring island-defining portions.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: December 26, 2006
    Assignee: Silverbrook Research Pty Ltd
    Inventor: Kia Silverbrook
  • Patent number: 7139177
    Abstract: A circuit board includes at least one insulator layer and a plurality of conductors over which a plurality of signals is carried. A plurality of terminals is coupled to at least a subset of the plurality of conductors. A void is formed in the circuit board between at least two terminals.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: November 21, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventor: Gary Gottlieb
  • Patent number: 7068517
    Abstract: A connecting device with a low height comprises a connector part, and a set of metal terminals. The connector part has a height compatible with the height of an inner space in a standard USB interface slot socket so as to be inserted into the standard USB interface slot socket. The set of metal terminals is arranged on the connector part and composed of a plurality of metal sheets and each metal sheet has an end disposed in the connector part and another end extending outward the connector part. The first end of the respective metal sheet in the set of metal terminals contacts with internal electronic signal of the standard USB interface slot socket and the second end of the respective metal sheet is soldered to a printed circuit board. Furthermore, the low height connecting device can be revised as an electronic connecting device capable of being inserted into the USB slot socket so that both of the connecting devices can be used in a dual interface memory storage apparatus or a memory storage apparatus.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: June 27, 2006
    Assignee: Power Quotient International Co., Ltd.
    Inventor: Sheng Shun Yen
  • Patent number: 6930889
    Abstract: A circuit board includes a substrate and electrical contacts to mate with a slot connector. The contacts include a first set of contacts that are associated with the communication of power and second set of contacts that are associated with the communication of signals and are not used to communicate power. Adjacent contacts of the first set have a first spacing, and adjacent contacts of the second set have a second spacing different from the first spacing. The circuit board has a retention profile to engage a retention mechanism of the slot connector. A housing of the slot connector may be made from a material that has a thermal conductivity of at least 0.27 W/m·K, and the slot connector housing may include fins that are formed on the slot connector to conduct heat away from circuitry of the circuit board.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: August 16, 2005
    Assignee: Intel Corporation
    Inventors: Joe A. Harrison, Edward R. Stanford, Daniel S. Kingsley, Kelli A. Wise
  • Patent number: 6884938
    Abstract: A circuit module includes an insulating base including a first wiring pattern and a cavity; at least one first electrical component disposed in the cavity; and a lid including a second wiring pattern. The insulating base includes a circuit board composed of laminated substrates and a sidewall protruding from the board surface of the circuit board and forming the cavity together with the circuit board, and the lid has at least one second electrical component fixed thereto. Also, in a state in which the second electrical component is located in the cavity, the lid is fixed on the upper surface of the sidewall so as to cover the cavity, and the first and second wiring patterns are connected to each other with at least one connecting conductor.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: April 26, 2005
    Assignee: Alps Electric Co., Ltd.
    Inventor: Toru Aoyagi
  • Patent number: 6768651
    Abstract: A communication device includes a sub-rack unit and a plurality of plug-in units. The sub-rack unit includes a back wiring board having first connectors arranged in lines thereon, and a frame plate including vertical ribs and placed on said back wiring board so that the vertical ribs separate the lines of the first connectors. Each of the plug-in units includes: a printed board including top and bottom sides and parallel first and second sides, the printed board having second connectors provided on the first side thereof; a metal case including top and bottom faces, and parallel first and second side faces so as to cover the printed board; and first and second spring members. Each of said plug-in units is mounted in the sub-rack unit with the first and second connectors being connected so that the first and second side faces of the metal case are pressed outward against the vertical ribs of the frame plate by resilient forces of the first and second spring members, respectively.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: July 27, 2004
    Assignees: Fujitsu Limited, Fujitsu Denso Ltd.
    Inventors: Tsutomu Takahashi, Katsuya Fujii, Hisao Hayashi, Shiro Tani, Kazunori Oomori, Koichi Namimatsu, Hideki Zenitani, Masato Konishi
  • Patent number: 6744634
    Abstract: A connecting device with a low height comprises a connector part, and a set of metal terminals. The connector part has a height compatible with the height of an inner space in a standard USB interface slot socket so as to be inserted into the standard USB interface slot socket. The set of metal terminals is arranged on the connector part and composed of a plurality of metal sheets and each metal sheet has an end disposed in the connector part and another end extending outward the connector part. The first end of the respective metal sheet in the set of metal terminals contacts with internal electronic signal of the standard USB interface slot socket and the second end of the respective metal sheet is soldered to a printed circuit board. Furthermore, the low height connecting device can be revised as an electronic connecting device capable of being inserted into the USB slot socket so that both of the connecting devices can be used in a dual interface memory storage apparatus or a memory storage apparatus.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: June 1, 2004
    Assignee: Power Quotient International Co., Ltd.
    Inventor: Sheng Shun Yen
  • Patent number: 6738474
    Abstract: POTS splitter devices are provided which are externally mounted with respect to digital subscriber loop access multiplexers and remote terminal and central office equipment racks. A cable having in-line sockets for receiving a combination POTS splitter and surge protection device provides POTS-only signals from a customer's premises to channel banks. The cable is connected to a protection panel configured so as not to consume equipment rack space. A multiport enclosure is provided with a multiport POTS splitter and surge plugs to transmit POTS signals from plural telephone lines to line termination equipment, and at least xDSL signals to a DSLAM via a cable. A multiport POTS splitter enclosure is also provided with connectors for externally mounted surge plugs. A protection panel is provided with integrated POTS splitters, xDSL filters and surge plugs to support plural telephone lines.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: May 18, 2004
    Assignee: ECI Telecom, Ltd.
    Inventor: Edwin Paul Miller
  • Publication number: 20040061241
    Abstract: A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 1, 2004
    Inventors: Edward P. Osburn, Erik W. Peter, Timothy M. Gates
  • Patent number: 6700790
    Abstract: In a circuit board comprising multiple layers and having an integrated circuit mounted on the outer layer thereof, a main power supply plane and a sub-power supply plane, which is disposed in an island fashion with a clearance that terminates electric connection with the main power supply plane, are formed on the same layer. The main power supply plane and the sub-power supply plane are connected by first power supply patterns that are formed on a layer different from the layer on which the power supply planes are formed and to which bypass condensers are connected. Power supply to some power supply terminals is achieved via second power supply patterns that are connected to the sub-power supply plane. The leakage of noise from the power supply terminals connected to the second power supply patterns is controlled by the first power supply patterns. Through this construction, the EMI noise radiated from the circuit board can be reduced while minimizing the number of bypass condensers.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: March 2, 2004
    Assignee: Minolta Co., Ltd.
    Inventors: Tomoji Tanaka, Yutaka Yamamoto
  • Patent number: 6690580
    Abstract: This disclosure describes use of dielectric islands embedded in metallized regions of a semiconductor device. The islands are formed in a cavity of a dielectric layer, as upright pillars attached at their base to an underlying dielectric. The islands break up the metal-dielectric interface and thus resist delamination of metal at this interface. The top of each island pillar is recessed from the cavity entrance by a selected vertical distance. This distance may be varied within certain ranges, to place the island tops in optimal positions below the top surface plane of the dielectric. Metallization introduced into the cavity containing the islands, submerges the island tops to at least a minimum distance to provide a needed minimum thickness of continuous metal. The continuous metal surface serves favorably as a last metal layer for attaching solder or for bump-bonding package to the IC; and also serves as an intermediate test or probe pad in an interior layer.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: February 10, 2004
    Assignees: AMD, Inc., Motorola, Inc.
    Inventors: Cindy K. Goldberg, John Iacoponi
  • Patent number: 6690582
    Abstract: In an electronic control unit mounting structure, electronic control units are mounted on a junction block, and printed circuit boards 4a and 4b of the electronic control units, each having a connector 41a, 41b of a through construction mounted thereon, are superposed in such a posture that these connectors 41a and 41b are disposed in registry with each other in an upward-downward direction, and connection terminals 31 of the junction block are inserted in the connectors 41a and 41b.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: February 10, 2004
    Assignees: Autonetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventor: Yoshitaka Sumida
  • Patent number: 6683789
    Abstract: An electronic control module (20) comprising a housing (30), a printed circuit board (40), and a rigidizer (50). The housing (30) has an opening or window (34) for a removable connector (22). The printed circuit board (40) has a first side (42), a second side (44), and a plurality of contact pads (46). The first side (42) of the board (40) is used to retain components and circuitry. The plurality of contact pads (46) is positioned on the first side (42) of the printed circuit board (40). The rigidizer (50) is attached to the second side (44) of the printed circuit board (40) and provides structural backing for the printed circuit board (40) to compensate for any pressure induced to the first side (42) of the printed circuit board (40) by the removable connector (22). The window (34) in the housing (30) is positioned adjacent to the plurality of contact pads (46) on the first side (42) of the printed circuit board (40) to provide a single opening to each of the contact pads (46).
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: January 27, 2004
    Assignee: Motorola, Inc.
    Inventors: Romy Sheynis, Mark D. Gunderson, Stanton Rak
  • Patent number: 6678164
    Abstract: In a pressure sensor, a sensor element is mounted on a side of a first surface of a first case, and a second case having a cylindrical hollow portion is bonded to the first case to cover a part of a second surface of the first case, opposite to the first surface. Terminals are embedded in the first case to protrude from the second surface, and branch portions are branched from the terminals from an embedded portion in the first case to have exposed portions exposed to the second surface. A chip capacitor is mounted on the exposed portions on the second surface to be electrically connected to the exposed portions. In the pressure sensor, a diameter (D1) of the second surface of the first case is larger than an inner diameter (D2) of the hollow portion at a position where protrusion top ends of the terminals are positioned.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: January 13, 2004
    Assignee: Denso Corporation
    Inventors: Kenji Chikuan, Michitake Kuroda, Haruhiko Miyagawa
  • Publication number: 20030227764
    Abstract: A method of assembling a power distribution apparatus including a plurality of conductive circuit plates, each conductive plate including a plurality of contact pads that are interconnected by removable connecting links. The method includes selectively removing a portion of the connecting links on each conductive circuit plate to form discrete circuits on the conductive plates, stacking the conductive plates, mounting contact pins to selected contact pads, and heating the stacked plates and the mounted contact pins, thereby reflowing the conductive circuit plates and the pins to create solder joints therebetween.
    Type: Application
    Filed: November 20, 2002
    Publication date: December 11, 2003
    Inventor: Jacek M. Korczynski
  • Patent number: 6633490
    Abstract: An electronic board assembly carrying connectors on each side of its lower edge which is adapted to withstand the relatively strong forces required to insert or remove the assembly, e.g., from a backplane board, and yet provide many electrical contacts along the interconnection sites. The electronic board assembly comprises two symmetrical elementary PCBs electrically coupled together, each carrying a connector on its external lower edge. In one embodiment, these two PCBs are coupled together by a flexible adhesive insulative layer and maintained by mechanical devices such that the distance between these two connectors is set to a predetermined distance (to align precisely with the backplane board). The mechanical device used to maintain a predetermined distance between the two connectors of the assembly may comprise a U-shaped member, the upper part of this member being strategically inserted between these connectors.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: October 14, 2003
    Assignee: International Business Machines Corporation
    Inventors: Bruno Centola, Claude Gomez, Christian Ouazana
  • Patent number: 6625038
    Abstract: The invention relates to a circuit substrate assembly comprising a left-hand (1) and a right-hand (1′) circuit substrate mirror-symmetrical thereto, each including electrical and/or electronic and/or electromechanical components (2-6 or 2′-6′) and circuitry (7 or 7′) electrical connecting said components. All components (2-6) are positioned symmetrically mirrored on the left-hand (1) and right-hand (1′) circuit substrate respectively when the left-hand (1) and right-hand (1′) circuit substrate is oriented mirror-symmetrical along a mirror plane (P). However, the circuit functional plug assignments (A-F) of at least one circuit functional mirror-invariant component 2 or 2′) on the left-hand (1) and on the right-hand (1′) circuit substrate are not mirror-symmetrical to each other.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: September 23, 2003
    Assignee: Cherry GmbH
    Inventor: Dirk Raschke
  • Patent number: 6614664
    Abstract: A memory module having series-connected printed circuit boards is provided. The memory module comprises a plurality of printed circuit boards, each comprising a plurality of memory chips mounted thereon, and signal lines and connection means for electrically connecting the printed circuit boards to one another. The connection means electrically series-connects the signal lines of each of the printed circuit boards. Preferably, an end termination circuit is formed on a terminal of the signal line of the farthest printed circuit board from a connector of a mother board, and the memory chip performs at a speed of approximately 150˜300 MHz. The connection means is a flexible jumper assembly having a flexible film and a jumper line formed on the flexible film. Each of the printed circuit boards further comprises a jumper pad connected with the signal lines. The flexible jumper assembly interconnects the jumper pads of each of the printed circuit boards to one another.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: September 2, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong Yang Lee
  • Publication number: 20030161127
    Abstract: Apparatus, methods and articles of manufacture for electronic module assemblies are shown, comprising a pin organizer installed after a header is assembled to a module. Opposing forces tension the organizer, header and module assembly, so as to provide a relatively fixed anchor for the header upon the module, as well as providing orientation for the module and support for a pin array.
    Type: Application
    Filed: February 28, 2002
    Publication date: August 28, 2003
    Inventors: Vincent M. Kane, Keith R. Foltz
  • Publication number: 20030099098
    Abstract: A connector assembly for a radio frequency (RF) signal includes a body, a flange connected to the body and having a cavity, and a plurality of pins extending from the flange, in which the cavity of the flange receives a chip carrier and the pins contact the chip carrier so as to minimize the signal path from the connect pin to the device in the chip carrier.
    Type: Application
    Filed: November 23, 2001
    Publication date: May 29, 2003
    Inventor: Jose Schutt-Aine
  • Patent number: 6555757
    Abstract: A pin standing resin substrate 311 comprises a resin substrate 313 and many pins 301 soldered (HD) to a pin-pad 317A, the resin substrate comprising such as a resin and having a pin-pad 317AP whose diameter of a portion exposed in a main surface 313A is 0.9 to 1.1 mm. The kovar-made pin 301 is previously heat-treated at 700° C., whereby Vickers hardness is made Hv=around 150, and the pin has a rod-like portion 301A of a diameter being 0.3 mm and an enlarged diameter portion 301B shaped in disk being 0.60 to 0.70 mm and thickness being 0.15 to 0.20 mm, the enlarged diameter portion being formed at one end of the rod-like portion 301A. This enlarged diameter portion 301B is soldered to the pin-pad.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: April 29, 2003
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Hajime Saiki, Noritaka Miyamoto
  • Patent number: 6537100
    Abstract: The invention relates to a circuit package comprising a module and a socket which cooperate to provide quick and easy insertion of the module into the socket using a small insertion force, accurate alignment between the module and the socket after insertion, and coupling between a module coupling site and a socket coupling site after insertion. A socket guide feature allows an edge of the module to slide along the guide feature during insertion of the module into the socket, and a module alignment feature interlocks with a socket alignment feature after insertion of the module into the socket. In addition, after insertion of the module into the socket, a retaining feature restricts the motion of the module so that the module coupling site remains in contact with the socket coupling site.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: March 25, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Walter L. Moden
  • Patent number: 6538899
    Abstract: A traceless midplane contains substantially no traces, pins, or active components and includes a front portion and a back portion. The front portion includes first connectors. The back portion includes second connectors arranged in a grid pattern. Each of the second connectors includes electrically-conductive conduits that connect the second connector to a corresponding one of the first connectors through the midplane. The second connectors include data connection points, ground connection points, and clock connection points. At least some of the data connection points are separated from each other and from the clock connection points by the ground connection points.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: March 25, 2003
    Assignee: Juniper Networks, Inc.
    Inventors: Ashok Krishnamurthi, Ramalingam K. Anand
  • Publication number: 20030001254
    Abstract: A electronic assembly is disclosed and claimed. The electronic assembly includes a first substrate and a second substrate. A plurality of power connections are coupled between the first substrate and the second substrate and a multiplicity of signal connections separate from the plurality of power connections are also coupled between the first substrate and the second substrate. Each of the plurality of power connections have a substantially different size and shape compared to each of the multiplicity of signal connections.
    Type: Application
    Filed: June 27, 2001
    Publication date: January 2, 2003
    Inventors: James Daniel Jackson, Terrance J. Dishongh, Damion T. Searls
  • Patent number: 6495770
    Abstract: The invention provides an electronic assembly including a semiconductor chip and a semiconductor package substrate having power and ground shunts. The power and ground shunts of the semiconductor chip include contact pads on a surface thereof that are electrically connected to one another to protect electrical signal contacts on the contact pads from high, low-frequency current. The power shunt in the semiconductor package substrate connects one power plane to another and the ground shunts in the semiconductor package substrate connects one ground plane to another. The power and ground shunts in the semiconductor package substrate dictate terminal pins thereon from high, low-frequency current.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: December 17, 2002
    Assignee: Intel Corporation
    Inventors: Yuan-Liang Li, David G. Figueroa, Priyavadan R. Patel
  • Patent number: 6496383
    Abstract: In an integrated circuit carrier having a large number of power pins allocated to an internal power plane, the current flowing through the power pins may divide very unevenly, and result in current flow through some of the power pins which exceeds the maximum specification for either the package pin or for the socket into which the package may be inserted. In such a package, the magnitude of the current flowing through the highest current power pin may be reduced by configuring the resistance of the power plane(s) and vias to provide approximately the same total resistance to every power pin location. Slots may be cut in a package power plane to alter the current path and raise the impedance of the conduction path between some of the package power pins and the internal contact pads otherwise having the lowest impedance.
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: December 17, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Dennis J. Herrell, Thomas J. Hirsch
  • Patent number: 6496377
    Abstract: A vehicle electric power distribution apparatus is provided which includes a plurality of vertically stacked conductive circuit layers, each layer including an array of contact pads, a layer of electrically insulating plastic material between each of the conductive circuit layers, at least some of the contact pads are electrically connected to selected other contact pads of the same conductive circuit layer via integrally formed conductive traces. In addition to the stacked circuit layers the apparatus includes a plurality of conductive pins providing electrical contact between selected contact pads of different selected conductive circuit layers.
    Type: Grant
    Filed: October 9, 1996
    Date of Patent: December 17, 2002
    Assignee: CooperTechnologies Company
    Inventors: Lawrence R. Happ, Jacek Korczynski, Willaim R. Bailey, Alan Lesesky
  • Patent number: 6496358
    Abstract: The present invention relates to a breaker apparatus and breaker unit. The breaker apparatus comprises a breaker unit including a power supply/cut-off breaker part, a power connecting part, a first unit connecting part, a ground connecting part and a second unit connecting part and further comprises a breaker unit mounting board including a mating power connecting part, a mating ground connecting part, a first connection mediating part and a second connection mediating part. This breaker apparatus is capable of constituting a power distributing apparatus with a necessary but minimized construction, and of extending the breaker unit in a minimum unit according to necessity. In addition, with this breaker apparatus, parts can be used in common irrespective of a change of a ground system, and further, can be replaced in the hot-line condition without cutting off the power supply to a system.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: December 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Yasuhisa Kanemaru, Takahisa Yoshizumi, Kazunori Oomori, Yoshiaki Tobimatsu, Yasunori Murata, Mitsuru Etou
  • Patent number: 6459045
    Abstract: A circuit sub-board for regulating constant power source and strengthening ground connections. The circuit sub-board is a double-layered printed circuit board having a large surface power-source layer and a ground-connection layer. The circuit sub-board is utilized to cover the insufficiently ground-covered main board signaling lines as well as insufficiently ground-connected power and ground signaling lines on the main board. With the installation of the circuit sub-board, signals can be transmitted more reliably and with less interference.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: October 1, 2002
    Assignee: Via Technologies, Inc.
    Inventors: Nai-Shung Chang, Shu-Hui Chen
  • Patent number: 6445590
    Abstract: In one embodiment, a dummy via is created in a circuit board. The dummy via is positioned and coupled to a portion of a transmission line. This portion of the transmission line is further coupled to a signal lead of a connector, which creates additional capacitance to lower the impedance of the connector.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: September 3, 2002
    Assignee: Intel Corporation
    Inventor: Keith Dow
  • Patent number: 6444923
    Abstract: At one end of a printed wiring board, there is formed a narrow-pitched electrode pattern and engagement patterns made of the same material as that of the electrode pattern. At one end of an FPC which is to be connected with the printed circuit board, there is formed a narrow-pitched electrode pattern and engagement patterns made of the same material as that of the electrode pattern. The engagement patterns in the printed wiring board being engageable with the engagement patterns in the FPC. When the two engagement patterns are engaged with each other, the electrode pattern of the printed wiring board is electrically connected with the electrode pattern of the FPC.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: September 3, 2002
    Assignee: Fujitsu Limited
    Inventors: Shigeo Iriguchi, Satoshi Watanabe, Yoshitaka Muraoka
  • Publication number: 20020071260
    Abstract: An electronic board assembly carrying connectors on each side of its lower edge which is adapted to withstand the relatively strong forces required to insert or remove the assembly, e.g., from a backplane board, and yet provide many electrical contacts along the interconnection sites. The electronic board assembly comprises two symmetrical elementary PCBs electrically coupled together, each carrying a connector on its external lower edge. In one embodiment, these two PCBs are coupled together by a flexible adhesive insulative layer and maintained by mechanical devices such that the distance between these two connectors is set to a predetermined distance (to align precisely with the backplane board). The mechanical device used to maintain a predetermined distance between the two connectors of the assembly may comprise a U-shaped member, the upper part of this member being strategically inserted between these connectors.
    Type: Application
    Filed: December 10, 2001
    Publication date: June 13, 2002
    Applicant: International Business Machines Corporation
    Inventors: Bruno Centola, Claude Gomez, Christian Ouazana
  • Patent number: 6396711
    Abstract: The specification describes interconnection strategies for micro-electronic machined mechanical systems (MEMS). Typical MEMS device array comprise a large number of individual mechanical devices each electrically driven by multi-chip modules (MCMs). High density interconnection is achieved by mounting the MCMs mounted on both sides of a system interconnection substrate. Overall interconnection length is reduced by locating the MCMs in a common circuit driving a given mechanical element on opposite sides of the system interconnection substrate and interconnecting them using vias through the substrate. Rapid replacement/repair is facilitated by mounted all active elements in sockets using contact pin arrays for electrical connections. In service reliability is obtained by providing spare sockets for redundant MCMs.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: May 28, 2002
    Assignees: Agere Systems Guardian Corp., Lucent Technologies Inc.
    Inventors: Yinon Degani, Thomas Dixon Dudderar, King Lien Tai
  • Patent number: 6376778
    Abstract: A printed circuit board assembly comprises a circuit membrane, a printed circuit board, a cover plate and two screws. The cover plate has an arch-shaped bump formed thereon such that the ribbon cable has firm contact with the printed circuit board. Therefore, the electric contacts of the printed circuit board are in firm contact with the electric contacts of the circuit membrane. The cost and assembling time is saved.
    Type: Grant
    Filed: April 4, 2001
    Date of Patent: April 23, 2002
    Assignee: Silitek Corporation
    Inventor: Yao-Lun Huang
  • Patent number: 6351392
    Abstract: The present invention provides a small adapter apparatus useable for high density integrated circuit packages, e.g., ball grid array packages. The adapter apparatus includes an adapter body member having a length along an adapter axis between a first adapter end and a second adapter end of the adapter body member. An array of contact elements, e.g., solder spheres, are disposed on the first adapter end of the adapter body member. Further, the adapter apparatus includes an array of elongated pin elements. Each elongated pin element corresponds to one of the array of contact elements and extends parallel to the adapter axis from a corresponding contact element through the adapter body member and the second adapter end thereof. One or more of the elongated pin elements of the array is of a different length than one or more other elongated pin elements. Various socket devices for receiving and retaining the elongated pins are also provided.
    Type: Grant
    Filed: October 5, 1999
    Date of Patent: February 26, 2002
    Assignee: Ironwood Electronics, Inc,
    Inventor: Ilavarasan Palaniappa
  • Patent number: 6349037
    Abstract: An electrical machine, such as a router, switch, hub, etc., includes a housing in which a Primary Backplane and Secondary Backplane are mounted in stacked spaced relationship. A primary Bus is fabricated on the Primary Backplane and a secondary Bus is fabricated on the Secondary Backplane. Connectors with feed through elements provide mechanical support and electrical transmission between the Primary Backplane and Secondary Backplane.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: February 19, 2002
    Assignee: International Business Machines Corporation
    Inventors: Roy Lee Draughn, Christopher Lee Durham, Robert Fung-chen Pan, Theodore Brian Vojnovich
  • Patent number: 6343007
    Abstract: A telecommunications shelf is disclosed that includes a back portion of a shelf, a bus control transition module, and a back plane. The back portion of the shelf is operable to receive a plurality of transition modules. The bus control transition module is received in the back portion of the shelf. The back plane is coupled to the bus control transition module. The bus control transition module is operable to provide system functions for a plurality of cards in the shelf over the back plane.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: January 29, 2002
    Assignee: Alcatel USA Sourcing, L.P.
    Inventors: Gerald R. Dubois, Serge F. Fourcand, Eddie R. Bradley
  • Patent number: 6333471
    Abstract: A sheet metal component (8) for pattern conduction comprises a lead portion (8a) that is connected to an end portion of a first portion (8c1) of a ceiling portion (8c) by a coupling portion (8d) forming a first bend (R1); and a portion to be soldered (8b) that is bent inwardly from an end portion (8c2E, 8c3E) of a longitudinally protruding second portion (8c2, 8c3) of the ceiling portion (8c), which is connected to the first portion (8c1), so as to form a second bend (R2).
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: December 25, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Shinichi Nojioka
  • Patent number: 6259039
    Abstract: A surface mountable pin connector has a substrate or a circuit board carrier, which has a number of through holes or vias formed therein, and a number of connector pins, each of which is soldered into a respective one of the through holes with high melt temperature solder. A damming device or protrusion is located on each pin nearer to the shoulder than typical interference fit protrusions. The damming device is sized and shaped to completely block the through hole or via.
    Type: Grant
    Filed: December 29, 1998
    Date of Patent: July 10, 2001
    Assignee: Intel Corporation
    Inventors: Robert J. Chroneos, Jr., Hamid Ekhlassi
  • Patent number: 6222739
    Abstract: A module for insertion into an expansion slot of a computer includes a primary board and a pair of auxiliary boards. The auxiliary boards are mounted in a spaced relationship on respective sides of the primary board to define air paths between the boards. The air paths allow air to circulate between the boards. The auxiliary boards each have a trace for electrically connecting the board to the primary board, and the primary board has a trace for connecting chips mounted thereon to an interface with the expansion slot. The traces of the auxiliary boards are substantially the same length. The trace of the primary boards is only slightly longer than the traces of the auxiliary boards.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: April 24, 2001
    Assignee: Viking Components
    Inventors: Jayesh R. Bhakta, Kavous Vakilian
  • Patent number: 6205032
    Abstract: A low temperature co-fired ceramic assembly (LTCC) with a constraining core to minimize shrinkage of outer ceramic layers during firing. The outer ceramic layers have high density circuit features. A ceramic core includes several ceramic layers. Several via holes are located in the first and second ceramic layers. Several low density circuit features are located on the ceramic layers that make up the core. Outer ceramic layers are placed top and bottom of the ceramic core. The outer ceramic layers have via holes and high density circuit features. The circuit features patterned on the ceramic layers include resistors, capacitors, circuit lines, vias, inductors, or bond pads. The ceramic core is fired first in a furnace. The outer layers are then laminated to the ceramic core and fired. The ceramic core controls the shrinkage rate of the outer ceramic layers during firing allowing higher density circuit features on the outer layers.
    Type: Grant
    Filed: March 16, 1999
    Date of Patent: March 20, 2001
    Assignee: CTS Corporation
    Inventor: Paul N. Shepherd
  • Patent number: 6188028
    Abstract: A multilayer structure includes a plurality of stacked circuit panels interconnected by posts extending through each panel. Circuit traces provided on one or both surfaces of each circuit panel interconnect the connectors in a predetermined pattern. The connectors are provided with a blind via which is in electrical contact with a pair of contact pads on either surface of the circuit panel. One of the contact pads has an opening to allow access of a connecting post to the interior of the blind via, the other contact pad having a protruding post. The circuit panels are interconnected by inserting the post of one circuit panel into the blind via of an adjacent circuit panel.
    Type: Grant
    Filed: June 9, 1998
    Date of Patent: February 13, 2001
    Assignee: Tessera, Inc.
    Inventors: Belgacem Haba, Masud Beroz
  • Patent number: 6188583
    Abstract: A contact bridge arrangement in a housing of an electronic assembly provides a simplified electrical interconnection of circuit boards while avoiding the need of electrical plugs, sockets and connector cables for connecting the circuit boards. The contact bridge includes an insulating block provided on the floor of the housing, and a plurality of conducting connectors embedded in the insulating block. First electrical contacts, such as contact pads with holes therein, are provided on the circuit boards, and engage the second electrical contacts in the form of contact pins provided by the free ends of the conducting connectors protruding from the insulating block. Assembling the arrangement simply requires pressing the circuit boards onto the contact pins of the contact bridge. The insulating block of the contact bridge may have a step configuration providing two offset flat support surfaces on which two circuit boards may be supported one above the other with a spacing therebetween.
    Type: Grant
    Filed: December 14, 1998
    Date of Patent: February 13, 2001
    Assignee: Temic Telefunken microelectronic GmbH
    Inventors: Guenter Fendt, Richard Baur, Michael Bischoff