Plural Patents (Class 361/784)
  • Patent number: 10534410
    Abstract: A card assembly includes a card that includes a first edge and an opposing second edge, where the first edge includes an edge connector; and device sockets mounted to the card and operatively coupled to the edge connector, where each of the device sockets defines an end of a respective device bay, where each of the device bays is disposed at an angle of approximately 25 degrees to approximately 75 degrees with respect to the edge connector.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: January 14, 2020
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Omar Ali Ali, Rodrigo Samper, Marc Richard Pamley, Alan Ladd Painter
  • Patent number: 10528039
    Abstract: In an approach to creating a press-fit force analysis, one or more computer processors retrieve a force press-fit data from a press-fit machine based on a press cycle. One or more computer processors calculate a deformation force of the press cycle based on the press-fit data and storing the deformation force. One or more computer processors create a predictive control model based on the deformation force and determine if a corrective action is required based on at least one of a raw material quality data, machine setting data, a completed lot quality data or the predictive control model. One or more computer processors determine if a corrective action is required and alert a downstream process to take the corrective action. One or more computer processors schedule a material kitting.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: January 7, 2020
    Assignee: International Business Machines Corporation
    Inventors: WeiFeng Zhang, Guo Wei, Lin Zhao, Zhipeng Wang, Qiuyi Yu, Zhongfeng Yang, YanLong Hou
  • Patent number: 10524380
    Abstract: Device (1) comprising a multitude of server modules (3). The server modules (3) are removable, are substantially plate shaped and extend parallel to each other. Each one of the server modules (3) is connected to cable passages (61a) of a first switch (4) by first data cables (6a) and to cable passages (61b) of a second switch (4) by second data cables (6b. The first switch (4) extends perpendicular to and adjacent an edge of the server modules (3) The cable passages (61a) of said first switch (4) extend in a first array and the cable passages (61b) of said second switch (4) extend in a second array. The second array of cable passages (61b) is mounted on a bracket (7) which is mounted on the second switch (4). The bracket (7) extends at a distance from the second switch (4) and from the first array.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: December 31, 2019
    Assignee: Aecorsis B.V.
    Inventor: Dirk Roelof Brink
  • Patent number: 10431548
    Abstract: A electronic device module includes a first substrate; electronic devices mounted on the first substrate; a second substrate coupled to a lower surface of the first substrate, the second substrate including a device accommodating portion; a sealing portion configured to seal an electronic device in the device accommodating portion; and an external connection terminal bonded to an electrode pad disposed in a lower surface of the second substrate. Bonding surfaces of the electrode pad and the external connection terminal are disposed on a same plane as a lower surface of the sealing portion.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: October 1, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Young Pyo Lee
  • Patent number: 10426050
    Abstract: The present disclosure provides a home security device assembly for mailing by direct mail package. The home security device assembly includes a first panel. The first panel is characterized by rectangular shape. The first panel includes a ledge extending from a first side of the first panel. The first panel includes a hollow circular tapered intrusion. The home security device assembly includes a second panel. The second panel is characterized by rectangular shape. Dimensions of rectangular shape of the second panel are identical to corresponding dimensions of rectangular shape of the first panel. The second panel includes a continuous ledge extending from three sides of the second panel. The home security device assembly includes an electrical components sub-assembly. The substantially cuboidal housing encapsulates a first section of the electrical component sub-assembly. The electrical component sub-assembly includes at least one sensor.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: September 24, 2019
    Assignee: Roo Inc.
    Inventors: Jingren Xu, David Sutton, Dhruv Garg, Maximus Yaney
  • Patent number: 10412822
    Abstract: An electrical contact-making arrangement for electrical power components, having a printed circuit board for mounting the electrical power components, and a line element which is fixed to the printed circuit board. The line element has a metal main body and the main body has an electrical connection contact in order to electrically contact-connect the line element to the printed circuit board or one of the electrical components. The main body has a fastening section in order to fix the line element to the printed circuit board. The line element is produced separately from the printed circuit board, and the electrical connection contact and the fastening section are formed separately from one another.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: September 10, 2019
    Assignee: Dr. Ing. h.c. F. Porsche Aktiengesellschaft
    Inventors: Stefan Götz, Pascal Scherz
  • Patent number: 10389266
    Abstract: A rectification module includes a transformer, a connecting unit and a rectification unit. The transformer includes a first lateral region, a second lateral region and at least one secondary winding assembly. The second lateral region is located beside the first lateral region. The secondary winding assembly includes plural outlet ends. The plural outlet ends are arranged near the first lateral region. The connecting unit is located at the first lateral region, and includes plural conducting plates. Each of the conducting plates includes at least one opening and at least one connecting structure. The conducting plates are partially or completely stacked on each other. The outlet ends are accommodated within the corresponding openings. The conducting plates are fixed on the first lateral region. The connecting structures face the second lateral region. The rectification unit includes a circuit board and plural rectifier components.
    Type: Grant
    Filed: June 30, 2018
    Date of Patent: August 20, 2019
    Assignee: DELTA ELECTRONICS (THAILAND) PUBLIC COMPANY LIMITED
    Inventors: Hao Lu, Tianding Hong, Bofeng Xu, Jie Ruan, Jinfa Zhang
  • Patent number: 10345920
    Abstract: A keyboard/keyboard enclosure is provided. The keyboard/keyboard enclosure includes front and rear shells removably connected together and made of a durable metal material such as aluminum. The enclosure defines a cavity and various features for positioning and/or restraining a PCB within the cavity. A keypad is positioned on the front surface of the front shell. End caps extend into the cavity from opposed ends of the front and rear shells, thereby selectively securing the front and rear shells together and/or further positioning and/or restraining the PCB within the cavity.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: July 9, 2019
    Inventor: Kevin R. Stoops
  • Patent number: 10297553
    Abstract: An electronic component package includes first and second wiring parts including insulating layers, conductive patterns formed in the insulating layers, and conductive vias penetrating through the insulating layers, to be connected to the conductive patterns, respectively; a frame disposed between the first and second wiring parts and having conductive connection parts electrically connecting one or more through-holes with the first and second wiring parts and an electronic component disposed to be surrounded by the through-hole, to thereby be connected to the first wiring part, wherein the conductive patterns formed to be adjacent to the electronic component among the conductive patterns of the first wiring part are embedded in the insulating layer of the first wiring part.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: May 21, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yong Ho Baek, Sang Kun Kim, Ye Jeong Kim, Jae Ean Lee, Jae Hoon Choi
  • Patent number: 10296481
    Abstract: A board adapter system includes a first adapter board. A secondary first processor coupling is located on the first adapter board, and the first adapter board passes signals between a primary first processor coupling on a first board and a first processor coupled to the secondary first processor coupling when the first adapter board engages the primary first processor coupling. A first/third processor communication bus extends between the secondary first processor coupling and the second board connector on the first adapter board, and passes signals between the first processor and a third processor that is coupled to the second board connector. A first/fourth processor communication bus extends between the secondary first processor coupling and the second board connector, and passes signals between the first processor and a fourth processor that is coupled to the second board connector on the first adapter board.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: May 21, 2019
    Assignee: Dell Products L.P.
    Inventors: Kevin Warren Mundt, Sandor Farkas, Bhyrav Mutnury
  • Patent number: 10276467
    Abstract: A fan-out semiconductor package includes: a fan-out semiconductor package may include: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole of the first interconnection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the inactive surface of the semiconductor chip; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip; and a reinforcing layer disposed on the encapsulant. The first interconnection member and the second interconnection member respectively include redistribution layers electrically connected to the connection pads of the semiconductor chip.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: April 30, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Eun Sil Kim, Doo Hwan Lee, Dae Jung Byun, Tae Ho Ko, Yeong A Kim
  • Patent number: 10201077
    Abstract: A suspension board and an inspection substrate are integrally supported by a support frame. In the suspension board, first and second insulating layers are laminated on a support substrate in this order. Part of a line is formed on the first insulating layer, and the remaining line is formed on the second insulating layer. A via connecting the part of the line to the remaining line is formed in the second insulating layer. In the inspection substrate, the first and second insulating layers are laminated on the support substrate in this order. A first inspection conductor layer is formed on the first insulating layer, and a second inspection conductor layer is formed on the second insulating layer. A via connecting the first inspection conductor layer to the second inspection conductor layer is formed in the second insulating layer.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: February 5, 2019
    Assignee: NITTO DENKO CORPORATION
    Inventors: Yuu Sugimoto, Hiroyuki Tanabe, Naohiro Terada
  • Patent number: 10064260
    Abstract: A high voltage valve arrangement includes a high voltage valve unit; an external electric shield structure arranged at least partially around the high voltage modular valve unit and a grounding system. The grounding system includes a grounding system configured to be remotely extended from a retracted position to an extended position, whereby the extendable grounding device establishes electric connection with the external shield structure when it is extended from the retracted position.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: August 28, 2018
    Assignee: ABB SCHWEIZ AG
    Inventors: Björn Sandin, Christer Sjöberg, Erik Doré, Johannes Gran Hirvioja
  • Patent number: 10061309
    Abstract: In an approach to creating a press-fit force analysis, one or more computer processors retrieve a force press-fit data from a press-fit machine based on a press cycle. One or more computer processors calculate a deformation force of the press cycle based on the press-fit data and storing the deformation force. One or more computer processors create a predictive control model based on the deformation force and determine if a corrective action is required based on at least one of a raw material quality data, machine setting data, a completed lot quality data or the predictive control model. One or more computer processors determine if a corrective action is required and alert a downstream process to take the corrective action. One or more computer processors schedule a material kitting.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: August 28, 2018
    Assignee: International Business Machines Corporation
    Inventors: WeiFeng Zhang, Guo Wei, Lin Zhao, Zhipeng Wang, Qiuyi Yu, Zhongfeng Yang, YanLong Hou
  • Patent number: 10006787
    Abstract: A high density sensor module includes a first substrate, a plurality of first sensors positioned on the first substrate, a plurality of first conductive rods positioned on the corresponding first sensors, a first package resin member covering the first sensors and one end of each of the first conductive rods, a second substrate positioned on the first package resin member, a plurality of second sensors positioned on the second substrate, and a second package resin member covering the second sensors and another end of each of the first conductive rods. The first conductive rods pass through the first package resin member and the second substrate. The high density sensor module has a two-layer structure to increase the number of the sensors such that the sensing density and resolution of the high-density sensor module are increased.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: June 26, 2018
    Assignee: ScienBiziP Consulting(Shenzhen)Co., Ltd.
    Inventors: Tsung-Ju Wu, Jen-Tsorng Chang, Hsin-Pei Hsieh, Yi-Cheng Lin
  • Patent number: 10004140
    Abstract: A three-dimensional circuit substrate according to the present disclosure includes a base body and a wiring pattern formed on an outer surface of the base body. Also, the outer surface of the base body includes a mounting surface which faces the substrate when the three-dimensional circuit substrate is mounted onto the substrate, and an installation surface which is different from the mounting surface and is a surface where an electronic component is installable. Further, a recess is formed on a side where the mounting surface is provided in the base body.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: June 19, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Mitsuru Kobayashi
  • Patent number: 9963627
    Abstract: Nanostructured phase change materials (PCMs) which are heterogeneous materials having at least two phases, at least one of the phases having at least one of its dimensions in the nanoscale, and comprising a first agent that undergoes an endothermic phase transition at a desired temperature and a second agent that assists in maintaining a nanostructure, are provided. There are also provided methods for manufacturing such PCMs, and applications thereof for providing thermoregulatory coatings and articles containing such coatings for use in a wide range of applications, such as cooling textiles, wipes, packaging, films, walls and building materials.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: May 8, 2018
    Inventors: Sumitra Rajagopalan, Giovanni Alexander Fabra Prieto
  • Patent number: 9887183
    Abstract: The present disclosure provides a power module with the integration of a control circuit at least, including: a power substrate; a power device mounted on the power substrate; and at least one control substrate which supports the control circuit, is electrically connected with the power substrate and disposed at an angle of inclination on a surface of the power substrate on which the power device is mounted; wherein the angle of inclination is greater than or equal to 45 degrees and smaller than or equal to 135 degrees. In the power module provided by the present disclosure, only the power substrate as well as the connections between the control substrate and the power substrate occupies the footprint area of the power module, and thus the horizontal footprint area of the power module is effectively reduced and thereby the power density of the power module is increased.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: February 6, 2018
    Assignee: Delta Electronics, Inc.
    Inventors: Tao Wang, Zhenqing Zhao, Zeng Li, Kai Lu
  • Patent number: 9706658
    Abstract: Disclosed herein is a portable terminal, including: a case; a first substrate disposed at one side of the case; a second substrate spaced from the first substrate to form a battery installing space; and a connection substrate electrically connecting between the first substrate and the second substrate and disposed in parallel with a side of the case.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: July 11, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Gi Suk Kim, Yang Je Lee, Hee Ju Park, Jong Hyung Kim, Chang Hyun Kim, Kyeong Seon Chae
  • Patent number: 9706025
    Abstract: There is provided a transportable electronic device in which a configuration related to a protective cover can be simplified. A transportable digital photo frame includes a cylindrical main unit that is divided into four areas along the circumferential direction, and a tubular cover that houses at least a part of the main unit to protect the circumferential surface of the main unit, the tubular cover having an opening formed in its circumferential surface for exposing one area to the outside. The tubular cover is rotatable relative to the main unit so that the areas protected by the tubular cover can be switched.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: July 11, 2017
    Assignee: TEAC Corporation
    Inventors: Tomohiro Ikeda, Eiji Ueda
  • Patent number: 9603288
    Abstract: A housing for electronic/electrical components includes an inner panel and an outer panel, a strip of metal plate, and a strip of shape memory material. The inner panel and the outer panel are disposed parallel to each other to define an internal space. The strip of metal plate extends from an inner surface of the outer panel. The strip of shape memory material extends from an inner surface of the inner panel and is attached to or detached from the metal plate on the outer panel while changing into an original straight shape or a bent shape according to a temperature variation. When the temperature increases beyond a first transition temperature, the shape memory material straightens to form a heat transfer path. When the temperature falls below a second transition temperature, the shape memory material bends and is separated from the metal plate to interrupt the heat transfer path.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: March 21, 2017
    Assignee: Hyundai Motor Company
    Inventors: Jin Woo Kwak, Kyong Hwa Song, Byung Sam Choi, Han Saem Lee
  • Patent number: 9549464
    Abstract: The described embodiments relate generally to electronic devices and to three dimensional modules for increasing useable space on a circuit board associated therewith. In some embodiments, the modules can have a cuboid geometry, and can include a number of surfaces having embedded circuit traces configured to interconnect electronic components arranged on various surfaces of the module. One of the surfaces of module can include at least one communication interface configured to interconnect the circuit traces on the module to associated circuit paths on a circuit board to which the module is coupled. In some embodiments the module can be operative as a standoff between the circuit board and another component of the electronic device.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: January 17, 2017
    Assignee: Apple Inc.
    Inventors: Shayan Malek, John B. Ardisana, II, Dhaval N. Shah
  • Patent number: 9516756
    Abstract: A circuit module system includes a first and a second circuit module, the first circuit module includes a first circuit board and a first connecting housing, the first connecting housing includes a first base connected to a side of the first circuit board and at least one first conductor. A top surface of the first base forms a fillister connecting to outside, the first conductor is clamped on the first base and electrically connects the first circuit board to outside. The second circuit module includes a second circuit board and a second connecting housing, the second connecting housing includes a second base connected to a side of the second circuit board and at least one second conductor. A protruding part protrudes from an outer side of the second base, the second conductor is clamped on the second base and electrically connects the second circuit board to outside.
    Type: Grant
    Filed: December 25, 2014
    Date of Patent: December 6, 2016
    Assignee: EZEK LAB COMPANY LIMITED
    Inventors: Sheng-Che Huang, Yu-Tse Liu, Wei-Han Hu, Chien-Hung Lee
  • Patent number: 9507236
    Abstract: An optical module includes: an optical modulator that performs an optical modulation process by using electrical signals input from a plurality of terminals; and a flexible substrate that has flexibility and electrically connects the optical modulator and a predetermined connector to each other via a plurality of wiring patterns formed on first and second surfaces thereof. The flexible substrate includes: a first pad including a first conductor pattern connected, on the first surface, to a wiring pattern, a second conductor pattern formed on the second surface, and a through hole that connects the first conductor pattern and the second conductor pattern to each other; and a second pad including a third conductor pattern connected, on the second surface, to a wiring pattern, a fourth conductor pattern formed on the first surface, and a through hole that connects the third conductor pattern and the fourth conductor pattern to each other.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: November 29, 2016
    Assignee: FUJITSU OPTICAL COMPONENTS LIMITED
    Inventor: Masaki Sugiyama
  • Patent number: 9480190
    Abstract: A flat panel display (FPD) including a display panel for displaying an image; a film substrate electrically connected to the display panel, the film substrate including driving circuits; a printed circuit board (PCB) electrically connected to the film substrate, the printed circuit board providing a signal for displaying the image; and a heat radiating unit attached to one surface of the film substrate, the heat radiating unit contacting at least one of the display panel and the PCB.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: October 25, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Hae-Kwan Seo
  • Patent number: 9462720
    Abstract: An aligning apparatus for mounting cards into a housing space is provided. The aligning apparatus includes a first line card having a mating portion and a card guide assembly coupled to the first line card. The mating portion is configured to mate with a backplane of the housing space. The card guide assembly varies from a first height at a first portion to a second height at a second portion. The varying heights correspond to an arrangement of components on a neighboring card. The first and second portions are configured to guide directional movement of the first line card in relation to one or more components on the neighboring card during insertion of the first line card into the housing space. In this regard, the first line card is guided past the one or more components on the neighboring card as the mating portion of the first line card is moved toward the backplane.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: October 4, 2016
    Assignee: Google Inc.
    Inventors: Jonathan David Beck, Kenneth Dale Shaul, Soheil Farshchian, Roy Michael Bannon
  • Patent number: 9348377
    Abstract: Various embodiments described herein include systems, methods and/or devices used to dissipate heat generated by electronic components in an electronic system (e.g., a memory system that includes closely spaced memory modules). In one aspect, an electronic assembly includes a first circuit board with one or more heat generating components coupled thereto. The electronic assembly further includes a second circuit board with one or more heat sensitive components coupled thereto. The electronic assembly also includes a thermal barrier interconnect. The thermal barrier interconnect electrically couples the first circuit board to the second circuit board. In some embodiments, thermal barrier interconnect is a flexible interconnect with a lower thermal conductivity than the first circuit board and the second circuit board. The thermal barrier interconnect forms a thermal barrier between the first and second circuit boards which protects the heat sensitive components from the heat generating components.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: May 24, 2016
    Assignee: SANDISK ENTERPRISE IP LLC
    Inventors: David Dean, Robert W. Ellis
  • Patent number: 9351403
    Abstract: Disclosed herein is a portable terminal, including: a case; a first substrate disposed at one side of the case; a second substrate spaced from the first substrate to form a battery installing space; and a connection substrate electrically connecting between the first substrate and the second substrate and disposed in parallel with a side of the case.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: May 24, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Gi Suk Kim, Yang Je Lee, Hee Ju Park, Jong Hyung Kim, Chang Hyun Kim, Kyeong Seon Chae
  • Patent number: 9345126
    Abstract: A substrate of a semiconductor package comprises a conductor pattern which is formed in a surface layer, and is electrically connected to one terminal out of a power terminal and a ground terminal of a semiconductor element. The substrate also comprises in the surface layer a conductor pattern which is arranged while being separated from the conductor pattern, and a conductor pattern which is formed so as to have a wiring width thinner than that of the conductor pattern and connects the conductor pattern with the conductor pattern. The substrate also comprises a conductor pattern which is formed in an inner layer, faces the conductor pattern through a dielectric and is electrically connected to the other terminal out of the power terminal and the ground terminal of the semiconductor element.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: May 17, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Sou Hoshi, Nobuaki Yamashita, Yusuke Murai
  • Patent number: 9265182
    Abstract: A flat panel display (FPD) including a display panel for displaying an image; a film substrate electrically connected to the display panel, the film substrate including driving circuits; a printed circuit board (PCB) electrically connected to the film substrate, the printed circuit board providing a signal for displaying the image; and a heat radiating unit attached to one surface of the film substrate, the heat radiating unit contacting at least one of the display panel and the PCB.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: February 16, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Hae-Kwan Seo
  • Patent number: 9256026
    Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each other on the same side of a substrate in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. In addition, an input/output (I/O) integrated circuit is coupled to the optical integrated circuit between the substrate and the optical integrated circuit. This I/O integrated circuit includes high-speed I/O circuits and energy-efficient driver and receiver circuits and communicates with optical devices on the optical integrated circuit. By integrating the optical integrated circuit, the integrated circuit and the I/O integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: February 9, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Hiren D. Thacker, Ashok V. Krishnamoorthy, Robert David Hopkins, II, Jon Lexau, Ronald Ho, John E. Cunningham
  • Patent number: 9252077
    Abstract: Via are described for radio frequency antenna connections related to a package. In one example, a package has a package substrate, a die attached to the package substrate, and a conductive via from the package substrate to an external surface of the package to make a radio frequency connection between the antenna and the package substrate.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: February 2, 2016
    Assignee: Intel Corporation
    Inventors: Wolfgang Molzer, Edmund Goetz, Reinhard Mahnkopf, Bernd Memmler
  • Patent number: 9182784
    Abstract: A double-sided emission type display device includes a first substrate having a first connection and a first protruded portion extending in a first direction; a first display unit at the first substrate; a second substrate coupled to the first substrate, comprising a second connection and a second protruded portion extending in the first direction; a second display unit at the second substrate; and a first flexible printed circuit board (FPCB) including a first connecting portion coupled to the first connection and a second connecting portion coupled to the second connection.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: November 10, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyo-Sang Yang, Jin-Oh Park, Dong-Wan Choi
  • Patent number: 9042117
    Abstract: A semiconductor device effectively suppress the problem of mutual interaction occurring between an inductor element and wires positioned above the inductor element formed over the same chip. A semiconductor device includes a semiconductor substrate and a multi-wiring layer formed overlying that semiconductor substrate, and in which the multi-wiring layer includes: the inductor element and three successive wires and a fourth wire formed above the inductor element; and two shielded conductors at a fixed voltage potential and covering the inductor element as seen from a flat view, and formed between the inductor element and three successive wires and a fourth wire formed above the inductor element.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: May 26, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Kenichiro Hijioka, Akira Tanabe, Yoshihiro Hayashi
  • Patent number: 9042115
    Abstract: An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: May 26, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Heung-Kyu Kwon, Min-Ok Na, Sung-Woo Park, Ji-Hyun Park, Su-Min Park
  • Patent number: 9030838
    Abstract: Provided is a package substrate and a semiconductor package. The package substrate includes a main body having an upper surface and a lower surface opposite to the upper surface, a plurality of external terminals attached to the lower surface, and a plurality of grooves formed in regions of the lower surface to which the plurality of external terminals is not attached. The semiconductor package includes a package substrate, a semiconductor chip mounted on the upper surface of the semiconductor substrate, and a board providing a region mounted with the package substrate and being mounted with a plurality of mounting elements which are vertically aligned with the plurality of grooves and are inserted into the plurality of grooves.
    Type: Grant
    Filed: January 3, 2014
    Date of Patent: May 12, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Se-Ho You, Heeseok Lee, Chiyoung Lee, Yun-Hee Lee
  • Patent number: 9029713
    Abstract: A printed wiring board including a rigid multilayer board, a first substrate having multiple conductors, and a second substrate having multiple conductors electrically connected to the conductors of the first substrate. The conductors of the second substrate have an existing density which is set higher than an existing density of the conductors of the first substrate, and the first substrate and/or the second substrate is embedded in the rigid multilayer board.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: May 12, 2015
    Assignee: Ibiden Co., Ltd.
    Inventor: Michimasa Takahashi
  • Patent number: 9013891
    Abstract: An electronics package includes one or more insulating layers and an electrically conductive transmission line. The electrically conductive transmission line includes a signal trace disposed substantially parallel to the one or more insulating layers. The electrically conductive transmission line further includes one or more signal vias electrically coupled to the signal trace. The one or more signal vias are configured to pass through at least a portion of the one or more insulating layers. The electronics package further includes one or more electrically conductive ground planes substantially parallel to the one or more insulating layers. The ground planes include one or more signal via ground cuts. The one or more signal via ground cuts provide clearance between the one or more signal vias and the one or more ground planes.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: April 21, 2015
    Assignee: Finisar Corporation
    Inventors: Yunpeng Song, Yongsheng Liu, Hongyu Deng
  • Patent number: 9003648
    Abstract: The invention provides methods to mass laminate and interconnect high density interconnect circuit layers fabricated through parallel processing. Invention methods employ an inside-out interconnection strategy that eliminates plating of vias and provides defect-free outer circuit layers. Conductive paste and via layers are also key features of the invention.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: April 14, 2015
    Assignee: Ormet Circuits, Inc.
    Inventor: Ken Holcomb
  • Patent number: 9007784
    Abstract: A device and/or method mount and affix a microchannel plate in a micro system. The device and/or method has at least one conductive spring structure, formed to accept a microchannel plate, for aligning, fixing and making electrical contact with the microchannel plate. The device and/or method also has at least one stop against which the microchannel plate is pushed or pressed when affixed by at least one conductive spring structure, wherein the at least one conductive spring structure and the at least one stop are being applied on a non-conductive substrate.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: April 14, 2015
    Assignees: Bayer Intellectual Property GmbH, Krohne Messtechnik GmbH
    Inventors: Jan-Peter Hauschild, Eric Wapelhorst, Jörg Müller
  • Publication number: 20150085460
    Abstract: The present disclosure provides an article having (a) a substrate having opposing first and second surfaces; and (b) a conductor micropattern disposed on the first surface of the substrate. The conductor micropattern has a plurality of traces defining a plurality of open area cells. The conductor micropattern has an open area fraction greater than 80% and a uniform distribution of trace orientation. Each of the traces is non-linear and has a trace width from 0.5 to 10 micrometer. The articles are useful in devices such as displays, in particular, touch screen displays useful for mobile hand held devices, tablets and computers. They also find use in antennas and for EMI shields.
    Type: Application
    Filed: December 4, 2014
    Publication date: March 26, 2015
    Inventor: Matthew H. Frey
  • Patent number: 8982578
    Abstract: A system configured to protect a load within a vehicle includes a plug subassembly and a sensor connector subassembly. The sensor connector subassembly is selectively connectable to the plug subassembly. A circuit board is secured within the sensor connector subassembly. The circuit board includes at least one positive temperature coefficient (PTC) device electrically connected between an activation switch and a load. The circuit board includes at least one circuit to protect against over-voltage or over-current to the load, detect a fault condition of the load, and determine whether the plug subassembly is connected to the sensor connector subassembly.
    Type: Grant
    Filed: October 10, 2011
    Date of Patent: March 17, 2015
    Assignee: Tyco Electronics Corporation
    Inventors: Lyle Stanley Bryan, John Steven Cowan, Thomas Michael Banas, Ralph Melvin Cooper
  • Patent number: 8983399
    Abstract: Provided is an in-millimeter-wave dielectric transmission device. The in-millimeter-wave dielectric transmission device includes a semiconductor chip provided on one interposer substrate and capable of in-millimeter-wave dielectric transmission, an antenna structure connected to the semiconductor chip, two semiconductor packages including a molded resin configured to cover the semiconductor chip and the antenna structure, and a dielectric transmission path provided between the two semiconductor packages to transmit a millimeter wave signal. The semiconductor packages are mounted such that the antenna structures thereof are arranged with the dielectric transmission path interposed therebetween.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: March 17, 2015
    Assignee: Sony Corporation
    Inventors: Hirofumi Kawamura, Yasuhiro Okada
  • Publication number: 20150070866
    Abstract: An embodiment of the present invention discloses a PCB board plug mechanism configured to implement hot plug of a PCB board, and including an output end that moves along a second direction when the input end moves. The second direction is at an angle with the first direction. The connector for connecting the to-be-plugged PCB board is disposed at the output end. In a process in which the output end moves along the second direction, the PCB board can be driven to perform a corresponding hot plug action.
    Type: Application
    Filed: November 14, 2014
    Publication date: March 12, 2015
    Inventors: Shuang Li, Lei Bai, Yan Su
  • Publication number: 20150062854
    Abstract: There are provided an electronic component module in which electronic components are mounted on both surfaces of a substrate to increase integration density, and a method of manufacturing the same, the electronic component module including a first substrate; a plurality of electronic components mounted on both surfaces of the first substrate; a second substrate bonded to a lower surface of the first substrate; and a molded part formed on the lower surface of the first substrate and having the second substrate embedded therein.
    Type: Application
    Filed: May 8, 2014
    Publication date: March 5, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Yong CHOI, II Hyeong LEE, Jae Cheon DOH
  • Patent number: 8969736
    Abstract: A cover insulating layer is formed on a base insulating layer. One of write wiring traces includes first to third lines, and the other write wiring trace includes fourth to sixth lines. The one and other write wiring traces constitute a signal line pair, the second and fifth lines are arranged on an upper surface of the cover insulating layer, and the third and sixth lines are arranged on an upper surface of the base insulating layer. At least parts of the second and fifth lines are respectively opposed to the sixth and third lines with the cover insulating layer sandwiched therebetween. The second and third lines are electrically connected to the first line, and the fifth and sixth lines are electrically connected to the fourth line. The fourth line is electrically connected to at least one of the fifth and sixth lines through a jumper wiring on a lower surface of the base insulating layer.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: March 3, 2015
    Assignee: Nitto Denko Corporation
    Inventor: Daisuke Yamauchi
  • Patent number: 8971056
    Abstract: A hermetically sealed HF front end (e.g. a transmission/reception module) in a multilayer structure that includes electronic components is provided. The multilayer structure contains a plurality of substrates stacked one above the other and carrying the components. Grooves are formed in the substrates and sealing elements are provided between the substrates, which sealing elements engage in the grooves, and the substrates are soldered together.
    Type: Grant
    Filed: September 18, 2010
    Date of Patent: March 3, 2015
    Assignee: EADS Deutschland GmbH
    Inventors: Heinz-Peter Feldle, Bernhardt Schoenlinner, Ulrich Prechtel, Joerg Sander
  • Publication number: 20150055313
    Abstract: A method for manufacturing a combined wiring board includes preparing wiring boards, preparing a metal frame having opening portions formed to accommodate the wiring boards, respectively, positioning the wiring boards in the opening portions in the metal frame, and forming crimped portions in the metal frame by plastic deformation such that sidewalls of the metal frame in the opening portions bond sidewalls of each of the wiring boards. The crimped portions are formed such that the crimped portions in the metal frame have amounts of the plastic deformation which are set different for positions of the crimped portions in the metal frame.
    Type: Application
    Filed: August 21, 2014
    Publication date: February 26, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Teruyuki ISHIHARA, Michimasa Takahashi
  • Patent number: 8958215
    Abstract: The present invention has an objective to provide a circuit board for a peripheral circuit which can transmit outside heat which generates from a high exothermic element, such as a power semiconductor element, while attaining reduction in size and weight, reduction in surge, and reduction in a loss, in high-capacity modules including power modules, such as an inverter. [Solution Means] In a high-capacity module, by laminating a peripheral circuit using a ceramic circuit board with electrode(s) constituted by thick conductor and embedded therein on a highly exothermic element, overheating of the module is prevented by effective heat dissipation via the circuit board while attaining reduction in size and weight, reduction in surge, and reduction in a loss in the module.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: February 17, 2015
    Assignee: NGK Insulators, Ltd.
    Inventors: Takami Hirai, Shinsuke Yano, Tsutomu Nanataki, Hirofumi Yamaguchi
  • Patent number: 8958214
    Abstract: Mechanisms for interconnecting and distributing signals and power between PCBs are provided. A first PCB having land grid arrays (LGAs) and a first wiring layer designed for interconnect components on the first PCB, and a second wiring layer for connecting the components to a second PCB, are provided. The second PCB has opposed parallel first and second surfaces, the first surface having a LGA. A wiring layer designed to interconnect components on the second PCB, and a layer for interconnecting the components on the second PCB with the components on the first PCB, are provided. A first interposer couples to a LGA of a first surface of the first PCB and connects a component to the first PCB. A second interposer is sandwiched between and couples to a LGA of a second surface of the first PCB and to the LGA of the first surface of the second PCB.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: February 17, 2015
    Assignee: International Business Machines Corporation
    Inventors: John L. Colbert, Arvind K. Sinha, Roger D. Weekly