Abstract: The present invention provides an SIP package structure. The SIP package structure comprises a first module, a second module and a shielding assembly, wherein the first module and the second module are horizontally distributed or vertically stacked; electromagnetic sensitive frequencies of the first module and the second module are different; the shielding assembly comprises a first shielding structure covering the first module and a second shielding structure covering the second module; and at least part of the first shielding structure and/or at least part of the second shielding structure are/is disposed between the first module and the second module.

Abstract: An electronic component package includes a substrate having an upper surface. Traces on the upper surface of the substrate extend in a longitudinal direction. The traces have a first latitudinal width in a latitudinal direction, the latitudinal direction being perpendicular to the longitudinal direction. Rectangular copper pillars are attached to bond pads of an electronic component, the copper pillars having a longitudinal length and a latitudinal second width. The latitudinal second width of the copper pillars is equal to and aligned with the first latitudinal width of the traces. Further, the longitudinal length of the copper pillars is parallel with the longitudinal direction of the trace and equal to the length of the bond pads. The copper pillars are mounted to the traces with solder joints.

Abstract: Circuit board includes conductive plate, core dielectric layer, metallization layer, first build-up stack, second build-up stack. Conductive plate has channels extending from top surface to bottom surface. Core dielectric layer extends on covering top surface and side surfaces of conductive plate. Metallization layer extends on core dielectric layer and within channels of conductive plate. Core dielectric layer insulates metallization layer from conductive plate. First build-up stack is disposed on top surface of conductive plate and includes conductive layers alternately stacked with dielectric layers. Conductive layers electrically connect to metallization layer. Second build-up stack is disposed on bottom surface of conductive plate. Second build-up stack includes bottommost dielectric layer and bottommost conductive layer. Bottommost dielectric layer covers bottom surface of conductive plate.

Abstract: An interposer card and a virtualization offloading card are provided for installation in a third-party server to integrate the third-party server into a cloud service provider network. The interposer card includes a baseboard management controller that interfaces with a management console of the cloud service provider network. This allows the third-party server to be converted into a server controlled by the cloud service provider network. Additionally, the baseboard management controller of the interposer card acts as a firewall between the third-party server and a management control network of the cloud service provider network. The interposer card and the virtualization offloading card are installed in a chassis of the third-party server via an expansion slot without requiring modification of the hardware or firmware of the third-party server.

Abstract: A cable includes a wiring assembly with a knuckle and wires bundled together. The cable also includes a connector assembly with a connector having connections for the wires, where the connections are arranged along a longitudinal axis. In some embodiments, the connector assembly captures an end of the wiring assembly, and the knuckle of the wiring assembly is pivotally connected to the connector assembly. In some embodiments, the cable includes circuitry configured to authenticate the cable to a device connected to the cable by the connector and/or to authenticate the device connected to the cable. A control system includes control elements and/or subsystems coupled with a backplane adjacent to one another and cables configured to connect to the control elements and/or subsystems. Wiring assemblies of the cables can articulate to be parallel to each respective connector. Further, each cable can authenticate the cables and/or the control elements or subsystems.

Abstract: A modular network element includes one or more lineboxes which are a hybrid between a rack mounted module and a line module which is inserted in a chassis; one or more linebox carriers which are rack mountable and configured to selectively receive the one or more lineboxes and provide power connectors and data connectors thereto; and a core chassis including one or more switch modules, one or more controller modules, and a set of connectors located at the rear for cabling to the power connectors and the data connectors on the one or more linebox carriers.

Abstract: A first and second substrate, and electrically conductive first and second connection parts are provided in a method for establishing an electrically conductive connection between two substrates. The first connection part is mounted on the first substrate by a first releasable connection and the second connection part is respectively mounted on the second substrate by a releasable connection. An electrically conductive connection assembly containing the first connection part and the second connection part is established by either a cohesive connection between a connection portion of the first connection part and a connection portion of the second connection part or an electrically conductive crossmember provided and a cohesive connection of a first length portion of the crossmember to the connection portion of the first connection part and a second cohesive connection of a second length portion of the crossmember to the connection portion of the second connection part being established.

Abstract: A printed circuit board according to an embodiment includes: a first insulating portion having a cavity; a second insulating portion disposed on the first insulating portion; a third insulating portion disposed under the first insulating portion; and an electronic device disposed in the cavity, wherein a number of layers of the second insulating portion is different from a number of layers of the third insulating portion, and has an asymmetric structure with respect to the first insulating portion in which the electronic device is disposed.

Abstract: A printed circuit board (PCB) includes an array of signal pads on a first surface of the PCB, a power contact pad on the first surface, and a ground contact pad on a second surface of the PCB. Each signal pad of the array of signal pads is associated with a signal contact of a central processing unit (CPU). The power contact pad provides power for the CPU apart from the array of signal pads. The ground contact pad provides a ground for the CPU apart from the array of signal pads.

Abstract: A connection module is disposed in a main circuit board and includes a card edge connector, a hard circuit board and two connectors. The card edge connector is fixedly disposed on the main circuit board. The hard circuit board has a board body and a connecting tongue for correspondingly plugging with the card edge connector. The board body is configured with a disconnecting notch, and the board body is separated by the disconnecting notch into two floating plates arranged side by side at an interval and floatable using the disconnecting notch. The connectors are respectively fixed to the floating plates. Thus, without needing an additional guide frame, the connectors are enabled to float in any desired direction, thereby achieving effects of reducing an overall height and satisfying current thinning requirements.

Abstract: A module includes a first wiring board, a first integrated circuit component mounted on the first wiring board, a second wiring board overlapping with the first wiring board, a second integrated circuit component mounted on the second wiring board, and a connection member disposed between the first wiring board and the second wiring board and configured to electrically connect the first wiring board and the second wiring board, wherein the second integrated circuit component overlaps with the first wiring board and supplies power to the first integrated circuit component via the connection member.

Abstract: An electrical connector assembly includes: a bracket; and at least one transmission assembly mounted to the bracket and including an internal printed circuit board (PCB), a board-mount connector connected to a first row of conductive pads disposed at a bottom end portion of the PCB, and a plug-in connector connected to a second row of conductive pads disposed at a front end portion of the PCB, wherein the PCB has a third row of conductive pads disposed at a rear end portion thereof.

Abstract: A method of forming a semiconductor device includes providing a substrate that comprises a metal region, forming an encapsulant body of electrically insulating material on an upper surface of the metal region, forming an opening in the encapsulant body, and inserting a press-fit connector into the opening, wherein after inserting the press-fit connector into the opening, the press-fit connector is securely retained to the substrate and an interfacing end of the press-fit connector is electrically accessible.

Abstract: A semiconductor package includes a package substrate, a semiconductor chip and a plurality of bonding wires. The package substrate includes a connection pad. The semiconductor chip is disposed over the package substrate and includes a chip pad, a bonding pad, and a redistribution layer. The bonding pad is closer to a periphery of the semiconductor chip than the chip pad. The redistribution layer is connected between the chip pad and the bonding pad. The bonding wires are connected in parallel between the connection pad and the bonding pad.

Abstract: A millimeter wave antenna module package structure includes a first group of circuit structure, a second group of circuit structure, and a plurality of joints. The first group of circuit structure includes at least one first circuit layer and a plurality of first conductive connectors, and the at least one first circuit layer includes an antenna pattern. The second group of circuit structure includes a plurality of second circuit layers and a plurality of second conductive connectors. The joints are disposed between the first group of circuit structure and the second group of circuit structure. The joints are connected to the first conductive connectors and the second conductive connectors, such that the first group of circuit structure is electrically connected to the second group of circuit structure to form a multi-layer redistribution structure. A manufacturing method of the millimeter wave antenna module package structure is also provided.

Abstract: A semiconductor assembly includes an interposer that includes an insulating substrate, a plurality of upper contact pads on an upper surface of the substrate, and a plurality of lower contact pads on a lower surface of the substrate, a semiconductor package that includes a semiconductor die embedded within a package body and a plurality of package terminals exposed from the package body, a first passive electrical element that includes first and second terminals, a first electrical connection between the first terminal of the first passive electrical element and a first one of the lower contact pads via the interposer, a second electrical connection between the second terminal of the first passive electrical element and a first one of the package terminals, and a third electrical connection between a second one of the package terminals and a second one of the lower contact pads via the interposer.

Abstract: A semiconductor device has a first substrate and a second substrate. An opening is formed through the second substrate. A first semiconductor component and second semiconductor component are disposed between the first substrate and second substrate. The second substrate is electrically coupled to the first substrate through the first semiconductor component. A first terminal of the first semiconductor component is electrically coupled to the first substrate. A second terminal of the first semiconductor component is electrically coupled to the second substrate. The second semiconductor component extends into the opening. An encapsulant is deposited over the first substrate and second substrate.

Abstract: A portable electronic device includes a housing defining an internal volume and a circuit board assembly within the internal volume. The circuit board assembly includes a first circuit board, a wall structure soldered to the first circuit board, and a second circuit board soldered to the wall structure and supported above the first circuit board by the wall structure. The second circuit board defines an exterior top surface of the circuit board assembly. A processor is coupled to the first circuit board and positioned within an internal volume defined between the first circuit board and the second circuit board and at least partially surrounded by the wall structure. A memory module is coupled to the exterior top surface of the circuit board assembly.

Abstract: An electronic device according to various embodiments may include: a display, a first circuit board disposed under the display, a first component and a second component disposed on one surface of the first circuit board, the first and second components each having different heights, a first interposer surrounding at least one side surface of the first component and disposed in a first region of the first circuit board, the first interposer part having a first height, a second interposer part surrounding at least one side surface of the second component and disposed in a second region of the first circuit board, the second interposer part having a second height different from the first height, a first second circuit board, at least a portion of which is spaced apart from the first region of the first circuit board, the first second circuit board including a first first portion bonded to the first interposer part, and a second second circuit board, at least a portion of which is spaced apart from the second reg

Abstract: A power module includes a heat sink, a power unit formed at least partially inside the heat sink and/or on the heat sink and comprising a semiconductor element and a substrate, and a device designed to enclose the power unit and to center a control unit with respect to the power unit. The device includes a frame designed to surround the substrate at least partially, a first projecting section designed to engage in a recess or an opening of the heat sink, and a second projecting section designed to engage in a recess or an opening or a notch of the control unit and to have an outline which when viewed in cross-section is at least essentially star-shaped with at least a first leg, a second leg and a third leg.

Abstract: According to an embodiment of the disclosure, an electronic device comprises a first printed circuit board including a first electrical terminal exposed on one face of a first area, a second electrical terminal exposed on the one face of a second area and insulated from the first electrical terminal, and a first ground terminal exposed on the one face of a third area formed between the first area and the second area, the third area having a width narrower than a width of the first area or the width of the second area; and a second printed circuit board including a third electrical terminal exposed on one face of a fourth area, a fourth electrical terminal exposed on the one face of a fifth area and electrically connected to the third electrical terminal, and a second ground terminal exposed on the one face of a sixth area located between the fourth area and the fifth area, wherein the second printed circuit board is disposed on the first printed circuit board to overlap the third area, the first electrical te

Abstract: A module component includes a substrate having a first principal surface, a semiconductor substrate disposed on the first principal surface of the substrate, multiple terminals, and a resin layer. The terminals include multiple reference-potential terminals, which are electrically connected to the reference potential, and multiple signal terminals, which are disposed adjacent to at least one of the reference-potential terminals in the direction along an end portion of the substrate and which are supplied with a signal. In a plan view in the direction perpendicular to the first principal surface of the substrate, in at least one of the reference-potential terminals, the support portion is disposed between an end surface of the connection portion and the end portion of the substrate, and, in at least one of the signal terminals, the end surface of the connection portion is disposed between the support portion and the end portion of the substrate.

Abstract: A substrate structure includes a first printed circuit board having a first side and a second side opposing each other, and a plurality of passive components connected to the first side of the first printed circuit board. The plurality of passive components includes a first group, including a plurality of first passive components disposed adjacent to each other, and a second group, including a plurality of second passive components disposed adjacent to each other. A smallest distance between the first and second groups is greater than at least one of a smallest distance between adjacent first passive components of the plurality of first passive components and a smallest distance between adjacent second passive components of the plurality of second passive components. An electronic device includes a first printed circuit board disposed on a mainboard and having, on opposite sides thereof, a semiconductor chip and a plurality of passive components.

Abstract: An electrical connector includes a connector housing having a mating end at a front of the connector housing configured to be mating with a mating electrical connector. The connector housing includes a contact module chamber. An electrical connector includes a stack of contact modules received in the contact module chamber. Each contact module includes a module body holding a plurality of contacts. The contacts have mating ends at the mating end of the connector housing for mating with the mating electrical connector; and an electrical connector includes a contact module biasing members between the contact modules and the connector housing to forward bias the contact modules in the contact module chamber, wherein the contact module biasing members are compressible to allow the contact modules to move independent from each other relative to the connector housing in the contact module chamber when mating with the mating electrical connector.

Abstract: A computer includes a processor, a PCIe-compatible interface bus that includes a root that is connected to the processor, and a routing complex that is connected to the root and is controlled by the processor. The computer also includes a first interface slot that is connectable to the root by the switches, a second interface slot that is connectable to the root by the switches, and an extended interface slot that is connectable to the root by the switches. The switches are configured based on properties of a first peripheral device to define a first switching configuration when the first peripheral device is connected only to the first interface slot and to define a second switching configuration when the first peripheral device is connected to both of the first interface slot and the extended interface slot.

Abstract: In a method, a wafer is bonded to a first carrier. The wafer includes a semiconductor substrate, and a first plurality of through-vias extending into the semiconductor substrate. The method further includes bonding a plurality of chips over the wafer, with gaps located between the plurality of chips, performing a gap-filling process to form gap-filling regions in the gaps, bonding a second carrier onto the plurality of chips and the gap-filling regions, de-bonding the first carrier from the wafer, and forming electrical connectors electrically connecting to conductive features in the wafer. The electrical connectors are electrically connected to the plurality of chips through the first plurality of through-vias.

Abstract: A sensor device includes a mounting member having fixation surfaces inside, and at least one electronic component directly or indirectly fixed to the fixation surfaces of the mounting member, and the mounting member constitutes a part of a casing for housing the electronic component. Further, the fixation surfaces are perpendicular to each other.

Abstract: The invention provides a fingerprint recognition module comprising a first dielectric layer, a processing unit, a plurality of first sensing series and a plurality of second sensing series. A first side and a second side of the first dielectric layer are provided with first metal contacts and second metal contacts respectively. The processing unit, disposed on the first side, has first conductive pads for electrically connecting the first metal contacts, coupled with the second metal contacts. The first sensing series, coupled with the first traces, are arranged between the first dielectric layer and a second dielectric layer. The second sensing series, coupled with the second traces, are arranged between the second dielectric layer and a third dielectric layer. The first trace is coupled with a third trace through a first conductive pillar, and the second traces and the third traces are coupled with the second metal contacts.

Abstract: A method for manufacturing a multilayer coil includes preparing a first substrate by forming a first conductor pattern on a first insulating base material layer, preparing a second substrate by forming a second conductor pattern on a second insulating base material layer, and joining a surface of the first substrate on which the first conductor pattern is formed and a surface of the second substrate on which the second conductor pattern is formed together with only a joining layer made of a thermoplastic resin interposed therebetween. Amounts of deformation of the first and second insulating base material layers are less than that of the joining layer at a fusion temperature. The first and second conductor patterns are each a coil pattern having a coil axis that extends in a lamination direction in which the first substrate and the second substrate are laminated together.

Abstract: An electronic system for a vehicle includes: a first module including: a first circuit board having a predetermined form factor; a first module on the first circuit board and including a plurality of pins; a first electrical connector disposed on a first surface of the first circuit board and including a plurality of pins; and a plurality of electrical conductors connecting the pins of the first electrical connector with the pins of the first module, respectively; and a second module including: a second circuit board having the predetermined form factor; a second module on the second circuit board and including a plurality of pins; a second electrical connector disposed on a first surface of the second circuit board and including a plurality of pins, the second electrical connector coupled to the first electrical connector.

Abstract: An electronic device includes: a substrate having an upper surface and a lower surface; a first electronic component mounted on the upper surface of the substrate; a second electronic component mounted on the lower surface of the substrate; and a mold portion covering the second electronic component without covering the first electronic component. The first electronic component is bonded to the upper surface on the first relative surface via a conductive first bonding member. The second electronic component is bonded to the lower surface via a second bonding member on a second relative surface relative to the lower surface.

Abstract: A semiconductor package including a first stack; a plurality of TSVs passing through the first stack; a second stack on the first stack and including a second surface facing a first surface of the first stack; a first pad on the first stack and in contact with the TSVs; a second pad on the second stack; a bump connecting the first and second pads; a first redundancy pad on the first surface of the first stack, spaced apart from the first pad, and not in contact with the TSVs; a second redundancy pad on the second surface of the second stack and spaced apart from the second pad; and a redundancy bump connecting the first redundancy pad and the second redundancy pad, wherein the first pad and first redundancy pad are electrically connected to each other, and the second pad and second redundancy pad are electrically connected to each other.

Abstract: Circuit board includes conductive plate, core dielectric layer, metallization layer, first build-up stack, second build-up stack. Conductive plate has channels extending from top surface to bottom surface. Core dielectric layer extends on covering top surface and side surfaces of conductive plate. Metallization layer extends on core dielectric layer and within channels of conductive plate. Core dielectric layer insulates metallization layer from conductive plate. First build-up stack is disposed on top surface of conductive plate and includes conductive layers alternately stacked with dielectric layers. Conductive layers electrically connect to metallization layer. Second build-up stack is disposed on bottom surface of conductive plate. Second build-up stack includes bottommost dielectric layer and bottommost conductive layer. Bottommost dielectric layer covers bottom surface of conductive plate.

Abstract: A system and method of implementing an adaptable graphics board form factor design comprising an adaptable graphics board including a reconfigurable zone subset of components including a reconfigurable I/O module having display data ports disposed along a first edge of the adaptable graphics board, the adaptable graphics board including a set of core components including the graphics processor and graphics memory, wherein the reconfigurable zone subset of components are orientable relative to the set of core components to interface with an information handling system chassis of a first model specification selected from a plurality of model specifications for information handling systems in which the adaptable graphics board may be used, and the adaptable graphics board including a connector pad interface area for receiving an array of compressible electrical spring contacts of a compression jumper pad for a flexible compression jumper connector, wherein the connector pad interface area is disposed along a sec

Abstract: A transducer assembly can include a base. The transducer assembly can include a stress isolation standoff located on the base. The transducer assembly can include a MEMS die disposed on the stress isolation standoff. The transducer assembly can include a die attach adhesive disposed between the MEMS die and the base. The die attach adhesive can bond the MEMS die to the base. The stress isolation standoff can be embedded in the die attach adhesive between the base and the MEMS die.

Abstract: A multilayer substrate includes a stacked body including a first main surface, and a conductor pattern (including a mounting electrode provided on the first main surface, and a first auxiliary pattern provided on the first main surface). The stacked body includes a plurality of insulating base material layers made of a resin as a main material and stacked on one another. The first auxiliary pattern is located adjacent to or in a vicinity of the mounting electrode. The mounting electrode, in a plan view of the first main surface (when viewed in the Z-axis direction), is interposed between a different conductor pattern (the mounting electrode) and the first auxiliary pattern.

Abstract: Provided is an electronic device.

Abstract: A display panel includes a plastic substrate and a first inner lead bonding (ILB) electrode on the plastic substrate. The first ILB electrode includes a first bonding segment, a second bonding segment, and a first connection segment. The first bonding segment is extended in a first direction oblique to a vertical direction of the display panel. The first connection segment is configured to provide an electrical connection between the first bonding segment and the second bonding segment. The first bonding segment is configured to be bonded to a first display driver integrated circuit (DDIC) chip, and the second bonding segment is configured to be bonded to a second DDIC chip configured differently from the first DDIC chip.

Abstract: A printed circuit board configured to be coupled to an automotive Ethernet connection includes a signal line layer on which a signal path is disposed, a ground layer disposed above the signal line layer, the ground layer including a digital ground and a chassis ground electrically insulated from the digital ground, a first capacitor and a second capacitor. The first capacitor and the second capacitor each couple the digital ground and the chassis ground. The first capacitor is positioned at a first distance from the signal path, and the second capacitor is symmetrically positioned, relative to the first capacitor, at a second distance from the signal path, where the second distance is substantially equal to the first distance.

Abstract: A semiconductor device having a three-dimensional (3D) structure is disclosed. The semiconductor device includes a first chip configured to include a logic circuit, and a second chip stacked on the first chip and configured to include a memory cell array. At least one transfer circuit for connecting a row line of the memory cell array to a global row line is distributed to each of the first chip and the second chip.

Abstract: A mezzanine power pin includes a dual layer pin body extending between a pin top having an upper power interface and a pin bottom having a lower power interface. The dual layer pin body has a base metal core and an outer metal oxide layer combined with the base metal core defining an outermost layer of the dual layer pin body. The mezzanine power pin includes an upper fastener coupled to the pin top to mechanically and electrically connect an upper component to the upper power interface. The mezzanine power pin includes a lower fastener coupled to the pin bottom to mechanically and electrically connect a lower component to the lower power interface. The base metal core is configured to electrically connect the upper component and the lower component through the base metal core.

Abstract: A wiring circuit board includes a support metal layer having thermal conductivity of 5 W/m·K or more, an insulating layer disposed on at least one side in a thickness direction of the support metal layer, a wiring layer disposed on a front surface of the insulating layer, a protective metal film disposed on the entire surface of the support metal layer between the support metal layer and the insulating layer, and a protective thin film disposed on an exposed surface exposed from the protective metal film in the support metal layer.

Abstract: An embedded component package structure including a circuit substrate, an embedded component and a stress compensation layer is provided. The circuit substrate includes a core layer and an asymmetric circuit structure, and the core layer has a first thickness. The embedded component is disposed in the core layer. The stress compensation layer is disposed on one side of the core layer, and the stress compensation layer has a second thickness between 4 ?m and 351 ?m.

Abstract: Embodiments of the invention include LED lighting systems and methods. For example, in some embodiments, an LED lighting system is included. The LED lighting system can include a flexible layered circuit structure that can include a top thermally conductive layer, a middle electrically insulating layer, a bottom thermally conductive layer, and a plurality of light emitting diodes mounted on the top layer. The LED lighting system can further include a housing substrate and a mounting structure. The mounting structure can be configured to suspend the layered circuit structure above the housing substrate with an air gap disposed in between the bottom thermally conductive layer of the flexible layered circuit structure and the housing substrate. The distance between the layered circuit structure and the support layer can be at least about 0.5 mm. Other embodiments are also included herein.

Abstract: In semiconductor packaging technologies, a secondary packaging method of a TSV chip and a secondary package of a TSV chip are provided. The TSV chip has a forward surface and a counter surface that are opposite to each other, a BGA solder ball is disposed on the counter surface, and the secondary packaging method includes: placing at least one TSV chip on a base on which a stress relief film layer is laid; cladding the TSV chip via a softened molding compound; removing the base after the molding compound is cured, to obtain a secondary package of the TSV chip; and processing a surface of the secondary package to expose the BGA solder ball.

Abstract: A semiconductor device includes a semiconductor substrate including at least one semiconductor structure, an interlayer insulating layer disposed on the semiconductor substrate, at least one first via structure penetrating the semiconductor substrate and the interlayer insulating layer, including a first region having a first width at an upper surface of the interlayer insulating layer and a second region extending from the first region and having a second width at a lower surface of the semiconductor substrate, wherein a side surface of the first region and a side surface of the second region have different profiles at a boundary between the first region and the second region, and at least one second via structure penetrating the semiconductor substrate and the interlayer insulating layer and having a third width greater than the first width at an upper surface of the interlayer insulating layer.

Abstract: A voltage regulator module includes a first circuit board, a switching circuit and a second circuit board. The switching circuit is disposed on a first surface of the first circuit board. A first contact pad is disposed on a second surface of the first circuit board. The switching circuit is connected with the contact pad through a conductive hole of the first circuit board. A first surface of the second circuit board is in contact with the first surface of the first circuit board. The first surface of the second circuit board includes a second contact pad. The second contact pad is fixed on the corresponding first contact pad. A second surface of the second circuit board includes a conductive pad. The conductive pad is connected with the corresponding second contact pad through a conductive hole of the second circuit board. The conductive pad is connected with a system board.

Abstract: Systems and methods are directed to a wireless headphone comprising a wireless headphone cap comprising an antenna, and a printed circuit board configured to be directly mechanically connected to the wireless headphone cap at a fixed distance from the wireless headphone cap, and electrically connected to the antenna.

Abstract: A transmission line has a signal electrode formed on one surface of a flexible printed circuit, and a ground electrode formed on the other surface of the flexible printed circuit. A connection terminal has signal terminals formed on both the surfaces of the flexible printed circuit and electrically connected to each other through a via hole, and ground terminals formed on both the surfaces of the flexible printed circuit and electrically connected to each other through the via hole. The signal terminal on the surface, on which the ground electrode is formed, is formed such that at least a width in an end portion on the transmission line side is narrower than a width of a part of the signal terminal on the surface, on which the signal electrode is formed, to be at the same position when the flexible printed circuit is seen in a plan view.

Abstract: An antenna module includes a first connection member including at least one first wiring layer and at least one first insulating layer; an antenna package disposed on a first surface of the first connection member, and including a plurality of antenna members and a plurality of feed vias; an integrated circuit (IC) disposed on a second surface of the first connection member and electrically connected to the corresponding wire of at least one first wiring layer; and a second connection member including at least one second wiring layer electrically connected to the IC and at least one second insulating layer, and disposed between the first connection member and the IC, wherein the second connection member has a third surface facing the first connection member and having an area smaller than that of the second surface, and a fourth surface facing the IC.