Interconnection Details Patents (Class 361/803)
  • Publication number: 20140153210
    Abstract: A microelectronic assembly includes a first substrate having a surface and a first conductive element and a second substrate having a surface and a second conductive element. The assembly further includes an electrically conductive alloy mass joined to the first and second conductive elements. First and second materials of the alloy mass each have a melting point lower than a melting point of the alloy. A concentration of the first material varies in concentration from a relatively higher amount at a location disposed toward the first conductive element to a relatively lower amount toward the second conductive element, and a concentration of the second material varies in concentration from a relatively higher amount at a location disposed toward the second conductive element to a relatively lower amount toward the first conductive element.
    Type: Application
    Filed: December 3, 2012
    Publication date: June 5, 2014
    Applicant: INVENSAS CORPORATION
    Inventor: Cyprian Emeka Uzoh
  • Patent number: 8741411
    Abstract: A method for manufacturing a multi-piece board having a frame section and a multiple piece sections connected to the frame section includes forming a frame section from a manufacturing panel for the frame section, sorting out multiple acceptable piece sections by inspecting quality of piece sections, forming notch portions in the frame section and the acceptable piece sections such that the notch portions allow the acceptable piece sections to be arranged with respect to the frame section, provisionally fixing the piece sections and the frame section in respective positions, injecting an adhesive agent into cavities formed by the notch portions when the frame section and the piece sections are provisionally fixed to each other, and joining the acceptable piece sections with the frame section by curing the adhesive agent injected into the cavities.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: June 3, 2014
    Assignee: Ibiden Co., Ltd.
    Inventor: Takahiro Yada
  • Patent number: 8742576
    Abstract: An MCM includes a two-dimensional array of facing chips, including island chips and bridge chips that communicate with each other using overlapping connectors. In order to maintain the relative vertical spacing of these connectors, compressible structures are in cavities in a substrate, which house the bridge chips, provide a compressive force on back surfaces of the bridge chips. These compressible structures include a compliant material with shape and volume compression. In this way, the MCM may ensure that facing surfaces of the island chips and the bridge chips, as well as connectors on these surfaces, are approximately coplanar without bending the bridge chips.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: June 3, 2014
    Assignee: Oracle International Corporation
    Inventors: Hiren D. Thacker, Hyung Suk Yang, Ivan Shubin, John E. Cunningham
  • Patent number: 8743552
    Abstract: A motherboard assembly includes a motherboard and an expansion apparatus. The motherboard includes a first expansion slot. An edge connector is set on a bottom side of the expansion apparatus to be detachably engaged in the first expansion slot. A number of SATA interfaces and a number of second expansion slots are arranged on the expansion apparatus, and are connected to signal pins and power pins of the edge connector.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: June 3, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Bo Tian, Kang Wu
  • Patent number: 8742886
    Abstract: A multi unit controller has a plurality of base units each of which includes a control unit connector, a base unit connector through which the base units juxtaposed to each other are connected to each other, and a plurality of control units connected to the base units respectively through the respective control unit connector, wherein the base units juxtaposed vertically.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: June 3, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Yuta Sugimoto, Atsushi Nishioka, Eiji Kobayashi, Akihiro Ohashi, Katsumi Yoshida, Satoshi Nakamura, Fumihiko Nemoto
  • Patent number: 8743554
    Abstract: Embedding a power modification component such as a capacitance inside of an adaptor board located to extend over and beyond the vias of the main circuit board so that a portion of the interposer board containing the embedded capacitance is located beyond where the vias or blinds are located. This permits that via to conduct through the opening. In this way, the capacitance and the resistance will have a closer contact point to the electrical component. A resistance can also be embedded in an opening in the adaptor board and be vertically aligned within the opening to make contact with a pad on top of the adaptor board and a pad at the bottom of the adaptor board so that electricity conducts through the embedded component.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: June 3, 2014
    Assignee: R & D Circuits, Inc.
    Inventor: James V. Russell
  • Publication number: 20140140031
    Abstract: A wireless module, in which a first board (11) and a second board (12) are laminated, includes connecting members (18) which are connected to at least one of the first board (11) and the second board (12), and form a gap allowing mounting of mounting components including a semiconductor device (14) between the first board (11) and the second board (12). The connecting members (18) are arranged such that a plurality of connecting members (18A, 18B) are arranged uniformly in a planar direction of the boards of the wireless module.
    Type: Application
    Filed: December 6, 2012
    Publication date: May 22, 2014
    Applicant: Panasonic Corporation
    Inventors: Suguru Fujita, Ryosuke Shiozaki, Toshiaki Nakamura, Jun'ichi Kimura
  • Publication number: 20140139508
    Abstract: A display device according to an embodiment of the invention includes a first PCB including first PCB lines to transmit powers and second PCB lines to transmit an image data, gate control signals and data control signals; a second PCB including third PCB lines to transmit the powers and fourth PCB lines to transmit the image data, the gate control signals and the data control signals; a first COF including first COF lines connected to the first PCB lines and second COF lines connected to the second PCB lines; a second COF including third COF lines connected to the third PCB lines and fourth COF lines connected to the fourth PCB lines; and a display panel including first LOGs connected to the first COF lines and the third COF lines and second LOGs connected to the second COF lines and the fourth COF lines.
    Type: Application
    Filed: July 15, 2013
    Publication date: May 22, 2014
    Inventor: Sun-Kyu PARK
  • Patent number: 8729709
    Abstract: This invention provides a multi-pin semiconductor device as a low-cost flip-chip BGA. In the flip-chip BGA, a plurality of signal bonding electrodes in a peripheral area of the upper surface of a multilayer wiring substrate are separated into inner and outer ones and a plurality of signal through holes coupled to a plurality of signal wirings drawn inside are located between a plurality of rows of signal bonding electrodes and a central region where a plurality of bonding electrodes for core power supply are located so that the chip pad pitch can be decreased and the cost of the BGA can be reduced without an increase in the number of layers in the multilayer wiring substrate.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: May 20, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Shinji Baba, Toshihiro Iwasaki, Masaki Watanabe
  • Patent number: 8717772
    Abstract: A printed circuit board includes a core substrate having an opening portion, an electronic component provided in the opening portion of the core substrate and including a dielectric body, a first electrode formed over the dielectric body, and a second electrode formed over the dielectric body such that the dielectric body is interposed between the first electrode and the second electrode, and a resin filling a gap between the core substrate and the electronic component in the opening portion of the core substrate. The resin filling the gap includes a filler.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: May 6, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 8717775
    Abstract: A fingerprint sensor package includes a flat surface having a dielectric protective coating protecting a sensing element of a fingerprint sensor and an electrically conductive bezel that discharges electrostatic discharge (ESD). Both the protective coating and the bezel can be colored to have desired colors. Accordingly, the flat surface can be colored as desired enhancing the attractiveness for consumer applications. Further, light emitting diodes are integrated into the fingerprint sensor package providing a visual feedback to the user that the user's fingerprint has been successfully sensed. Further, the fingerprint sensor package is formed using a high volume low cost assembly technique.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: May 6, 2014
    Assignee: Amkor Technology, Inc.
    Inventors: David Bolognia, Ted Adlam, Mike Kelly
  • Patent number: 8711575
    Abstract: A printed circuit board unit usable with a computer device includes a main board on which a first component and a second component are mounted on an upper surface, and a routing unit mounted on at least one of the upper surface and a lower surface of the main board and including a sub-wire forming at least part of a wire to transmit a data between the first component and the second component.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: April 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Do-kyun Lee
  • Patent number: 8711108
    Abstract: A substantially transparent touch sensor panel having co-planar single-layer touch sensors and traces fabricated on a single side of a substrate for detecting single or multi-touch events. The touch sensor elements can be fabricated in columns and rows, with each sensor element in a row adjacent to a sensor element in a column. By using a board as the dielectric to connect traces from multiple sensor elements in each row, rather than using a dielectric layer on the substrate upon which the sensor elements and traces are formed, the sensor elements and traces on the substrate can be formed by simply patterning a single layer of conductive material on the substrate, which can simplify the manufacturing process of the substrate from a complexity and cost perspective.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: April 29, 2014
    Assignee: Apple Inc.
    Inventors: Martin Paul Grunthaner, Steven Porter Hotelling
  • Publication number: 20140111957
    Abstract: An objective of the present invention is to provide a three-dimensional backplane to solve the problem that the number of layers of a printed circuit board for producing a backplane increases linearly along with the number of connectors. The three-dimensional backplane includes: a first group of connectors, a second group of connectors, a first group of printed circuit boards, and a second group of printed circuit boards. Any printed circuit board in the first group of printed circuit boards is connected to any printed circuit board in the second group of printed circuit boards. Any connector in the second group of connectors is connected to any connector in the first group of connectors. With the foregoing solution, the number of wires on each printed circuit board is reduced, so that the number of layers of a printed circuit board for producing a backplane is reduced.
    Type: Application
    Filed: October 17, 2013
    Publication date: April 24, 2014
    Applicant: Huawei Technologies Co., Ltd.
    Inventors: Songhai CHEN, Shiping TANG
  • Patent number: 8696942
    Abstract: The adhesive composition of the invention comprises a radical generator, a thermoplastic resin and a urethane(meth)acrylate having two or more radical-polymerizing groups in the molecule and a weight-average molecular weight of 3000-30,000.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: April 15, 2014
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Shigeki Katogi, Hiroyuki Izawa, Houko Sutou, Masami Yusa, Tohru Fujinawa
  • Publication number: 20140098509
    Abstract: An electronic device includes a first substrate, a second substrate that is disposed to be superposed over the first substrate, a connector that connects the first substrate to the second substrate, an inter-substrate frame that is disposed between the first substrate and the second substrate and includes a wall portion, and a wall member that is disposed on at least one of the first substrate and the second substrate to be opposed to the wall portion and locks the wall portion of the inter-substrate frame in response to displacement that is generated between the first substrate and the second substrate.
    Type: Application
    Filed: October 8, 2013
    Publication date: April 10, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Atsushi TOMOE, HIROSHI KUBO, Hiroyuki TAKITA
  • Publication number: 20140085856
    Abstract: A terminal portion configured to obtain electrical connection with a printed circuit board includes a first signal pad that is formed in a first conductor layer and is electrically separated from a ground layer, a pair of first ground pads that is formed in the first conductor layer to sandwich the first signal pad and is connected to the ground layer, a second signal pad that is formed in a second conductor layer and is connected to a signal line, a pair of second ground pads that is formed in the second conductor layer to sandwich the second signal pad and is electrically separated from the signal line, a third signal pad formed in a third conductor layer, and a pair of third ground pads formed in the third conductor layer to sandwich the third signal pad. The second signal pad is wider than the third signal pad.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 27, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Mizuki SHIRAO, Nobuo Ohata, Nobuyuki Yasui, Hiroshi Aruga
  • Publication number: 20140085855
    Abstract: An electronic device includes a first circuit board, a second circuit board, and a third circuit board. A plurality of loads are mounted on the first circuit board, a plurality of direct current (DC) to DC converters are mounted on the second circuit board, and an alternating current (AC) to DC converter is mounted on the third circuit board. The first circuit board is electrically connected to the second circuit board, the DC to DC converters are configured to convert an input DC voltage from the third circuit board to a plurality of output DC voltages correspondingly, and the output DC voltages power the loads correspondingly. The electronic device separates the voltage-conversion processes from other working components, thus the electronic device is protected from electromagnetic interference.
    Type: Application
    Filed: August 8, 2013
    Publication date: March 27, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: WEI-CHING CHIEN, MENG-FENG KUO
  • Patent number: 8674220
    Abstract: A housing for an electronic control device includes at least two housing parts, at least one housing base, a housing lid and an electronic connection between components disposed inside the housing and components disposed outside the housing. The connection is fixed to the base of the housing. The electronic connection is either constructed as a single-component flexible printed circuit board or as at least one partial flexible printed circuit board including at least one uniform open area of a copper conductor track outside an area covered by the housing lid. The width of the uniform region is oriented to a predefined contacting type of peripheral components and is longer than necessary for the contacting type. The invention therefore provides for a variable adaptation of generic electronics housings, thereby not necessarily requiring a novel structure of the housing with corresponding expensive individual packaging.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: March 18, 2014
    Assignee: Continental Automotive GmbH
    Inventors: Josef Loibl, Karl Smirra
  • Patent number: 8675372
    Abstract: In at least one embodiment of the disclosure, an electrooptic device includes first and second mounting terminals arranged on a terminal portion to be aligned in a direction intersecting with a side of the electrooptic substrate. A first flexible substrate is connected to the first mounting terminal. A second flexible substrate is connected to the second mounting terminal and arranged to be superimposed on the first flexible substrate. A resin member covers the first flexible substrate, the second flexible substrate and the electrooptic substrate.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: March 18, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Munehide Saimen
  • Patent number: 8675371
    Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: March 18, 2014
    Assignee: Advanced Processor Architectures, LLC
    Inventors: Louis Edmund Chall, John Bradley Serson, Philip Arnold Roberts, Cecil Eugene Hutchins
  • Patent number: 8675458
    Abstract: In connecting flexible printed circuits, a structure with improved connection strength of the connection portion is provided. In this structure in which a first flexible printed circuit and a second flexible printed circuit are connected to each other, a through-hole is provided on the second flexible printed circuit, and a resin member passes through the through-hole and is adhered to the wires of a connection surface of the first flexible printed circuit and the side of the second flexible printed circuit opposite to the connection surface, whereby impact is absorbed by the elasticity of the resin; as for the first flexible printed circuit, adhesion is performed on a metal in a wiring layer with high adhesion strength, while as for the second flexible printed circuit, adhesion is performed on the back side upon which no peeling stress is exerted, improving joining strength to prevent peeling.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: March 18, 2014
    Assignee: Hitachi Media Electronics Co., Ltd.
    Inventors: Rika Nomura, Hiroaki Furuichi, Eiji Tsubono, Shoji Matsumoto
  • Patent number: 8670245
    Abstract: A system and method is provided for transmitting a signal to a plurality of slave devices (e.g., memory devices, etc.) via a communication circuit having a plurality of segments that are substantially equal in length and/or impedance. Specifically, according to one embodiment of the invention, an electronic system includes a processor, a plurality of memory devices, and a communication circuit (i.e., a bus) having a central node and a plurality of segments. Specifically, the plurality of segments are used to connect the plurality of devices (e.g., the processor, the plurality of memory devices) to the central node. For example, the processor is connected to the central node via a primary segment, the first memory device (M0) is connected to the central node via a first segment, etc. In one embodiment of the invention, the plurality of segments are substantially equal in length. In other words, the central node is substantially electrically-equidistant from each memory device.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: March 11, 2014
    Assignee: QUALCOMM Incorporated
    Inventor: Quang Nguyen
  • Patent number: 8665606
    Abstract: An electronic device includes an integrated circuit, a connector, and a circuit board. The integrated circuit includes a first signal processing circuit, a second signal processing circuit, and an interface multiplexer having a first input port electrically connected to the first signal processing circuit, a second input port electrically connected to the second signal processing circuit, and an output port arranged to be electrically connected to the first input port or the second input port. The circuit board carries the integrated circuit and has a plurality of connector placement sites, including at least a first connector placement site each dedicated to the first signal processing circuit and at least a second connector placement site each dedicated to the second signal processing circuit. The connector placement sites and the output port of the interface multiplexer are electrically connected in series. The connector is installed on one of the connector placement sites.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: March 4, 2014
    Assignee: Mediatek Inc.
    Inventors: Huai-Yuan Feng, Ching-Gu Pan, Yan-Bin Luo, Hua Wu, Shang-Yi Lin
  • Publication number: 20140055973
    Abstract: [Summary] [Subject] The present invention has an objective to provide a circuit board for a peripheral circuit which can transmit outside heat which generates from a high exothermic element, such as a power semiconductor element, while attaining reduction in size and weight, reduction in serge, and reduction in a loss, in high-capacity modules including power modules, such as an inverter. [Solution Means] In a high-capacity module, by laminating a peripheral circuit using a ceramic circuit board with electrode(s) constituted by thick conductor and embedded therein on a highly exothermic element, overheating of the module is prevented by effective heat dissipation via the circuit board while attaining reduction in size and weight, reduction in serge, and reduction in a loss in the module.
    Type: Application
    Filed: November 4, 2013
    Publication date: February 27, 2014
    Applicant: NGK Insulators, Ltd.
    Inventors: Takami HIRAI, Shinsuke YANO, Tsutomu NANATAKI, Hirofumi YAMAGUCHI
  • Publication number: 20140055972
    Abstract: A flexible printed circuit board assembly includes a circuit board main body and a connection terminal provided at one side of the circuit board main body. The connection terminal has a shape in which a width of a portion farther from the circuit board main body is greater than a width of a portion closer to the circuit board main body.
    Type: Application
    Filed: March 5, 2013
    Publication date: February 27, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sang-Yun Lee, Oh-Seob Kwon
  • Patent number: 8653645
    Abstract: An object of the present invention is to sufficiently supply power to three-dimensionally stacked LSI chips and to dispose common through vias in chips of different types. Also, another object is to propose a new test method for power-supply through silicon vias.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: February 18, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Masanao Yamaoka, Kenichi Osada
  • Patent number: 8649186
    Abstract: A package substrate includes a main body having an upper surface and a lower surface opposite to the upper surface, a plurality of external terminals attached to the lower surface, and a plurality of grooves formed in regions of the lower surface to which the plurality of external terminals is not attached. The semiconductor package includes a package substrate, a semiconductor chip mounted on the upper surface of the semiconductor substrate, and a board providing a region mounted with the package substrate and being mounted with a plurality of mounting elements which are vertically aligned with the plurality of grooves and are inserted into the plurality of grooves.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: February 11, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Se-Ho You, Heeseok Lee, Chiyoung Lee, Yun-Hee Lee
  • Publication number: 20140029230
    Abstract: Discussed is a flat display panel. The flat display panel includes a display area to display an image with a plurality of panel electrodes, and a non-display area. A plurality of link lines connected to the panel electrodes are provided in the non-display area. The display area and the non-display area are provided in a base substrate. A plurality of link pads, electrically connected to the link lines and a plurality of link terminals provided in a driving element, are provided in a bonding part adhered to the driving element in the non-display area. Two resistance pads are respectively connected to two link terminals which are electrically connected to each other through the driving element. At least two pads are respectively connected to the two resistance pads.
    Type: Application
    Filed: July 24, 2013
    Publication date: January 30, 2014
    Applicant: LG DISPLAY CO., LTD.
    Inventors: ChungWan OH, HoWon SON
  • Publication number: 20140029229
    Abstract: A liquid ejection head includes two or more substrates disposed side by side, each having energy generating elements and primary terminals electrically connected to the respective energy generating elements, and an electrical wiring member having primary flying leads electrically connected to the respective primary terminals by means of gang bonding. Each of the substrates has an auxiliary terminal located adjacent to the primary terminals and the auxiliary terminals of the two or more substrates are disposed adjacent to each other. The electrical wiring member has an auxiliary flying lead connected to the auxiliary terminals of the substrates by means of a gang bonding system.
    Type: Application
    Filed: July 9, 2013
    Publication date: January 30, 2014
    Inventor: Takayuki Ono
  • Publication number: 20140028161
    Abstract: A motor control unit includes two circuit boards accommodated in a board housing, and a connection holder placed on an outer face of the board housing. The connection holder includes external connection terminals and connection pins. Each one of the circuit boards is provided with multiple through-holes for receiving the connection pins, each of which is formed of an external connection pin and an internal connection pin. The connection holder and the circuit boards are placed such that the connection pins penetrate the through-holes of the circuit boards respectively.
    Type: Application
    Filed: July 23, 2012
    Publication date: January 30, 2014
    Applicant: PANASONIC CORPORATION
    Inventor: Yutaka Kamogi
  • Patent number: 8638568
    Abstract: A mounted circuit card is disclosed that has a housing with a circuit card assembly (“CCA”) attached to the housing with adhesive along at least an edge portion of the CCA, where the assembly includes at least one jagged edge portion of the CCA in contact with the adhesive, or at least one channeled portion of the housing in contact with the adhesive, or a combination of both a jagged edge portion of the CCA and channeled portion of the housing in contact with the adhesive.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: January 28, 2014
    Assignee: Steering Solutions IP Holding Corporation
    Inventors: Wayne Thomas, Ryan Yaklin, Timothy J. Wandrey, Jason M. Easlick, Jeremy Breault, Peter C. Younglao
  • Patent number: 8638569
    Abstract: A first connector has a plurality of terminals arranged in the direction along a first pattern, and the first pattern is connected to a terminal disposed far from an image sensor in the plurality of terminals of the first connector. A second connector has a plurality of terminals arranged in the direction along a second pattern, and the second pattern is connected to a terminal disposed closer to an image processing circuit in the plurality of terminals of the second connector.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: January 28, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shigeaki Sotsu
  • Patent number: 8634201
    Abstract: An assembly carrying a radioisotope power source for attaching to a printed circuit board.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: January 21, 2014
    Assignee: City Labs, Inc.
    Inventors: Peter Cabauy, Bret J. Elkind, Denset Serralta, Jesse Grant
  • Patent number: 8634204
    Abstract: A memory unit for a computing device is described. The memory device can include a number of memory chips, such as flash nand chips, linked together via a flexible circuit connector. During installation of the memory device, portions of the flexible circuit connector can be bent or folded in different locations to allow an orientation of the memory chips to be changed relative to one another. In one embodiment, a memory device with a number of chips can be provided in a flat configuration and then can be folded to allow the chips to be installed in a stacked configuration. In another embodiment, the flexible circuit connector can be grounded to other conductive components to allow the flexible circuit connector to be used as part of a faraday cage surrounding the memory chips.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: January 21, 2014
    Assignee: Apple Inc.
    Inventors: Fletcher R. Rothkopf, Phillip M. Hobson, Adam Mittleman, Anna-Katrina Shedletsky
  • Patent number: 8625303
    Abstract: A serial advanced technology attachment dual-in-line memory module (SATA DIMM) assembly includes a SATA DIMM module with a first circuit board, an expansion slot, and an expansion card with a second circuit board. A first edge connector is arranged on a bottom edge of the first circuit board and includes first power pins connected to a control chip and first storage chips, and first ground pins. A second edge connector is arranged on a top edge of the second circuit board and includes second power pins connected to a power unit, and second ground pins. A third edge connector is arranged on a bottom edge of the second circuit board and includes third power pins connected to the power unit, third ground pins, and signal pins connected to a display unit.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: January 7, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Xiao-Gang Yin, Guo-Yi Chen
  • Patent number: 8619432
    Abstract: Some embodiments of the inventive subject matter are directed to a first circuit board configured to include an electronic component. The electronic component includes a plurality of leads. The first circuit board includes first wires configured to connect to a first portion of the plurality of leads. The second circuit board is affixed to the first circuit board. The second circuit board includes second wires. The second circuit board is smaller in size than the first circuit board. A plurality of electrical connectors extend through a thickness of the first circuit board and are configured to connect a second portion of the plurality of leads to the second wires.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: December 31, 2013
    Assignee: International Business Machines Corporation
    Inventors: Douglas A. Baska, Daniel M. Dreps, Rohan U. Mandrekar, Roger D. Weekly
  • Publication number: 20130343025
    Abstract: Electrical connectors, electrical modules, and systems are provided. In one aspect, an electrical connector includes a housing defining a side surface, an electrical conductor supported by the housing and including an engagement portion proximate the side surface of the housing. The engagement portion is adapted to engage another electrical conductor of another electrical connector. The connector also includes a magnet supported by the housing proximate the side surface of the housing, a projection extending from the side surface of the housing, and a receptacle defined in the side surface of the housing. In other aspects, an electrical module includes at least one of these electrical connectors. In further aspects, a system includes a plurality of these modules and the modules are selectively couplable together.
    Type: Application
    Filed: August 26, 2013
    Publication date: December 26, 2013
    Applicant: littleBits Electronics Inc.
    Inventor: Aya Bdeir
  • Patent number: 8615616
    Abstract: The present disclosure describes techniques for scalable embedded memory programming. In some aspects data is received at a first communication interface from a host device, at least a portion of the data is stored to a memory device supported by a printed circuit board, and the data is transmitted to a target device via a second communication interface.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: December 24, 2013
    Assignee: Marvell World Trade Ltd.
    Inventors: William B. Weiser, Thomas G. Warner
  • Patent number: 8611097
    Abstract: A serial advanced technology attachment dual-in-line memory module (SATA DIMM) assembly includes a SATA DIMM module with a first circuit board, an expansion slot, and an expansion card with a second circuit board. A first edge connector is arranged on a bottom edge of the first circuit board and includes first power pins connected to a control chip and first storage chips, and first ground pins. A second edge connector connected to the expansion slot is arranged on a top edge of the first circuit board and includes second power pins connected to the first power pins, second ground pins, and four first signal pins connected to the control chip. A third edge connector engaged in the expansion slot is arranged on a bottom edge of the second circuit board and includes third power pins and four second signal pins connected to the second storage chips, and third ground pins.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: December 17, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Xiao-Gang Yin, Wei-Min He, Guo-Yi Chen
  • Publication number: 20130329393
    Abstract: A printed circuit board includes a motherboard and a daughterboard. The motherboard includes at least one first signal pad. The daughterboard includes at least one second signal pad electronically connected to the at least one first signal pad for electronically connecting the daughterboard to the motherboard.
    Type: Application
    Filed: February 28, 2013
    Publication date: December 12, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (WUHAN) CO., LTD.
    Inventors: HSIN-KUAN WU, HOU-YUAN CHOU
  • Patent number: 8605446
    Abstract: According to one embodiment, an electronic apparatus includes a housing, a board in the housing, a pad on the board, and a component. The pad includes a first portion and a second portion. The second portion includes a protrusion toward the first portion. The component includes a first electrode connected to the first portion and a second electrode connected to the second portion.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: December 10, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kiyokazu Ishizaki, Yasunari Ukita
  • Publication number: 20130322042
    Abstract: Disclosed is a touch panel. The touch panel includes a substrate including a view area and a dead area; a bridge electrode on the view area of the substrate; a print part on the dead area of the substrate; a wire electrode formed on the printed part to make direct contact with the print part; and an insulation pattern on the bridge electrode and the wire electrode.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 5, 2013
    Inventors: Byung Soo KIM, Jong Il KIM, Ji Won JO, Hyuk Jin HONG
  • Publication number: 20130322043
    Abstract: An explosion-proof electronic device includes: a first circuit board provided with a first connector on one surface thereof; and a second circuit board provided with a second connector on a surface facing the one surface of the first circuit board, the second connector being fit to the first connector. A packing is attached to a position on the second connector which is away from the surface of the second circuit board, surrounds the outer circumference of the second connector, and extends toward the first circuit board to form a closed space including an interface between the first and second connectors. The space between the first and second circuit boards is filled with a filler with the first and second connectors fit to each other.
    Type: Application
    Filed: June 3, 2013
    Publication date: December 5, 2013
    Inventor: Takuya TANAKA
  • Patent number: 8599571
    Abstract: Memory card (1) includes at least semiconductor chip (3), circuit board (2) with semiconductor chip (3) mounted on main surface (21), having at least rigidity reducing portion (23) formed in main surface (21) or in a linear region of surface (22) opposite to the main surface, and cover portion (71) for covering semiconductor chip (3) on main surface (21) of circuit board (2), wherein circuit board (2) has a plurality of convex regions (201) which flex in a convex shape toward main surface (21) due to rigidity reducing portion (23).
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: December 3, 2013
    Assignee: Panasonic Corporation
    Inventors: Hidenobu Nishikawa, Daido Komyoji, Atsunobu Iwamoto, Hiroyuki Yamada, Shuichi Takeda, Shigeru Kondou
  • Patent number: 8599541
    Abstract: An electronic apparatus includes a casing, a cap, and an access module. An accommodation space of the casing is used for accommodating a data storage apparatus, and the access module is disposed inside the accommodation space. The casing is formed with an opening at a position corresponding to an access unit, so that an external card is inserted in or pulled out through the opening. A terminal of the access module is pivoted on the casing. The cap is used for covering and thus sealing the accommodation space, so that the access module is arranged between the data storage apparatus and the cap. Thereby, the space is saved, and the access module and the data storage apparatus can be detached or assembled conveniently.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: December 3, 2013
    Assignee: Inventec Corporation
    Inventor: Chien-Hua Lai
  • Patent number: 8593820
    Abstract: According to one embodiment, the flexible printed wiring board of the one embodiment has a base, corrugated portion, and block. The base has therein a conductor that electrically connects a first end and a second end. The corrugated portion is formed in a middle part of the base and has a ridge and legs. The ridge is roundly bent. The legs continuously hang from opposite sides of the ridge. The block is located off the ridge within a gap where the legs face each other and is mounted on one of the legs.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: November 26, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Daigo Suzuki, Gen Fukaya
  • Patent number: 8593822
    Abstract: The present invention improves the operability when opening and closing a cover. Since the cover is curved such that the front face is in a concave form, when opening a memory slot, part of the cover is lifted from a first casing by simply removing a screw from the first casing and the cover. The cover can be detached from the first casing by holding the lifted portion of the cover, and, thus, the memory slot can be opened easily without using the weight of the cover. Accordingly, it is possible to improve the operability when attaching a memory module to the memory slot or when detaching a memory module from the memory slot.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: November 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Yoshiaki Nagamura, Shintaro Tanaka
  • Publication number: 20130301232
    Abstract: The invention relates to a retaining and contacting element (1) having a substantially U-shaped cross section comprising: a web (5), a first flange (3) and a second flange (4), wherein the flanges (3, 4) extend from an upper side of the web (5), a second moulding (7) extending from the second flange (4) in parallel to the web (5), a plurality of conductive paths (12) arranged at least on part of an upper side (11) of the second moulding (7), wherein a longitudinal extension of the conductive paths (12) runs in parallel with a longitudinal extension of the web (5). Moreover, the invention relates to a contacting arrangement (2) and to a method for establishing a contacting arrangement (2).
    Type: Application
    Filed: May 9, 2013
    Publication date: November 14, 2013
    Applicant: Johnson Controls GmbH
    Inventors: Viktor Bieletzki-Welz, Lachezar Nikolov
  • Patent number: 8582314
    Abstract: There is provided an interconnection structure. An interconnection structure according to an aspect of the invention may include: a plurality of side portions provided on one surface of a substrate part and a plurality of cavities located between the side portions and located further inward than the side portions; and electrode pattern portions provided on surfaces of the side portions and the cavities.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: November 12, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Wook Park, Young Do Kweon, Seung Wan Shin, Mi Jin Park, Kyung Seob Oh