Abstract: In security applications, an authentication key may be stored in non-volatile memory on a semiconductor chip. If a supply of these chips with the same authentication key is available, the key may be cracked by successively setting bits of the key using a focussed ion beam, laser, or other means of locally modifying a chip. This invention prevents discovery of the key by storing the key in multi-level memory (e.g. 4 level flash or E-EPROM) with the minimum and maximum levels representing invalid states, and the authentication key being stored on intermediate levels.

Abstract: According to the present invention, the above-described objects can be achieved by a semiconductor storage device including: memory cells for storing data by accumulating or not accumulating charges, such as electrons, into floating gate; wherein the memory cell includes first memory cells having first charge exchange capability with respect to a charge exchange for the floating gate, and second memory cells having second charge exchange capability, so that data to be returned can be stored. In the semiconductor storage device according to the present invention, when all erase or all write (program) is performed to the memory cells, the first memory cells become to have a different threshold voltage from the second memory cells according to the different charge exchange capability of the memory cells, thus data to be returned can be read out.

Abstract: A writing apparatus for a non-volatile semiconductor memory device in which data is written into a flash memory 11 and written data being verified, whereby only data not having been written properly in the memory 11 is rewritten therein, wherein the writing apparatus comprising exclusive-NOR circuit 511-51n which compares write data 31D with verified data 41D and generates write data 51D to be rewritten thereinto, based on a result of the comparison.

Abstract: According to the present invention, access to a password area in a nonvolatile memory cannot be granted by simple supply of an address in a normal order. According to one preferable mode, for instance, a trap address is set in the password area so that reading information from the password area is permitted only when the password area is accessed without accessing the trap address, whereas when the password area is accessed through the trap address, information reading is inhibited, or meaningless data is output or the information in the password area is destroyed. According to another preferable mode, the order in which access is made to the password area can arbitrarily be set so that accessing the password area in this order alone can permit the password area to be read, whereas when access to the password area is made in a different order, information reading is inhibited, or meaningless data is output or the information in the password area is destroyed.

Abstract: An integrated circuit device using electrically programmable non-volatile memory cells, such as a single polysilicon having a single polysilicon level, for identifying and enabling the integrated circuit device. Such as an integrated circuit device having a memory array having rows and columns, and including redundant elements. The redundant elements include a selected one of redundant rows, redundant columns, and redundant rows and columns; and the redundant elements are selected and enabled by electrically programmable non-volatile memory cells. In another embodiment, an integrated circuit device having an electrical chip identification device including electrically programmable non-volatile memory cells.

Abstract: A flash memory device (100) includes a core cell array including two banks (194, 196) of core cells and address decoding circuitry (112, 114, 118, 120) and a write protect circuit. The write protect circuit includes sector write protect circuits (210) associated with respective sectors (202) of the core cell array in storing write protect data for the associated sector. The write protect circuit further includes a switch circuit (404) which selects one sector write protect signal in response to a write select signal to produce a combined write protect signal. The write protect circuit further includes an output circuit (406) coupled to the switch circuit to produce a sector write protect signal.

Abstract: An integrated circuit memory includes a plurality of memory cells for storing a data word. A lock bit cell is coupled to the memory cells. The lock bit cell stores a lock bit associated with the data word. The lock bit can be set to a locked state to prevent overwriting of the data word.

Abstract: An improved flash EEPROM memory-based storage subsystem includes one or more flash memory arrays, each with a duplicity of data registers and a controller circuit. When data are read from a flash array into a data register, the data is copied to a second register so that, during the ensuing program operation into the same array, the data may be transferred to the controller for the purpose of checking the data validity. This creates an improved performance system that doesn't suffer data transfer latency during copy operations but that is able to guarantee the validity of the data involved in such operations.

Abstract: The present invention is a nonvolatile semiconductor memory having, in addition to a main storage region for storing ordinary data, a hidden storage region for storing a special code for preventing unauthorized copying, and this hidden storage region is in a read enabled state at the time of a write protected state, and is in a read prohibited state at a time when there is no write protected state. Therefore, a hidden storage region can be read out only after a semiconductor memory vendor stores a special code in a hidden storage region, and sets the hidden storage region to a write protected state. And the method for changing to this write protected state is a secret to everyone other than the vendor. As a result thereof, even if a semiconductor memory, for which a special code is not stored in a hidden storage region, is illegally obtained on the black market, since hidden storage region readout is still prohibited, illegally copied data cannot be used, consequently preventing unauthorized copying.

Abstract: A secured electrically modifiable non-volatile memory includes a circuit to determine if memory cells therein have been exposed to ultraviolet radiation. The memory includes at least one additional memory cell, called a reference cell, and an associated read circuit for detecting any erasure of the reference cell by ultraviolet radiation. At each access to the memory, the reference cell is read by the associated read circuit. If the state of the reference cell is different from its initial electrical state, then operation of the memory is stopped.

Abstract: A synchronous flash memory includes an array of non-volatile memory cells. The memory device has a package configuration that is compatible with an SDRAM. The memory device can detect a brown-out of a supply voltage. The memory device comprises a voltage detection circuit to monitor a supply voltage and provide a signal if the supply voltage drops below a predetermined value. A latch is coupled to the voltage detection circuit and can be programmed to indicate if the supply voltage dropped below the predetermined value. An external controller can read a status of the latch. The memory, therefore, can provide an indication to an external controller that a reset, or initialization, operation is needed.

Abstract: The invention provides a flash memory having a security function and a protect function. When the release of the security function has been instructed, all data stored in each block of a flash memory main body is forcibly erased, ignoring the setting of the protect function. After that, the security function is released, thereby enabling readout of data. This being so, even if a third person releases the security function, leakage of data to the outside can be prevented.

Abstract: A non-volatile semiconductor memory includes a certification data storage portion storing certification data, a password storage portion storing a password, a decision circuit deciding whether a password included in an address signal is identical to the password stored in the password storage portion, and an output control portion controlling readout of the certification data from the certification data storage portion according to a decision by the decision circuit.

Abstract: The present invention is a nonvolatile memory for segmenting one data file that has an attribute file and that is successively reproduced and recording parts of which the blocks are aggregated so that they disperse in the nonvolatile memory, the attribute file having first management information for linking the dispersed parts, the nonvolatile memory having a management area for second management information for linking the dispersed parts.

Abstract: The present invention discloses systems and methods for providing voltages during programming to the control gates of write protect CAMS. Upon entering a write protect CAM programming mode, at least one voltage supply circuit is activated to supply the predetermined voltage for the control gates of the write protect CAMS. When the write protect CAMS are programmed, a gate control circuit transfers a programming voltage to the control gates of the write protect CAMS. Following programming and verification of the write protect CAMS, the gate control circuit holds the control gates of the write protect CAMS at a ground voltage level.

Abstract: A nonvolatile memory device is provided capable of shipping after setting it as a flash memory or as a one-time memory, and which cannot be altered to a flash memory once it has been used as a one-time memory. The nonvolatile memory device of the present invention has a circuit structure such that when a nonvolatile memory receives an instruction of prohibiting erasure of internal data, the instruction is stored by setting a prescribed flag provided in the nonvolatile memory at a predetermined value, and the content of the present nonvolatile memory cannot be erased after packaging, so that it is impossible for a user to alter the values of the flag which indicates whether erasure of data is prohibited or permitted.

Abstract: An apparatus for accessing locked-down flash memory in a computer system that utilizes a general purpose input/output port coupled to the flash memory, and includes program instructions that generate a reset signal, output the reset signal to the general purpose input/output port, sense the reset signal, unlock the flash memory to allow write access to the flash memory, update the flash memory, and lock the flash memory to locked down mode. The present invention allows flash memory to be updated during normal operation of the computer system.

Abstract: A nonvolatile semiconductor memory device includes a memory cell array and a check memory cell array. Each check memory cell is connected to a cell block including a plurality of memory cells and has about the same characteristic as the memory cell. A predetermined value is written to the check memory cell each time data is written to the corresponding cell block. By comparing a value stored in the check memory element to the predetermined value, the deterioration state of the memory cells is detected.

Abstract: A boot program or an internal combustion engine control program and data stored in a flash ROM is rewritten in a flash ROM rewriting processing by a microcomputer of an ECU. In this instance, a main relay control circuit is controlled to hold an electric power supply from a main relay, as the rewriting is disabled to be made repeatedly once the electric power supply is interrupted in the midst of the boot program. An entire electric power supply is interrupted by an ignition switch to enable the interruption in the midst of rewriting with respect to other programs. Thus, the electric power supply at the time of the program rewriting can be set to hold/stop in correspondence with the importance of the programs stored in the flash ROM.