By Interpolating Or Maximum Likelihood Detecting Patents (Class 369/59.22)
  • Patent number: 7379408
    Abstract: A disk apparatus has an equalizing unit which performs PR equalization for the read signal from the disk based on a plurality of tap coefficients, a decoding unit which performs a decoding process for the equalized read signal, a calculating unit which obtains an ideal signal of the decoded read signal, and compares the ideal signal with the decoded read signal, thereby calculating an error signal E, and a control unit which groups the tap coefficients into at least a first and second coefficient groups which are groups of tap coefficients at symmetrical locations each, and determines tap coefficients of the first coefficient group in a range of a first limit value K1 according to the calculated error signal, determines tap coefficients of the second coefficient group in a range of a second limit value and supplies the determined tap coefficients to the equalizing unit.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: May 27, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukiyasu Tatsuzawa, Koichi Otake, Hideyuki Yamakawa, Hiroyuki Moro, Toshihiko Kaneshige
  • Publication number: 20080112289
    Abstract: An optical disk apparatus is provided that has a signal processing circuit for equalizing a signal so as to achieve predetermined equalization, in which interference between codes is permitted, by means of an adaptive equalization circuit or the like, and for performing binarization by means of a maximum likelihood decoding circuit in which interference is performed as a rule, and thereby achieves stabilized signal reproduction in a narrow-band transmission. When evaluating the quality of the recorded signal through the use of the recording parameter learning and the reproduction system such as recorded signal verification, the optical disk recording apparatus is capable of highly precisely evaluating the quality of the recorded signal by fixing a circuit characteristic after suspending the optimization operation of the adaptive equalization circuit or the like for optimizing the characteristic by the reproduced signal. An optical disk recording method is also provided.
    Type: Application
    Filed: November 15, 2007
    Publication date: May 15, 2008
    Inventors: Koichiro NISHIMURA, Junya IIZUKA, Manabu Katsuki, Takakiyo Yasukawa
  • Patent number: 7372797
    Abstract: A data reproduction device for sampling a signal reproduced from a recording medium based on a synchronization clock signal synchronized with the reproduced signal includes: an analog-to-digital conversion part converting the reproduced signal into a first digital signal based on a first clock signal; an interpolation part interpolating the first digital signal so that the first digital signal is equalized with a second digital signal sampled based on a second clock signal having a frequency n times the frequency of the first clock signal; an optimum phase detection part receiving the output of the interpolation part and detecting the phase error between the optimum point of the reproduced signal and the synchronization clock signal; a phase correction part correcting the phase of the reproduced signal based on the phase error; and an information data start detection part detecting the start of information data based on the phase error.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: May 13, 2008
    Assignee: Fujitsu Limited
    Inventors: Toshikazu Kanaoka, Masakazu Taguchi
  • Patent number: 7366076
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: April 29, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7355938
    Abstract: A timing recovery method samples, equalizes and detects a signal reproduced from a recording medium and to output a detection signal, controls sampling positions based on a phase error between the equalized signal and the detection signal, and obtains likelihood information which is related to a bit having a probability of error which exceeds a predetermined value, based on the equalized signal. The control of the sampling positions is suppressed during a time which is based on the likelihood information.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: April 8, 2008
    Assignee: Fujitsu Limited
    Inventors: Akihiro Yamazaki, Takao Sugawara
  • Patent number: 7342863
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: March 11, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7339872
    Abstract: An optical disc device of the present invention obtains a reproduction quality that is independent of a mark distortion by receiving a signal that is obtained from an A/D converter for digitizing a reproduction signal of an optical disc medium and an offset correction means for performing offset correction, accurately measuring a mark distortion factor in a mark pattern having a long recording width by means of a mark distortion factor measuring means, and selecting one of output signals from a PRML signal processing means and a level judge binarization means by means of a digital data demodulation selection means by utilizing the measured mark distortion factor as a judgement criterion, to be used as a demodulation binary signal.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: March 4, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Youichi Ogura
  • Patent number: 7336581
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: February 26, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7336582
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: February 26, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7324427
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 25, 2006
    Date of Patent: January 29, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321549
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321545
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321547
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321535
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321548
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 25, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321531
    Abstract: An apparatus includes a multiple detecting unit having n detectors, and a controller which selects one of the n detectors and controls the selected detector to output a binary signal. In the apparatus, a plurality of detectors are used to detect a signal read from an optical storage medium, and the optimum detector is selected in consideration of a quality of the signal and detection conditions, thereby increasing the efficiency of a signal reproduction. The apparatus can selectively compensate for disturbance of a signal where data from the optical storage medium is reproduced. The apparatus may control a run length of the signal to be 3T.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: January 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-soo Park, Jae-seong Shim
  • Patent number: 7321546
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321536
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321537
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7321538
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 25, 2006
    Date of Patent: January 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7319654
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: January 15, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7313071
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: December 25, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Publication number: 20070286048
    Abstract: A reproducing apparatus includes a signal reading unit for reading a signal from a recording medium, an equalizing unit for performing partial response equalization on the read signal and outputting an equalized signal, a maximum likelihood decoding unit for performing maximum likelihood decoding on the equalized signal to decode binary data and outputting a binary data string, a determining unit for determining whether or not a shortest code in the binary data string obtained by the maximum likelihood decoding is correct, on the basis of information on an amplitude of the equalized signal corresponding to the shortest code, a code correcting unit for correcting the shortest code in the binary data string, in accordance with a result of the determination of the determination unit, and a data demodulating unit for demodulating the binary data string obtained through the code correcting unit to obtain reproduction data from the recording medium.
    Type: Application
    Filed: June 12, 2007
    Publication date: December 13, 2007
    Applicant: Sony Corporation
    Inventor: Kenichi Hayashi
  • Patent number: 7308061
    Abstract: A read channel apparatus is disclosed for reading data recorded on an optical storage system at a predetermined baud rate. The apparatus asynchronously samples an analog read signal generating from the optical storage system and subtracts an estimated DC offset from the asynchronous sample values to generate a sequence of asynchronous DC-removed sample values. The asynchronous DC-removed sample values are separately interpolated by two interpolators to generate a sequence of synchronous even-time sample values and a sequence of synchronous odd-time sample values respectively. The synchronous even-time and odd-time sample values are separately equalized by two equalizers in accordance with a target spectrum to generate a sequence of even-time equalized sample values and a sequence of odd-time equalized sample values respectively. A DC offset estimator generates the estimated DC offset from the even-time equalized sample values and the odd-time equalized sample values.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: December 11, 2007
    Assignee: Mediatek Inc.
    Inventors: Ke-Chiang Huang, Tzu-Pai Wang
  • Patent number: 7308640
    Abstract: Digital circuits and methods for designing digital circuits are presented. More particularly, the present invention relates to error correction circuits and methods in communications and other systems. In the present invention, a novel K-nested layered look-ahead method and its corresponding architecture, which combine K-trellis steps into one trellis step (where K is the encoder constraint length), are proposed for implementing low-latency high-throughput rate Viterbi decoder circuits. The main idea of the present invention involves combining K-trellis steps as a pipeline structure and then combining the resulting look-ahead branch metrics as a tree structure in a layered manner to decrease the ACS precomputation latency of look-ahead Viterbi decoder circuits. The proposed method guarantees parallel paths between any two trellis states in the look-ahead trellises and distributes the add-compare-select (ACS) computations to all trellis layers.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: December 11, 2007
    Assignee: Leanics Corporation
    Inventors: Keshab K. Parhi, Junjin Kong
  • Patent number: 7302019
    Abstract: A maximum likelihood decoder includes metric generators for generating metrics based on a plurality of partial responses and a Viterbi decoder for realizing maximum likelihood decoding by using a synthetic metric generated by synthesizing the metrics. A first partial response is an original partial response. A second partial response is a differential response generated by subtraction by shifting the first partial response by 1 clock. Alternatively, the differential response may be generated by subtraction by shifting the first partial response by 2 clocks. The second partial response may be a response generated by addition by shifting the first partial response by 2 clocks. Alternatively, the second partial response may be an integration response generated by adding all previous samples of the first partial response.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: November 27, 2007
    Assignee: Sony Corporation
    Inventor: Naoki Ide
  • Patent number: 7298683
    Abstract: An optical information recording/reproducing apparatus is provided that condenses a light flux from a light source on an optical recording medium and effects recording/reproduction and comprises a light source; an objective lens; a spherical aberration generating mechanism; a sensor for receiving light reflected by an optical recording medium and converting the light into an electric signal; an equalization filter for effecting waveform equalization of an output from the sensor in accordance with a predetermined partial response characteristic; a quality evaluating circuit for measuring reproduction quality of an output signal from the equalization filter; and an adaptive equalization circuit for sequentially updating a coefficient for the equalization filter, wherein while the update of the coefficient for the equalization filter by the adaptive equalization circuit is stopped, the spherical aberration generating mechanism is driven on the basis of the reproduction quality measured by the quality evaluating
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: November 20, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hisatoshi Baba
  • Patent number: 7295507
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: November 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7289420
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: October 30, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7289414
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: October 30, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7289409
    Abstract: A wobble signal is generated from at least two elementary signals (A,B,C,D) detected by scanning a wobbled track of a data carrier. The invention proposes a solution for eliminating the noise of various origins in the wobble signal, notably the high frequency data leakage into the wobble signal due to radial asymmetry introduced in the diffraction pattern on the detector, whatever the reason for this radial asymmetry. According to the invention, the at least two elementary signals are filtered with at least an adaptive filter (40), and said filtered elementary signals are subtracted (44) from said wobble signal (PP) thereby generating an improved wobble signal.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: October 30, 2007
    Assignee: Koninklijke Philips Electronics N. V.
    Inventors: Bin Yin, Cornelis Marinus Schep, Aalbert Stek, Alexander Padiy, Theodorus Petrus Henricus Gerardus Jansen, Mohammed Meftah
  • Patent number: 7289419
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: October 30, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7278089
    Abstract: A receiver is to receive an encoded data block that was encoded using a convolutional encoder and includes source bits and error detection bits. The receiver may include a Viterbi decoder, a de-mapper and an error detection unit. The error detection unit is to determine whether an error correction capability of the Viterbi decoder is sufficient to recover the source bits from the encoded data block. The Viterbi decoder is to decode the encoded data block only if the encoded data block is not free of errors and if the error correction capability of the Viterbi decoder is sufficient to recover the source bits from the encoded data block.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: October 2, 2007
    Assignee: Intel Corporation
    Inventors: Sharon Levy, Dov Kimberg
  • Patent number: 7274635
    Abstract: In step S1, the address generator generates address information composed of a sync signal which is recorded on an optical disc, address data and an error correction code for the address data, pre-encodes and supplies it to a modulator. At the same time, a carrier signal generator generates a carrier signal which is to carry the address information, and supplies it to the modulator. In step S2, the modulator makes MSK modulation of the carrier signal supplied from the carrier signal generator on the basis of the pre-encoded address information supplied from the address generator, and supplies a resultant MSK modulation signal to a wobbling unit. In step S3, the wobbling unit forms, on the optical disc, a spiral groove wobbled adaptively to the MSK modulation signal supplied from the modulator. In this optical disc, a given address can be accessed quickly and accurately.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: September 25, 2007
    Assignee: Sony Corporation
    Inventors: Shoei Kobayashi, Nobuyoshi Kobayashi, Tamotsu Yamagami, Shinichiro Iimura
  • Patent number: 7274645
    Abstract: A reproduction signal processing apparatus includes: a reproduction unit, an A/D converter for sampling a reproduction signal to obtain a multi-bit digital signal, a phase-locked loop controller for outputting a reproduction clock that is in phase with clock components included in the reproduction signal from an oscillator, a frequency divider for frequency-dividing the reproduction clock, an operation clock switching unit for selecting an operation clock, a filter for performing digital equalization, a filter coefficient learning unit for adaptively controlling the filter coefficients to minimize an equalization error, and an equalization error correcting unit for performing correction so as not to output an abnormal equalization error, thereby performing the adaptive equalization control with stability not only in the channel rate mode but also in the half rate mode that is introduced to suppress the power consumption.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: September 25, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kouichi Urita
  • Patent number: 7272096
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: September 18, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7271969
    Abstract: A method and apparatus for providing high speed, linear-phase interpolation. Signals from a plurality of differential pairs are weighted to produce an output clock having a selectable linear phase variation. A controller includes a pulse generator for providing a predetermined number of pulses having a predetermined phase shift and a predetermined frequency and an interpolator for processing the predetermined number of pulses having a predetermined phase shift and a predetermined frequency to generate a clock signal that is linearly adjustable between a predetermined number of output phases.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: September 18, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Eric Carpenter, Michael Curtis, Raymond A. Richetta, Doug Spannring
  • Patent number: 7269214
    Abstract: A waveform equalizer is designed to perform high frequency enhancement on a read signal without increasing inter symbol interference even when the shortest run length of the read signal is not greater than twice the clock period of the channel clock signal. An addition value of weighted values of signal levels of an amplitude limited read signal obtained by limiting the amplitude of the read signal, where the signal levels are at first and second points of time, is added to a signal level at an intermediate timing of the first and second points of time, and a result of the addition is outputted as an equalization corrected read signal.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: September 11, 2007
    Assignee: Pioneer Corporation
    Inventor: Hiroki Kuribayashi
  • Patent number: 7269121
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: September 11, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Publication number: 20070195675
    Abstract: An optical disc reproducing apparatus includes an A/D converter; an asymmetry compensator for detecting 4T sampling signals; a phase locked loop including a frequency detector that counts and detects run-length signals from the digital signals and compensates frequency errors of the digital signals; a binary module including a Viterbi decoder, a slicer, and a minimum T compensator that compensates the digital signal with a minimum signal having a unit cycle; an equalizer; an adaptive level error detector detecting a base level of the Viterbi decoder from both an input signal into the equalizer and an output signal from the Viterbi decoder, and computing a filtering coefficient of the equalizer from the base level; and a signal quality measurer measuring a jitter or an SbER of the digital signal.
    Type: Application
    Filed: September 28, 2006
    Publication date: August 23, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung Hyun Lee, Eing Seob Cho, Eun Jin Ryu, Jun Jin Kong
  • Patent number: 7257066
    Abstract: A defect detection device for detecting a defect of data recorded on a recording medium includes a waveform state detection part generating information representing a state of a waveform of a reproduced signal from the recording medium based on soft decision results obtained in process of reproducing the data in accordance with a maximum likelihood decoding algorithm corresponding to partial response, and a defect determination part determining the defect of the recorded data based on the information generated in said waveform state detection part.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: August 14, 2007
    Assignee: Fujitsu Limited
    Inventors: Toru Fujiwara, Masakazu Taguchi
  • Publication number: 20070177479
    Abstract: An information reproducing apparatus reads information recorded on a recording medium and outputs a reproduced signal, and performs, for the reproduced signal, analog offset correction of correcting offset before AD conversion, digital offset correction of correcting offset after AD conversion, and offset detection of detecting an offset control amount from a corrected reproduced signal after the digital offset correction. Further, the information reproducing apparatus divides offset data indicating the detected offset control amount into first offset data of a least significant bit unit for the AD conversion of the reproduced signal or greater and second offset data less than the least significant bit unit so as to perform the digital offset correction using the first offset data and perform the analog offset correction using the second offset data.
    Type: Application
    Filed: August 4, 2006
    Publication date: August 2, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yukiyasu Tatsuzawa, Hideyuki Yamakawa, Takayuki Mori, Takahiro Nango, Toshihiko Kaneshige
  • Publication number: 20070177475
    Abstract: A method and apparatus to reproduce and/or record data from and/or to an optical recording medium. The method includes detecting a wobble signal from the optical recording medium, predicting a wobble channel state from the detected wobble signal, detecting an information signal from the optical recording medium, predicting an information channel state from the detected information signal. If a damaged section is discovered from the optical recording medium, the information signal is decoded based on the information on the wobble channel state or the information on the information channel state. Accordingly, data can be reproduced more effectively by predicting a channel state of an information (RF) signal and a channel state of a wobble signal.
    Type: Application
    Filed: December 11, 2006
    Publication date: August 2, 2007
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyun-jung Kim, Sung-hee Hwang
  • Patent number: 7245658
    Abstract: A read channel apparatus is disclosed for reading data recorded on an optical storage system. An exemplary sampling device samples an analog read signal generating from the optical storage system to generate a sequence of sample values. A subtractor subtracts an estimated DC offset from the sample values to generate a sequence of DC-removed sample values. An equalizer equalizes DC-removed sample values in accordance with a target spectrum to generate a sequence of equalized sample values. First and second interpolators interpolate the equalized sample values to respectively generate sequences of even-time sample values and odd-time sample values. A data sequence composed of the even-time and the odd-time sample values is substantially synchronized to the baud rate. A timing recovery controller controls the interpolators to synchronize the even-time and odd-time sample values to the baud rate.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: July 17, 2007
    Assignee: Mediatek, Inc.
    Inventors: Tzu-Pai Wang, Meng-Ta Yang, Pi-Hai Liu
  • Patent number: 7239591
    Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: July 3, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Okamoto, Hideo Ando, Chosaku Noda, Yutaka Kashihara
  • Patent number: 7215623
    Abstract: An analog filter is placed at a stage previous to an analog-digital converter (ADC), and a waveform equalizer is placed at a stage subsequent to the ADC. The sampling frequency of the ADC is determined by a clock generation section according to the relationship between the bit rate of an input reproduction signal and the characteristic of the analog filter. The number of taps is changed according to the relationship between the bit rate of the input reproduction signal and the characteristic of the analog filter. Further, the tap coefficients of a waveform equalizer are changed according to the height of the frequency band of the input reproduction signal. A waveform evaluation section generates a signal that evaluates a waveform equalization signal transmitted from the waveform equalizer to a Viterbi decoder, whereby adaptive waveform equalization is realized.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: May 8, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Nakahira, Takashi Morie
  • Patent number: 7215616
    Abstract: Because of the reduced track pitch of DVD compared to that of CD, the running-OPC procedures (ROPC) currently used in CD-RW systems do not function well in recordable and rewritable DVD systems. The present invention proposes to use the reflected signal from the writing spot itself instead of the satellite spots used in the CD-RW running-OPC procedure. This is realized by sampling the RF-signal reflected from the writing spot at the high-reflective crystalline level. This sampled signal (?) is fed into a power control loop (a so-called ?-loop) to keep it at a constant level.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: May 8, 2007
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Johannes Leopoldus Bakx, Gary Christopher Maul
  • Patent number: 7215624
    Abstract: An optical disk apparatus includes a detector for detecting a data string corresponding to a waveform pattern having a predetermined time width, an ideal signal generator for generating a data string of an ideal signal having a predetermined time width, which corresponds to a data string having the predetermined time width, a parameter calculator for comparing the detected data string with the data string of the generated ideal signal, and determining a waveform compensation amount on the basis of the comparison result, a recording waveform generator for generating a recording waveform pulse on the basis of externally supplied recording data and the waveform compensation amount, and a pickup for irradiating a storage area of the optical disk with a laser beam in accordance with the recording waveform pulse to record the recording data.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: May 8, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yutaka Kashihara
  • Patent number: 7212567
    Abstract: A read channel apparatus is disclosed for reading data recorded on an optical storage system at a predetermined baud rate. The apparatus asynchronously samples an analog read signal generating from the optical storage system and subtracts an estimated DC offset from the asynchronous sample values to generate a sequence of asynchronous DC-removed sample values. The asynchronous DC-removed sample values are separately interpolated by two interpolators to generate a sequence of synchronous even-time sample values and a sequence of synchronous odd-time sample values respectively. The synchronous even-time and odd-time sample values are separately equalized by two equalizers in accordance with a target spectrum to generate a sequence of even-time equalized sample values and a sequence of odd-time equalized sample values respectively. A DC offset estimator generates the estimated DC offset from the even-time equalized sample values and the odd-time equalized sample values.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: May 1, 2007
    Assignee: Mediatek Inc.
    Inventors: Ke-Chiang Huang, Tzu-Pai Wang
  • Patent number: 7200094
    Abstract: The present invention provides an apparatus and a method for precisely and adequately evaluating actual quality of reproduced data whenever applying a maximum likelihood decoder for converting signal reproduced from a recording medium into binary signal Based on data arrays of a pair of binary data outputted from a “Viterbi” decoder, SAM values are secured by selecting any of path-metric differential values (00) and (11) being the difference between a pair of values compared when renewing path-metric values PMM (00) and (11) outputted from the “Viterbi” decoder. The minimum SAM value for an ideally-reproduced signal is outputted from a constant generating circuit. If the SAM values are verified as valid, and yet, if the SAM values coincide with the equation “input SAM values”?“data value outputted from the constant generating circuit”, then squared values outputted from a square circuit are averaged by an averaging circuit. Finally, the average value is outputted as the reproduced signal evaluation.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: April 3, 2007
    Assignee: Sony Corporation
    Inventors: Kensuke Fujimoto, Shunji Yoshimura, Atsushi Fukumoto, Yasuhito Tanaka