Abstract: A method and apparatus for recording or reproducing data in which high performance encoding and a high efficiency decoding are realized to lower the decoding error rate. A magnetic recording and/or reproducing apparatus 50 includes, in a recording system, a modulation encoder 52 for modulation encoding input data in a predetermined fashion and an interleaver 53 for interleaving data supplied from the modulation encoder 52 to re-array the data sequence.

Abstract: In a data recording apparatus, values of parity bits to be additionally provided every one predetermined length block in data obtained by demodulating the original data are determined so as to satisfy a part of or an entire the predetermined run length limitation rule in ranges of a current predetermined length block, the plurality of parity bits, and a next predetermined length block that is positioned next to the current block. The parity bits having the values are additionally provided to the current block.

Abstract: A path storing circuit has path holding parts at a plurality of stages storing a survivor path and corresponding to times. A majority decision circuit receives output values of three delay circuits including the top and bottom delay circuits each receiving a selected output of a selector out of six delay circuits in the path holding part at the final stage and makes a decision by a majority.

Abstract: In order to evaluate the quality of a signal recorded on an optical recording medium, a target signal is obtained based on a predetermined data string and a predetermined partial response characteristic, and for each clock cycle, an equalization error is calculated that is a difference between the target signal and a signal reproduced each clock cycle. Further, the product of the equalization errors calculated at different times is obtained, and based on the obtained product, the quality of a signal is evaluated.

Abstract: An information recording and reproduction apparatus has a turbo decoder that decodes turbo encoded data. The turbo decoder has a number of likelihood ratio calculation units, forward direction path probability calculation units the number of which is less than the number of the likelihood ratio calculation units, and backward direction path probability calculation units the number of which is less than the number of the likelihood ratio calculation units. The likelihood ratio calculation units calculate in parallel the likelihood ratio for each of a plurality of data blocks. The forward direction path probability calculation units time-divisionally calculate probabilities of the forward direction paths for the data blocks. The backward direction path probability calculation units time-divisionally calculate probabilities of the backward direction paths for the data blocks.

Abstract: A media noise optimized (MNO) detector for a read channel compensates for pattern dependent media noise, and compensates for nonlinearities from many sources such as residual MR nonlinearity, residual nonlinear transition shift, partial erasure, write-induced nonlinearity, and steady-state mis-equalization. The MNO detector is implemented by adjusting a conventional Viterbi detector branch metric so that the channel output value (ideal value) can be a nonlinear function of the state/branch bits, and the branch metric scaling factor is a function of the state/branch. For a given state/branch, the ideal value is the mean of analog-to-digital converter samples for the pattern corresponding to the state/branch, and the branch metric scaling factor is proportional to the noise variance for the pattern corresponding to that state/branch.

Abstract: An apparatus comprising an analog-to-digital converter, a compensation circuit, a partial response equalizer and a non-adaptive Viterbi decoder. The analog-to-digital converter may be configured to convert an input analog signal into a digital signal. The compensation circuit may be configured to generate an output signal by clipping the digital signal. The partial response equalizer circuit may be configured to shape the output signal into a pre-defined target with a delay operator. The decoder may be configured to calculate a minimum error between data in the output signal and other possible data sequences.

Abstract: A tilt control apparatus includes an orthogonal shift detector (9) which detects an orthogonal shift by comparing a pair of a plurality of tap coefficients (C1, . . . , C7) of a FIR filter and generates an orthogonal shift signal, and an actuator varies the inclination of the optical axis of the light beam to correct the orthogonal shift, and a tilt controller (10) controls the drive of the actuator in accordance with the orhogonal shift signal to minimize the orthogonal shift. In the information recording operation, the orthogonal shift obtained based on a recording track is previously stored in a temporary storage portion and the stored orthogonal shift is used to conduct the tilt control.

Abstract: An evaluation method for calculating an identification signal by using PRML, comprises a table storing true patterns and ideal signals thereof, false patterns corresponding to the true patterns and ideal signals thereof, and Euclidean distance between the true pattern and the false pattern, a calculating unit, when a recording signal synchronized with an identification signal coincides with any pattern of the table, calculates a distance between Euclidean distance between the ideal signal of the true pattern and a reproduction signal and Euclidean distance between the ideal signal of the false pattern and a reproduction signal, and an evaluation unit which evaluates an identification signal by using an average and standard deviation of difference. A table for patterns is created for a likely mistaken pattern, whereby calculating an evaluation value with high precision, of a signal quality, with a small amount of calculation.

Abstract: A recording/reproducing apparatus records and reproduces, over a partial response channel, a recording signal produced by encoding data according to a convolutional code and reproduces the data from a reproduction signal by iterative decoding using likelihood information. A burst error detector detects a burst error part in the reproduction signal. A substituting part substitutes, for a sampling value included in the burst error part, a predetermined value according to a detected result of the burst error detector.

Abstract: An ACS circuit and a Viterbi decoder with the circuit. The Add-Compare-Select (ACS) circuit comprises: two registers for storing two previous candidate state metrics; a first adder for adding the value stored in the first register and a first branch metric to generate a first addition result; a second adder for adding the value stored in the second register and the first branch metric to generate a second addition result; a comparator for comparing the values stored in the first register and the second register to generate a decision bit; and a multiplexer for selecting either the first addition result or the second addition result as a new output candidate state metric according to the decision bit. Due to the parallel processing of the adders and the comparator, the processing speed of a Viterbi decoder with the ACS will be increased.

Abstract: An equalizer and an equalizing method of optical recording/reproducing apparatus capable of enhancing equalizing performance and equalizing speed are disclosed. The equalizer includes a FF unit having a feedforward filter for removing pre-cursor from inter-symbol interference of input signal, a FB unit having a feedback filter for predicting post-cursor of the inter-symbol interference and outputting it, a first adder and a second adder for adding the signal from the FF unit and the signal from the FB unit, to remove the inter-symbol interference, a slicer for deciding the level of the signal from the first adder to be a predetermined level and feeding back the level-decided signal to the FB unit, and a signal detection unit for outputting the signal having the inter-symbol interference removed by the second adder as a predetermined signal using at least one of a trellis structure method and a tree structure method.

Abstract: To reconstruct data transmitted over a transmission path, for example a cable, the corresponding signal received by the receiver is firstly amplified and subsequently made discrete by means of an A/D-converter (6), in order to obtain a suitable digital signal, whereby the signal amplified for this purpose is scanned with a relatively low sampling rate, which can frequently lie in the Nyquist range or can be even less than the Nyquist frequency. Subsequently the signal made discrete in this way is filtered by means of a digital high pass filter (8) and equalized by means of a digital cable approximation filter (9) to compensate any distortion occurring during the transmission over the transmission path. By means of a phase locked loop (14, 18) a regenerated clock (CLK) and synchronous with this clock the originally transmitted data (DATA) is recovered from the digital signal processed in this way.

Abstract: An information storage medium according to an embodiment of this invention includes a wobble track whose wobble period is modulated by multi-frequency shift keying corresponding to playback control information, wherein the playback control information contains header data and address data, and the header data contains a VFO area formed from a predetermined frequency.

Abstract: A data processing apparatus having a partial response forward equalizer (filter) with sufficient number of taps to result in 7-tap target response, designed by jointly optimizing the target response and the target coefficients to maximize an appropriate signal-to-noise ratio (SNR) at the detector input, followed by a new post-processing scheme enhances performance of the threshold based bit-by-bit detector designed for the d=2 optical channels. The resulting performance of the proposed scheme over a range of channel densities of 4.5 and below (used on EFM/EFMPlus coded channels for CD/DVD), is close to maximum-likelihood bound (MLB), and it is better than that of other schemes at channel densities of 4.5 and higher. Advantageously, the detector of the invention is simple in structure compared to conventional partial response Viterbi detector schemes. By processing the detected data in accordance with a set of data correction rules, the invention provides advantageous enhanced detection capacity.

Abstract: The invention has an object to provide a disk evaluation apparatus capable of performing a highly reliable disk evaluation even on a recording disk on which information is recorded in high density. Amplitude-limited read sample value sequence are obtained by limiting read sample value sequence to a predetermined amplitude limit value, the read sample value sequence obtained by sampling a read signal read out from the recording disk as timed to a clock having the same frequency as that of a channel clock. Where a gap between a maximum sample value and a minimum sample value of the amplitude-limited read sample value sequence is equivalent to a predetermined distance of high-frequency wavelength, the maximum sample value and the minimum sample value are increased thereby to obtain high-frequency enhanced read sample value sequence enhanced at the high region thereof.

Abstract: A data reproducing method reproduces data corresponding to a state-transition pass selected as being most likely according to a Viterbi decoding algorithm from a reproduction signal supplied from a recording medium. The data reproducing method comprises the steps of detecting at least one state of the reproduction signal according to data used for selecting the state-transition pass, calculating an average value of the reproduction signal in the state detected by the step of detecting, and following a fluctuation amount of a direct current component of the reproduction signal according to the average value.

Abstract: The signal processor includes an analog filter, an analog-to-digital (A-D) converter, an adaptive equalization filter, a quality value calculating circuit, and a control circuit. The analog filter removes high-frequency noises of a played-back signal from a recording medium and amplifies a specific frequency band of the played-back signal. The A-D converter converts the played-back signal from the analog filter into a digital signal. The adaptive equalization filter performs waveform equalization of the played-back signal from the A-D converter while adjusting a tap coefficient of the adaptive equalization filter so as to reduce a difference between an output of the adaptive equalization filter and a target value. The quality value calculating circuit calculates a quality value based on the difference between the output of the adaptive equalization filter and the target value.

Abstract: For reproducing data, a first read signal from a main track is filtered and second read signals from tracks adjacent to the main track are filtered. A cross-modulation component included in a third read signal from the main track is removed by calculating an estimated value of cross-modulation for the main track by multiplying the filtered first read signal by the filtered second read signals and by subtracting the estimated value from the third read signal. A crosstalk component caused by the adjacent tracks included in a fourth read signal from the main track is removed by obtaining the crosstalk component by filtering the second read signals and by subtracting the crosstalk component from the fourth read signal.

Abstract: A waveform equalizer, which has a partial response characteristic represented in the form of PR (a, b, c, b, a) which is a quaternary transfer function characteristic, is made up an analog filter, an ADC (analog/digital converter), and an FIR filter, for providing matching with the frequency characteristic of a read back waveform read from a recording medium. Such signal processor characteristic approximation to the regenerative signal characteristic makes it possible to easily achieve equalization without particularly emphasizing the regenerative signal, thereby achieving a reduced circuit scale.

Abstract: An optical information recording medium (1) is composed of a pit recording area (2), wherein various control information is recorded by a prepit, and a user recording area (3) having a guide groove formed in a groove format, and a phase depth for the prepit and the groove are approximately the same wherein the phase depth is less than or equal to ?/10, wherein ? is a wavelength for reproducing light source. A recording/reproducing apparatus (4) for the optical information recording medium (1) includes decoding means (12) for decoding information by detecting a tangential push-pull reproduced signal from the prepit recording area (2) and detecting an aggregated signal from the user recording area (3).

Abstract: A data reproduction apparatus for adjusting filter coefficients of an equalizer including a digital filter, and connected before a Viterbi detector and a method therefor. A level of the output value of the equalizer is detected based on a reference level set in the Viterbi detector, and a level error of the detected level with respect to a predetermined reference value is detected. The filter coefficients of the equalizer are adjusted such that the level error is minimized, thereby improving the detection performance of the Viterbi detector.

Abstract: An optical multi-level recording medium, having a recording layer on which a recording mark is formed by irradiating a laser beam, plural virtual recording cells being continuosly formed in a relative moving direction to the laser beam on the recording layer with an arbitrary unit length and a unit width, five stages or more irradiation times being set so that the irradiation time becomes long successively from the first to final stages, a power average value of laser beam in a specific irradiation time of the plural-stage irradiation times being set so as to become larger than a power average value of another irradiation time longer than the specific irradiation time, and recording marks being formed in the virtual recording cell and giving five stages or more different optical reflectance when the laser beam is irradiated to the virtual recording cell.

Abstract: Hold registers receive a hold register enable signal. When reading one kind signal of header field data, the hold register enable signal is High and the registers store newly renewed values of filter coefficients, and when reading a different kind signal of recording field data, the hold register enable signal is Low and the hold registers hold the last stored header field contents of the registers. Then, when a header field of a next sector is detected, the contents held in the hold registers are taken and preset to the registers. Thus, even in a case where an intermittent reproduction signal having different kinds of formats is processed in playback, the continuous adaptive equalization can be realized over the different kinds of reproduction signals in quality.

Abstract: A multi-value data recording and reproducing device is provided that can accurately eliminate interference among codes through waveform equalization when reproducing information from a reproduction signal having levels multi-valued through modulation of the areas of recording marks on an optical information recording medium. This multi-value data recording and reproducing device is embodied by a multi-value data detecting circuit that varies the sizes of the recording marks in accordance with multi-value data (0, 1, 2, . . . , (m?1): m being an integer of 3 or greater) on the optical information recording medium, and detects the multi-value data through predetermined signal processing on signals obtained by scanning the recording marks with an optical spot.

Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.

Abstract: A method and an apparatus are provided which are capable of evaluating a state of a signal with a fewer number of samples compared with an error rate. A reproducing signal obtained from a magneto-optical disk is subjected to maximum-likelihood decode in a maximum-likelihood decoder, paths coupling with each other in the maximum-likelihood decode is detected by an evaluation index generation unit and, at the same time, a difference of likelihoods (path metrics) of those paths is obtained to adjust a parameter of a recording and reproducing signal or a control signal of an optical pickup based on the likelihood difference. The parameter is, for example, auto-tracking, a gain of an auto-focusing loop, or an offset value, or a gain value of a reproducing signal, a recording power, or a reproducing power intensity.

Abstract: In a data reproduction method and apparatus of the present invention, a Viterbi detection unit is provided, the Viterbi detection unit having a plurality of detectors each providing a first partial response signal with a first constraint length from a first sequence of samples derived from a first readout signal. One of connection and disconnection of the plurality of detectors in the Viterbi detection unit is selected in response to a timing signal, wherein, when the connection of the plurality of detectors is selected, the Viterbi detection unit provides a second partial response signal with a second constraint length from a second sequence of samples derived from a second readout signal, the second constraint length being different from the first constraint length.

Abstract: An optical disk apparatus capable of adjusting a focus servo and the like by precisely detecting a jitter amount. Light reflected from an optical disk is converted into an RF signal in an optical pickup and amplified by an RF amplifier before being supplied to an equalizer. The boost amount of the equalizer is set to zero during adjustment and set to a predetermined finite value (e.g., +20 dB) during normal recording and reproducing. By first setting the boost amount to zero, the delay characteristics of the RF signal from 3T to 11T are flattened such that an accurate jitter amount can be determined based on the integrated value of the phase differences of 3T to 11T, thereby allowing the optical pickup to be adjusted so as to minimize the jitter amount.

Abstract: There is provided an information reproducing device which outputs an equalization signal P by applying equalization processing to a signal detected from a storage medium based on equalization coefficients C0 to CN, outputs a decoding signal d by applying maximum likelihood decoding processing based on reference levels R0 to R6, generates an ideal waveform signal I based on the equalization signal, and has a target waveform generator which generates a target waveform signal T by changing at least one level of the ideal waveform signal I, wherein erroneous decoding is reduced by optimizing reproduction processing parameters such as the equalization coefficients C0 to CN or the reference levels R0 to R6 based on the target waveform signal T and the information on the storage medium is stably reproduced.

Abstract: In a data recording apparatus, values of parity bits to be additionally provided every one predetermined length block in data obtained by demodulating the original data are determined so as to satisfy a part of or an entire the predetermined run length limitation rule in ranges of a current predetermined length block, the plurality of parity bits, and a next predetermined length block that is positioned next to the current block. The parity bits having the values are additionally provided to the current block.

Abstract: A data reproducing apparatus and method for improving data detection performance by adjusting decision levels used in a data detector. The data reproducing apparatus includes an equalizer which equalizes an input digital signal, a data detector which detects data from the output of the equalizer based on decision levels, and a level decision unit which detects levels corresponding to the decision levels used in the data detector from the output of the equalizer and feeds back corrected decision levels, which adaptively vary with the output level of the equalizer, to the data detector. Accordingly, the detection performance of the data detector is improved.

Abstract: In a digital data reproduction apparatus for demodulating digital data from an optical recording medium, PRML (Partial Response Maximum Likelihood) signal processing effective to high-density recording/reproduction is carried out by using a half rate processing offset control means which performs data demodulation using half of the channel bit frequency, a half rate processing phase sync control means, a half rate processing adaptive equalization means, and a half rate processing maximum likelihood decoder, and the digital data recorded on the optical recording medium are reproduced while restoring signal components which are missing in the time direction, by linear interpolation or Nyquist interpolation. Therefore, digital data reproduction performance is improved, and power consumption is reduced.

Abstract: A data reproduction apparatus includes first and second sampling parts which sample a reproduced signal from a recording medium in synchronism with first and second clock signals synchronizing respectively with leading and trailing edges of the reproduced signal and output leading and trailing sampled values, respectively, and a combination part which generates combined sampled values based on the leading and trailing sampled values. Recorded data is reproduced based on transition states of the combined sampled values output from the combination part in accordance with a maximum likelihood decoding technique corresponding to a predetermined partial response waveform.

Abstract: The present invention provides an apparatus and a method for precisely and adequately evaluating actual quality of reproduced data whenever applying a maximum likelihood decoder for converting signal reproduced from a recording medium into binary signal. Based on data arrays of a pair of binary data outputted from a “Viterbi” decoder, SAM values are secured by selecting any of path-metric differential values (00) and (11) being the difference between a pair of values compared when renewing path-metric values PMM (00) and (11) outputted from the “Viterbi” decoder. The minimum SAM value for an ideally-reproduced signal is outputted from a constant generating circuit. If the SAM values are verified as valid, and yet, if the SAM values coincide with the equation “input SAM values”?“data value outputted from the constant generating circuit”, then squared values outputted from a square circuit are averaged by an averaging circuit. Finally, the average value is outputted as the reproduced signal evaluation.

Abstract: An apparatus for reproducing information that has been digitally recorded on a storage medium includes first and second waveform equalizers. The first waveform equalizer equalizes a read signal, corresponding to the information read out from the storage medium, thereby outputting a first equalized signal. The second waveform equalizer has an equalization characteristic different from that of the first waveform equalizer, outputs a second equalized signal and is selectively used to extract a read clock signal.

Abstract: A signal of a run-length-limited code is reproduced from a recording medium. The reproduced signal is sampled to generate a sampling-resultant signal. An odd-sample signal and an even-sample signal are generated in response to the sampling-resultant signal. A first transversal filter subjects the odd-sample signal to first partial-response waveform equalization to generate an equalization-resultant odd-sample signal. The first partial-response waveform equalization depends on first tap coefficients. The first tap coefficients are controlled on a feedback basis to minimize an error of the equalization-resultant odd-sample signal. A second transversal filter subjects the even-sample signal to second partial-response waveform equalization to generate an equalization-resultant even-sample signal. The second partial-response waveform equalization depends on second tap coefficients. The second tap coefficients are controlled on a feedback basis to minimize an error of the equalization-resultant even-sample signal.

Abstract: A read channel apparatus is disclosed for reading data recorded on an optical storage system at a predetermined baud rate. The apparatus asynchronously samples an analog read signal generating from the optical storage system and subtracts an estimated DC offset from the asynchronous sample values to generate a sequence of asynchronous DC-removed sample values. The asynchronous DC-removed sample values are separately interpolated by two interpolators to generate a sequence of synchronous even-time sample values and a sequence of synchronous odd-time sample values respectively. The synchronous even-time and odd-time sample values are separately equalized by two equalizers in accordance with a target spectrum to generate a sequence of even-time equalized sample values and a sequence of odd-time equalized sample values respectively. A DC offset estimator generates the estimated DC offset from the even-time equalized sample values and the odd-time equalized sample values.

Abstract: An interpolation circuit capable of performing interpolation operation with a simple constitution. A 16-times oversampling from discrete data is performed by D frip-frops 4, 5. A first convolution operation is performed by D frip-frops 4 through 11 and an adder 12, on the result of which a second convolution operation is performed by D frip-frops 13 through 20 and an adder 21. Data interpolated along a quadratic function curve interpolating the discrete data is obtained from the adder 21.

Abstract: Two first delay signals Q30 and Q34 are generated such that edges thereof are delayed by a first delay time Td1 in relation to the rising edge of a clock signal CLK. Two second delay signals Q32 and Q36 are also generated such that edges thereof are delayed by a second delay time Td2 in relation to the trailing edge of the clock signal CLK. A pulse signal Sout is generated as a result of logic operations performed on the first delay signals Q30 and Q34 and the second delayed signals Q32 and Q36.

Abstract: A signal can be detected based on a level slice system and detection delay time can be reduced by setting the recording density of a header field in a linear direction lower (coarse) than that of a user data recording field. Further, a signal can be detected based on the level slice system and detection delay time can be reduced by using a mark position form having a large detection margin as an information recording system of the header field. A readout error of a sector number due to a detection error is compensated for by recording address marks AM for attaining byte synchronization of the header field in both of a head portion and tail portion of information recorded in the header field.

Abstract: In an information reproducing apparatus employing a maximum likelihood decoding method such as Viterbi decoding, there is a problem such that power consumption increases because a maximum likelihood decoding circuit is complicated, and many circuit elements must be used. A clock output control means is provided on a read clock transmission line of a maximum likelihood decoder, and no read clock is supplied to the maximum likelihood decoder in operation modes other than a specific operation mode when an input data is decoded by a Viterbi decoder, and thereby, it is possible to greatly reduce a power consumption. More specifically, in operation modes other than the read mode, the supply of read clock is stopped by the clock output control means based on a control signal from a controller for controlling an operation mode such as decoding or the like.

Abstract: A decoder circuit of the present invention, mounted on an integrated circuit, decodes input voltage Vin supplied to a single external input terminal into three or more control outputs, and an object of the present invention is to reduce the size of a chip. The foregoing decoder circuit includes: a P-type transistor in which an emitter is connected to a power source line of high level, a base is connected to the external input terminal, and a collector is an output terminal of a first control output; and an N-type transistor in which an emitter is connected to a power source line of low level, a base is connected to the external input terminal, and a collector is an output terminal of a second control output, and decodes the control outputs to three or more sets of data by carrying out logic operations.

Abstract: A first signal is read from a first track of a recording medium. A second signal is read from a second track of the recording medium which neighbors the first track. A filter processes the second signal into a filtering-resultant signal according to a controllable filtering characteristic. A first subtracter operates for subtracting the filtering-resultant signal from the first signal to generate a subtraction-resultant signal. A peak detector generates peak-point information representing a timing at which the level represented by the first signal peaks. A temporary decision circuit implements a temporary decision about the subtraction-resultant signal. A second subtracter generates an error signal indicative of a difference between the subtraction-resultant signal and a signal representative of the result of the temporary decision at a timing equal to the timing represented by the peak-point information. The filtering characteristic of the filter is controlled in response to the error signal.

Abstract: An information reproducing device for reproducing digital signals with an optical head from an optical disk includes a first equalizer for waveform-equalizing a reproduction signal, an adaptive learning device for renewing the equalization properties of the first waveform equalizer with an adaptation algorithm, a memory for storing a reproduction signal, a second waveform equalizer that reads signals from the memory and performs waveform equalization after an adaptive learning operation for the first waveform equalizer has been terminated, and a demodulator for demodulating the output of the second waveform equalizer. Thus, adaptive equalization processing can be performed with constantly superior equalization properties and without sacrificing data capacity.

Abstract: In order to stably carry out reproduction of information in an optical disc medium (10) using a PRML (partial-response maximum-likelihood) method for reproducing the signal, the optical disc medium (10) has not only a data recording area (14) where data is recorded at high density but also a system information recording area (16) where information is recorded at low density and binary equalizing/reproducing can be easily made. Information required to circuit setting is recorded in the system information recording area.

Abstract: A digital reproduction signal processor relating to the present invention is provided with an analog/digital converter 4 for sampling an analog reproduction signal at a period which is longer than a digital recording channel rate, to convert to a low rate digital reproduction signal having a period which is longer than a recording channel rate, a coefficient setting unit 6 for performing a digital filtering with keeping the low rate, to generate a digital equalization signal, and an interpolator 7 for interpolating a reproduction data of the digital recording channel rate, and a half-rate Viterbi decoder 8 for taking out data. According to the digital reproduction signal processor constructed as above, even when a digital read channel employing a PRML is employed, the analog/digital converter 4 or a digital circuit operated at a channel rate can be eliminated, thereby to provide a reproduction signal processor operating with low power consumption and of low cost.

Abstract: In a data reproducing apparatus, a monitor edge sample value is generated based on a second sample value at a trailing edge of the reproduction signal and a change amount of the monitor edge sample value is generated as an offset amount in a first processing part. Then, the offset amount is supplied to a second processing part where the second sample value is obtained by sampling the reproduction signal at the trailing edge. Then, the second processing part restores data based on the reproduction signal and the offset amount.

Abstract: A basic data structure in a lead-in area is made coincident with each other in all of a read only type, write once type, and a rewritable type. The lead-in area is divided into a system lead-in area and a data lead-in area. A track pit and a pit pitch of pits in the system lead-in area are made longer than those in the data lead-in area. In the system lead-in area, a reproduction signal from a bit is detected in accordance with a Level Slice technique, and, in the data lead-in area and data area, a signal is detected in accordance with a PRML technique. In this manner, in any of the read only type, write once type, and rewritable type, there can be provided an information recording medium and an information reproducing apparatus or information recording and reproducing apparatus therefor, capable of a stable reproduction signal from a lead-in area of the write once type recording medium while maintaining format compatibility.

Abstract: In a method and apparatus for discriminating a signal from one or more mixed signals, where the mixed signal may include two or more signal components, an interpreting unit generates a plurality of multiplication parameters based on a plurality of inputs that are related to a mixed signal. A finite impulse response (FIR) filter may output a removal-target signal based on the generated multiplication parameters. A subtracting unit may then generate an output signal representing a signal component of the mixed signal by subtracting the removal-target signal from a second signal.