Input Or Output Circuit, Per Se (i.e., Line Interface) Patents (Class 370/359)
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Patent number: 6831916Abstract: A host system is provided with one or more host-fabric adapters installed therein for connecting to a switched fabric of a data network. The host-fabric adapter comprises a micro-controller subsystem configured to establish connections and support data transfers via the switched fabric, and a serial interface which provides an interface with the switched fabric. The micro-controller subsystem includes a Micro-Engine (ME) which executes a ME instruction to send source and destination addresses during a control cycle, and interface logic blocks which supply addressed data from designated sources to the Micro-Engine (ME) at the same time for execution of the ME instruction during a data cycle subsequent to the control cycle.Type: GrantFiled: September 28, 2000Date of Patent: December 14, 2004Inventors: Balaji Parthasarathy, Dominic J. Gasbarro, Tom E. Burton, Brian M. Leitner
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Patent number: 6791977Abstract: An improved reclocker circuit and router cell are provided that are particularly useful when configured into a router matrix comprising a plurality of interconnected router cells. The improved reclocker circuit includes an integral N-to-1 multiplexer (MUX), wherein N is at least three. The improved router cell includes the reclocker/MUX circuit, a switch, and a fan-out circuit. A plurality of ports are coupled to the router cell circuitry, including an input port, an output port, a plurality of expansion input ports, and a plurality of expansion output ports. The improved router cell couples either the input port or one the expansion input ports to its output port, and it also couples the input port to each of the expansion output ports. By using the improved router cells in the design of a router matrix, jitter induced by the reclocker circuits is minimized.Type: GrantFiled: October 17, 2000Date of Patent: September 14, 2004Assignee: Gennum CorporationInventors: Aapoolcoyuz Biman, Atul Krishna Gupta
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Patent number: 6791999Abstract: A system and method for providing dynamic switching functionality in an access network which supports only static switching. Dynamic switching is used to provide connections between a local digital switch and subscribers of the access network wherein the subscribers are connected to remote terminals which only support a static switching protocol. A dynamic switching subsystem is coupled to the local digital switch via a first communication link and coupled to the remote terminals using one or more second communication links. The remote terminals provide nailed up connections between the network terminations of the second communications links coupled to the remote terminals and the subscriber terminations connected to the subscribers. The dynamic switching subsystem provides dynamic switching between network terminations of the first communication link and network terminations of the second communication link.Type: GrantFiled: January 28, 1999Date of Patent: September 14, 2004Assignee: Cisco Technology, Inc.Inventors: Virendra K. Budhraja, Vinod K. Nair
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Patent number: 6788671Abstract: A method and apparatus for managing the flow of data within a switching device is provided. The switching device includes network interface cards connected to a common backplane. Each interface card is configured to support the maximum transfer rate of the backplane by maintaining a “pending” queue to track data that has been received but for which the appropriate routing destination has not yet been determined. The switching device includes a switch controller that maintains a central card/port-to-address table. When an interface card receives data with a destination address that is not known to the interface card, the interface card performs a direct memory access over a bus that is separate from the backplane to read routing data directly from the central table in the switch controller.Type: GrantFiled: March 5, 2002Date of Patent: September 7, 2004Assignee: Nortel Networks LimitedInventors: Randy Ryals, Jeffrey Prince
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Patent number: 6788678Abstract: In accordance with the invention, an interface between an incumbent local exchange carrier's central office terminal and a competitive local exchange carrier's remote terminal is provided by an Integrated Services Digital Network interconnection. Such a connection provides two basic data channels of 64 Kbps each and at least one utility channel. The ISDN signal can be carried over a single wire pair. The interface may be used to interconnect one or two digital channels. The channel units may be designed to remove the robbed bits from the data channels and place them in the utility channels. Further, the utility channel may be employed to transmit frame phasing information so that the networks can synchronize their robbed bit signaling so that both networks use the same bit positions for robbed bit signaling thus minimizing data bandwidth reduction due to robbed bit signaling.Type: GrantFiled: December 3, 1999Date of Patent: September 7, 2004Assignee: Lucent Technologies Inc.Inventors: D. Reagan Rice, Ronald R. Brown, Robert L. Adams, III
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Patent number: 6782336Abstract: A test circuit receives a plurality of internal test signals and delivers a group of the plurality of internal test signals onto a bus during an idle state of the bus. The bus is coupled to output pins so that the group of internal test signals can be used in debugging operations. The test circuit may include a multiplexing circuit that receives the plurality of internal test signals as inputs and that delivers a selected group of the internal test signals as outputs. The test circuit may also include a switch that couples the selected group of the internal test signals onto the bus during an idle state.Type: GrantFiled: September 17, 2001Date of Patent: August 24, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventor: Paras A. Shah
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Publication number: 20040151168Abstract: Embodiments of the invention provide network interface devices and systems and methods for using them. For instance, a system in accordance with certain embodiments of the invention comprises a network interface device adapted to receive a plurality of sets of telecommunication information (telecommunication can include, inter alia, voice signals, Internet Protocol data, audio signals, data representing encoded audio signals, video signals and data representing encoded video signals) and distribute at least one of the plurality to a customer premises. The system can further include a control point operable to transmit configuration information to the network interface device. The configuration information can be operable to configure the behavior of the network interface device with respect to one or more of the information sets.Type: ApplicationFiled: January 31, 2003Publication date: August 5, 2004Applicant: Qwest Communications International Inc (Patent Prosecution)Inventors: Bruce A. Phillips, Kurt A. Campbell, Steven M. Casey, Charles I. Cook, Donald L. Brodigan
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Publication number: 20040151169Abstract: A data interface module for converting a data stream from one format to another format, including a data stream splitting module for receiving an input data stream in a first format and splitting the input data stream into parallel data streams, each of the parallel data streams being output from the data stream splitting module at a slower data rate than the input data stream is received thereby, and a linking module for receiving and recombining the parallel data streams to produce an output data stream in a second format having a higher data rate then the individual parallel data streams. Conveniently, the input data stream may include video data including successive groups of data, each group representing a portion of an image, the data stream splitting module being configured to direct successive groups to a different one of the parallel data streams and the output data stream may be an IEEE 1394.a compliant asynchronous packet stream.Type: ApplicationFiled: February 3, 2003Publication date: August 5, 2004Inventors: Andrew J. Nelson, Simon G. Tardif
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Publication number: 20040136365Abstract: The invention relates to an exchange (12) and a method for controlling an exchange (12) for establishing connections. Said exchange (12) is connected to at least one separately arranged connection unit (14) to which n connection groups (40a, 40b) are connected. The connection between the separately arranged connection unit (14) and the exchange (12) is established by means of transmission interface units (16, 18) of the separately arranged connection unit (14) and the exchange (12). The connection between the transmission interface unit (18) of the exchange (12) and the coupling network (32) of the exchange (12) is established by means of x useful data channels, the sum of the transmission capacities of said x useful data channels being smaller than the sum of the transmission capacities of the useful data channels of all n connection groups (40a, 40b).Type: ApplicationFiled: October 22, 2003Publication date: July 15, 2004Inventors: Herwig Eltschka, Norbert Lobig
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Publication number: 20040125796Abstract: An N-rate, N+1-precedence meter/marker for a data communication switch or router where N is a configurable number which is at least three. The N rates are limit rates which include a high boundary rate, a low boundary rate and at least one intermediate rate. The meter measures the rate of a data stream and assigns one of the N+1 precedences to packets in the data stream based on the measured rate. The marker marks packets based on the assigned one of the N+1 precedences. The data communication switch or router provides packets different levels of assurance based on their marked one of the N+1 precedences. Packets within a data stream operating at above the high boundary rate are assigned and marked with a first precedence. Packets in a data stream operating at below the high boundary rate and above the at least one intermediate rate are assigned and marked with a second precedence which is serviced with a more favorable drop profile than the first precedence.Type: ApplicationFiled: December 30, 2002Publication date: July 1, 2004Inventor: Scot A. Reader
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Patent number: 6751217Abstract: A bit line selector switch is serially connected with a data sink for detecting high speed data transmissions, typically in the gigabit-per-second range, and a backplane having a plurality of data lines. The selector switch incorporates a selector circuit that operates in one of two modes, a first “selected”, or ON, mode and a second “not selected”, or OFF, mode. The selector circuit includes one, preferably differential, input. In one embodiment, a selector switch has a plurality of selector circuits thus allowing the switch to operate in both modes simultaneously. Data coupled to a differential input of the selector circuit will, when operating in the “selected” or ON mode, transmit the data to the data sink which be, for example, a memory device, processor, or the like. In the “not selected” or OFF mode, the selector circuit will pass any data received to a positive supply rail.Type: GrantFiled: October 6, 1999Date of Patent: June 15, 2004Assignee: Nortel Networks LimitedInventors: Anthony D. Brown, Paparao Palacharla
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Publication number: 20040105435Abstract: An SNMP program actuated on a computer successively inquires of network devices about their settings and statuses. Each of the network devices having received such an inquiry returns the status and setting of each port in response to the inquiry from the computer (SNMP program). The computer (SNMP program), every time a reply is returned from a network device, determines whether or not there is any inconsistency between the status and the setting of any port, and sets the network device containing the port to disable the port if a status-setting inconsistency has been detected.Type: ApplicationFiled: June 20, 2003Publication date: June 3, 2004Applicant: ALLIED TELESIS K.K.Inventor: Yoshihide Morioka
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Publication number: 20040100943Abstract: A source process communicates with a sink process by writing messages to a finite queue. The source process determines whether the finite queue is full. If the source process determines that the finite queue is full, the finite queue is emptied and a refresh-all message is written to the finite the queue. When the sink process reads a refresh-all message from the finite queue, the sink process performs a refresh-all operation in which a refresh operation is performed for each member of a set of objects.Type: ApplicationFiled: November 27, 2002Publication date: May 27, 2004Inventor: David J. Kasper
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Patent number: 6731627Abstract: A loop carrier system includes a home local area network having plural telephone modules and a hub coupled to in-home telephone wiring. The telephone modules and the hub communicate voice signals over the in-home wiring in a dedicated frequency band above baseband POTS. The hub converts between voice signals and voice packets and is connected to a network access device for transferring the voice packets from the home local area network to a telecommunications network which routes the voice packets to a gateway. The gateway converts between the voice packets and a circuit format compatible with a local digital voice switch.Type: GrantFiled: November 17, 1999Date of Patent: May 4, 2004Assignee: Cisco Technology, Inc.Inventors: Dev V. Gupta, Subra Dravida, Vikram Saksena, Paiman Nodoushani, Denis Claveloux, Sriram Narayan, Kyung-Yeop Hong, Anthony Monteiro, Wei Ye, David S. Yoon
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Publication number: 20040081119Abstract: The present invention is a method and system for reducing and potentially eliminating the number of packets dropped during 802.11 handoff by an old access point (AP) to a new AP in a wireless local area network (WLAN) which thereby also reduces the impact of retransmission on network throughput. With the present invention, once a mobile station has successfully re-associated with a new AP, the new AP can fetch those packets which arrived at the old AP during handoff and forward them to the mobile station. The method and system of the present invention thus reduces both total packet drop and retransmission impact on network throughput by enabling direct recovery of packets received during handoff by the old AP from the old AP.Type: ApplicationFiled: October 28, 2002Publication date: April 29, 2004Inventors: Zhun Zhong, Marc Portoles, Sunghyun Choi
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Publication number: 20040047346Abstract: A method and apparatus implementing a large telecommunications network. A large Channel Group Switch is connected to a plurality of tandem switches and/or end office switches and toll switches. A route consists of all channel groups interconnecting two specific switches via the Channel Group Switch. Connections between a pair of channel groups in the Channel Group Switch are fixed as long as the pair of channel groups are assigned to the same route. The Channel Group Switch connects all traffic on one channel group to a particular other channel group. As traffic demands change, channel groups are assigned to different routes. In one preferred embodiment, the channel groups are DS-1 Groups of 24 channels each, a sufficiently small number to permit routes to be enlarged or decreased for the benefit of other routes. Advantageously, such an arrangement can be used to interconnect a large number of tandem switches efficiently.Type: ApplicationFiled: July 10, 2002Publication date: March 11, 2004Inventor: James Edward Vandendorpe
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Patent number: 6704308Abstract: An apparatus and method for data processing in a flexible multiple-DSP architecture that can be readily adapted to changing customer demands and changes in DSP processing capability is described. The apparatus comprises of two or more processors, two or more dedicated serial data buses, and a shared data bus. Each processor processes data received via the dedicated data bus in a first type of processing task. Each processor processes data received via the shared data bus in a second type of processing task.Type: GrantFiled: September 29, 1998Date of Patent: March 9, 2004Assignee: Cisco Technology, Inc.Inventors: Kirk Sanders, Madhu Grandhi
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Publication number: 20030223411Abstract: A system provides context-dependent advice and training in an audio or video form to a corresponding consumer-electronic device. Preferably, the device receives the advice and training from a server on the Internet. When the device is not in contact with the Internet, the advice and training are provided from local memory, either within the target device or within a local area network that is in contact with the consumer device. In this context, the advice and training will generally provide information related to connecting to the Internet. To facilitate ease of operation, the advice and training is provided in audio and/or video form, depending upon the rendering capabilities of consumer device, and depending upon the context and/or content of the advice and training information.Type: ApplicationFiled: May 30, 2002Publication date: December 4, 2003Inventor: Ramon de la Fuente
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Patent number: 6650637Abstract: A high capacity digital non-blocking cross-connect switching fabric is realized by employing a multi-port RAM based space-time switch having a plurality of write circuits and a plurality of read circuits, each of which operates at a timing rate that is a prescribed fraction of the input/output clock rate of the input/output ports of the multi-port RAM based cross-connect switching fabric. The at least one multi-port RAM switch unit has a plurality of write circuits and a plurality of read circuits, each of which operates at a timing rate that is a prescribed fraction of the input/output clock rate of the input/output ports of the multi-port RAM based cross-connect switching fabric. Additionally, in one embodiment, each of the write circuits and each of the read circuits has independent and unrestricted access to all data storage positions in each of a plurality of storage units that make up the at least one multi-port RAM switch unit.Type: GrantFiled: December 14, 1998Date of Patent: November 18, 2003Assignee: Lucent Technologies Inc.Inventors: Narendra K. Bansal, Kenneth A. Becker, James S. Lavranchuk
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Patent number: 6636478Abstract: A method and system for configurable and scalable line interface card protection or redundance useful for a range of low speed digital to high speed digital and optical signal types such as STS-1, STS-3, VT1.5, DS-1/T1, DS-3/T3, ATM, ADSL, HDSL, OC-1, OC-3, OC-12, OC-48, OC-192, OC-768, STM-1, STM-4, STM-16, STM-64, E1, E3, J1, J2, and EtherNet and Token Ring LAN signals. A daisy-chain alternate signal path, signal selectors, and alternate front panel entry points are provided to a front-access telecommunications shelf system. Signal interface cards can be designated as primary cards to handle traffic under normal conditions, or as protection cards, without hardware constrained or slot-specific card requirements. Variations of 1:N protection, and multiple groups of 1:N configurations and partitions can be defined without changes to cabling or backplane design variations through setting of relays and signal selectors on each card.Type: GrantFiled: May 3, 2000Date of Patent: October 21, 2003Assignee: Metro Optix, Inc.Inventors: Steven Dale Sensel, David Allen Hamblin, Timothy Albert Carey
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Publication number: 20030193935Abstract: A communications system connected via a bus capable of transferring combinations of control signals and AV signals as packets while providing an environment which is the same as an environment where connections are made using analog signal lines. A register decided by an address is taken to be a virtual plug for each item of equipment. The plug enable for the input plug is set to 1 and a synchronous communication packet for the AV signal from the channel set by the channel number is received. The plug enable for the output plug is set to one and the synchronous communication packet for the information signal is sent to the channel set by the channel number at a transmission speed designated by the DR (Data Rate) at the bandwidth expressed by “Bandwidth”.Type: ApplicationFiled: May 19, 2003Publication date: October 16, 2003Applicant: SONY CORPORATIONInventors: Makoto Sato, Harumi Kawamura, Yuko Iijima, Hisato Shima
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Publication number: 20030169731Abstract: One embodiment relates to a method of switching by a crossbar switch having a plurality of ports. The method includes transmitting data from a transmit port to a first receive port across the crossbar switch, receiving a control message at the transmit port to be sent to a second receive port, suspending the data transmission from the transmit port to the first receive port, transmitting the control message from the transmit port to the second receive port, and resuming the data transmission from the transmit port to the first receive port. Another embodiment relates to a crossbar switching system. The system includes circuitry at a transmit port for providing a data transfer mode and a data suspension mode.Type: ApplicationFiled: March 8, 2002Publication date: September 11, 2003Inventor: John Alan Wickeraad
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Patent number: 6618372Abstract: In a packet switching system-made up of a single or a plurality of switching nodes or local units each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch on the basis of a logic channel on a packet circuit, a self-routing switch for performing switching on the basis of the output port information, and a control unit for terminating a control packet and performing the call processing function, and a switching node or tandem unit including a single or a plurality of self-routing switches for interconnecting the local units, there are provided a device for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating, side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device, operable in the originating-side local unit for information transfer, for insertingType: GrantFiled: June 28, 1999Date of Patent: September 9, 2003Assignee: Hitachi, Ltd.Inventors: Shirou Tanabe, Taihei Suzuki, Shinobu Gohara, Yoshito Sakurai, Kenichi Ohtsuki, Takao Kato, Hiroshi Kuwahara, Eiichi Amada
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Patent number: 6584099Abstract: A communication command system controls communications between equipment having sub-devices for outputting different types of communications. A bus with different channels is connected to the input/output ports of the equipment to send communications back and forth between the equipment. A switch switches the connection between the sub-devices and the bus channels. A command master commands the switch to switch a particular sub-device to a particular bus channel and, in this manner, communications are set up between sub-devices of different equipment.Type: GrantFiled: October 24, 1996Date of Patent: June 24, 2003Assignee: Sony CorporationInventors: Makoto Sato, Harumi Kawamura, Yuko Iijima, Hisato Shima
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Patent number: 6580720Abstract: A multi-interface point-to-point switching system includes a plurality of I/O ports coupled to a plurality of respective devices, a switching fabric that selectively delivers each of a plurality of different signals from a selected one of the I/O ports coupled to a sending one of the devices to another selected one of the I/O ports coupled to a receiving one of the devices, to thereby establish respective connections between the sending and receiving devices, and a controller that determines the latency of all possible signal paths that are presently available for each connection to be established, selects the lowest-latency signal path for each connection that it determines is presently available, and then configures the switching fabric to establish the selected signal path for each connection. According to one aspect of the invention, the switching fabric provides a fixed, low latency signal path for each connection whereby the latency of that connection is deterministic and predictable.Type: GrantFiled: September 18, 1998Date of Patent: June 17, 2003Assignee: The United States of America as represented by the Secretary of the NavyInventors: Harry F. Francis, Thomas F. Cocke, IV, Gary S. Calvert, II, Roland H. Mattoon, Timothy Y. Gorder, Neal E. Moody, Gair D. Brown
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Patent number: 6577624Abstract: A system for controlling a TD-bus connected to telephony devices includes a Versa Module European (VME) bus, a VME slave card connected through the TD-bus to the telephony devices, and a main controller connected through the VME bus to the VME slave card to control the telephony devices. The main controller generates a control command transferred through the VME slave card to the telephony devices. The VME slave card stores the resultant data obtained from controlling the telephony devices, and the main controller controls the TD-bus according to the resultant data.Type: GrantFiled: August 10, 1999Date of Patent: June 10, 2003Assignee: Samsung Electronics Co., Ltd.Inventor: Seung-Wang Lee
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Publication number: 20030091038Abstract: A switch for routing information to one of a first and second outputs, respectively, is provided. The switch includes first and second multi-rail control paths, first and second mutex gates, and first and second demultiplexers. The first and second multi-rail control paths are cross connected into the first and second gates. Outputs of the first and second mutex gates are cross connected into the first and second demultiplexers. First and second data paths input to the first and second demultiplexers, respectively. Data on at least one the first and second data paths is routed to one of the first and second outputs based upon a state of the outputs of the first and second mutex gates.Type: ApplicationFiled: November 9, 2001Publication date: May 15, 2003Inventor: Michael S. Hagedorn
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Publication number: 20030086419Abstract: The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between a semiconductor device (e.g., computer chips like microcontrollers, microprocessors, application specific integrated circuits (ASIC), programmable gate arrays (PGA) and other devices and/or combinations thereof) and the circuitry of a system including the chip. Even more particularly, the present invention relates to a 14-pin microcontroller functional pathway configuration for the interface between the microcontroller and a system in which the microcontroller is embedded to support infrared communications.Type: ApplicationFiled: May 21, 2001Publication date: May 8, 2003Inventors: Mark Palmer, Steven Eric Schlanger
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Patent number: 6553031Abstract: In a communication node apparatus comprising a plurality of line interfaces each having a cache memory with a sub routing table formed therein, and a route management unit having a main routing table, each of the line interfaces is provided with a function of detecting a disconnection flag included in a received packet and deleting an unnecessary routing information entry from the sub routing table, and a function of registering a routing information entry as a high priority entry if a connection establishment flag is set to a received packet when the routing information entry is downloaded from the main routing table to the sub routing table upon reception of the packet.Type: GrantFiled: August 11, 1999Date of Patent: April 22, 2003Assignee: Hitachi, Ltd.Inventors: Ryo Nakamura, Masao Nakayama, Kouichi Asao, Daisuke Okabe
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Patent number: 6546006Abstract: Improved telecommunication apparatus is realized with a structure that is tailored to provide an ID signal to the telecommunication network, which signal uniquely identifies the apparatus. The ID signal can be communicated to the network under control of the apparatus, or polled by the network The apparatus includes a second port through which communication services are provided to a customer, and the ID signal can be sent to that second port as well. The apparatus further includes circuitry for processing signals flowing between the two ports, allowing the characteristics of the signal to change and thereby provide for format conversions, encryption, and other capabilities.Type: GrantFiled: August 31, 2000Date of Patent: April 8, 2003Assignee: Lucent Technologies Inc.Inventor: Alexander Gibson Fraser
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Patent number: 6526451Abstract: A method and device of creating one or more buffer structures in a shared memory that exists between a host and a network device is disclosed. The method includes the step of storing within a block of shared memory an administration block having a base address and a descriptor ring parameter, which includes information relating to a descriptor ring and frame data buffer sizes. The base address of the administration block is written into the network device. An initialization command is then issued from the host to the network device. The network device reads the administration block and shared memory and one or more descriptors are constructed within the network device. Each descriptor points to a frame data buffer within shared memory. The descriptors are then stored.Type: GrantFiled: September 30, 1998Date of Patent: February 25, 2003Assignee: STMicroelectronics, Inc.Inventor: Christian D. Kasper
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Publication number: 20030035418Abstract: The call data and hardware cache for a dial-up access concentrators caches the hardware device setup and the communication connection data created for a call connection for use in the next successively received incoming call. The call data and hardware cache for dial-up access concentrators enables the existing physical hardware connection that comprises the call connection in the dial-up access concentrator, the call processing and call connection resources to remain available for use in the next successively received incoming call. This step also retains the communication connection data comprising the call setup and call management data in the shelf controller and the call processing data in the call signal processor card for possible reuse.Type: ApplicationFiled: June 28, 2001Publication date: February 20, 2003Applicant: Lucent Technologies Inc.Inventor: Michael David Vierling
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Patent number: 6519253Abstract: A line termination unit which supports Integrated Services Digital Network (ISDN) and high speed data (HSD) services such as asymmetric digital subscriber loop (ADSL) or XDSL services to a subcriber over a common two-wire subscriber line. The line termination unit has a line termination circuit that connects to the subscriber line and provides ISDN signals to the line. The line support circuit receives incoming ISDN and HSD signals from the line and transmits outgoing ISDN and HSD signals to the line. The received incoming analog signals are separated into first (ISDN information) signals and second (HSD information) signals. The first signals are converted into third digital signals having a format used for ISDN signals by an associated central office and transmitting the third digital signals to the central office.Type: GrantFiled: February 25, 1999Date of Patent: February 11, 2003Assignee: Lucent Technologies Inc.Inventor: Carl R. Posthuma
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Patent number: 6487203Abstract: A method of transmitting a cell between the ATM layer and the physical layer is provided for the ATM matching system, which includes the physical layer divided into a specified number of uniform physical device groups multiplexly polled by the ATM layer. The method comprises the steps of multiplexly polling the physical device groups by the ATM layer, transmitting an enable signal to the polled device upon receipt of a state signal from the physical layer, transmitting the cell to the physical layer, checking the multiplexed polling of the ATM layer by the physical layer, writing a physical port number into the cell with transmitting a state signal to the ATM layer upon receipt of the multiplexed polling, and transmitting the cell to the ATM layer upon receipt of an enable signal from the ATM layer.Type: GrantFiled: March 24, 1999Date of Patent: November 26, 2002Assignee: Samsung Electronics Co., Ltd.Inventors: Nae-Ho Chung, Seung-Yeop Yang
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Publication number: 20020141396Abstract: An optimal printed circuit board input/output switching system is provided and includes a printed circuit board having multiple input/output ports with communication channels coupling the input/output ports to a switching fabric located thereon. Two printed circuit boards may be connected with a board connector for providing switching between input/output ports of the printed circuit boards in a dual-board switching system. The switching fabrics of each printed circuit board can function as an aggregate switching fabric to provide communication channel switching between the input/output ports of the two printed circuit boards. A dual-board switching system may include a single printed circuit board having the switching fabric located thereon. A board connector facilitates modification of the switching configuration.Type: ApplicationFiled: April 2, 2001Publication date: October 3, 2002Inventor: David Allen Pittman
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Patent number: 6445698Abstract: A two wire DDS Transport System is disclosed wherein digital signals are transported over a single channel between transmission line elements transporting digital data between a Network Service Provider and a Customer's Premises. ISDN U-Interface Transceivers having scaled operating frequencies and data buffers are provided in the transmission line elements, such as an Office Channel Unit (OCU) and a Network Interface Unit (NIU) to increase operating distance.Type: GrantFiled: September 8, 1998Date of Patent: September 3, 2002Assignee: HyperEdge CorporationInventors: Sean Iwasaki, Carl Erite
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Patent number: 6445699Abstract: The invention describes a method and apparatus for processing and generating data using a digital signal processor. An interface unit for the signal processor is provided that reads in and preprocesses the data to be processed and/or data required for processing and/or generating data and supplies the data for pickup by the signal processor. Also, data which the signal processor processes or generates and supplies for pickup are postprocessed and output by the interface unit.Type: GrantFiled: August 25, 1999Date of Patent: September 3, 2002Assignee: Siemens AktiengesellschaftInventor: Pavel Karmazin
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Publication number: 20020097712Abstract: The invention concerns a method and a system for redefinition of the configuration of an interface in a telecommunication system comprising a local exchange, and access node, subscriber ports comprised in said network elements and an interface connecting the subscriber ports of the first network element to the subscriber ports of the second network element. In the method, free subscriber ports are blocked and the configuration of the interface is redefined after all the subscriber ports have been blocked. According to the invention, a connection established or being established via the subscriber port is disconnected before the port is blocked. The system of the invention comprises means for disconnecting a connection established or being established via the subscriber port.Type: ApplicationFiled: November 30, 2001Publication date: July 25, 2002Inventors: Toivo Lallukka, Mika Haapea, Arto Rukajarvi
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Patent number: 6424649Abstract: The invention provides a method and system for operating a switch, in which incoming data cells are converted from parallel to serial for synchronous input to a switch interconnect, converted from serial to parallel for parallel switching, converted from parallel to serial for synchronous output from the switch interconnect, and converted from serial to parallel for output. The switch interconnect and its input and output interfaces are controlled by a single frequency source, so that all serial data communication paths into and out of the switch interconnect are phase synchronized to within one clock cycle. A single frequency source for the switch system is coupled to the input interfaces, to output interfaces, and to the switch interconnect. The input interfaces each include a PLL which synchronizes to the single frequency source once for all serial communication to the switch interconnect.Type: GrantFiled: December 31, 1997Date of Patent: July 23, 2002Assignee: Cisco Technology, Inc.Inventors: Michael Laor, Garry P. Epps
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Patent number: 6414953Abstract: The present invention relates to a cross connect switch which allows different protocols to be used. The switch is made up of two cross point modules, one for transmission and one for reception. I/O blocks corresponding to each station or network interface are connected to the cross point modules. Each I/O block includes four differential pairs. The I/O block permits selective activation for transmission or reception of any of the four pairs. In addition, half duplex control logic is used to implement protocols using a single differential pair for both transmission and reception. Also a token ring interface is included on the I/O blocks in order to allow detection and generation of phantom DC currents necessary for operation with token rings.Type: GrantFiled: December 23, 1996Date of Patent: July 2, 2002Assignee: Tech Laboratories IncorporatedInventors: Francois Lamarche, John Gauthier
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Publication number: 20020080781Abstract: The present invention relates to an arrangement for data transmission in an expandable modular system (200, 400), preferably for point-to-multipoint transmission, formed of a plurality of structurally and electrically connectable modules (210a-210c, 410a-410b), between each module being located databus connectors (220, 420, 225, 425), which under operation allow connection and disconnection of the modules, each databus connector being connected to a driver (250) and a receiver (260) arrangement, each comprising output and input channels, said outputs being connected to said inputs. Thus for each module said arrangement comprises a signal termination arrangement (270, 270′, 270″, 270′″) arranged outside said driver and receiver between said output channels of the driver arrangement (250) and the input channels of the receiver arrangement (260).Type: ApplicationFiled: December 21, 2001Publication date: June 27, 2002Applicant: Telefonaktiebolaget LM Ericsson (publ)Inventor: Morgan Gustavsson
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Patent number: 6411618Abstract: A linecard (175) permits an increased rate connection between a subscriber (15) and a service provider (40) over the PSTN (50) includes an analog interface (152) a digital interface (165) coupled to the digital backplane (170) to the service provider's host server (34), a conversion circuit (258) interspersed between the analog interface (152) and the digital interface (165), and a linecard microcontroller (300) configured to request bandwidth on the backplane (170) A linecard (175) incorporates a codec (250) with a code recognition mechanism (200) to monitor the Pulse Code Modulated (PCM) input from the provider. The code recognition mechanism (200) provides a way to dynamically allocate and deallocate timeslots on the backplane (170).Type: GrantFiled: June 24, 1998Date of Patent: June 25, 2002Assignee: Texas Instruments IncorporatedInventors: Keith L. Quiring, Alan Gatherer
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Publication number: 20020075861Abstract: A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery.Type: ApplicationFiled: December 21, 2001Publication date: June 20, 2002Inventors: Richard T. Behrens, Kent D. Anderson, Alan J. Armstrong, Trent Dudley, Bill R. Foland, Neal Glover, Larry D. King
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Publication number: 20020075860Abstract: A system module is provided for coupling a switch fabric network to I/O resources such as a first disk system and a second disk system. The system module may include a first serverlet, a second serverlet and a first switching device coupled to each of the first serverlet and the second serverlet and to each of the I/O resources such that the first serverlet and the second serverlet share the I/O resources.Type: ApplicationFiled: December 19, 2000Publication date: June 20, 2002Inventor: Gene F. Young
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Patent number: 6393483Abstract: Disclosed is a process for driving a network interface card. The process includes monitoring the status of a plurality of ports connected between a computer and a network. Detecting a failure in one of the plurality of ports connected to the network. Re-assigning data transmitted over the failed one of the plurality of ports to an active port of the plurality of ports selected in a round robin technique. The process further including receiving data over one of the plurality of ports designated as a primary receiving port. Preferably, when the failed one of the plurality of ports is the primary receiving port, the receiving tasks are assigned to a next active port selected in a round robin technique.Type: GrantFiled: June 30, 1997Date of Patent: May 21, 2002Assignee: Adaptec, Inc.Inventors: Faisal Latif, Pramod Sharma, Suleman Saya, Jim J. Kuhfeld
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Publication number: 20020051444Abstract: A plurality of first transistors are connected in series between the first terminal and the second terminal. A plurality of second transistors are connected in series between the first terminal and the third terminal. One end of a resistor is connected to the first terminal, and the other end of the resistor is grounded. Either the first transistor or the second transistor is controlled to be ON A resistance value or the resistor is set at such a value that a difference between a gate voltage of the first or second transistor being ON and a pinch-off voltage or the first or second transistor being ON is set greater than the amplitude of the potential of the first terminal which varies upon reception of a signal flowing to the first terminal.Type: ApplicationFiled: October 25, 2001Publication date: May 2, 2002Applicant: NEC CORPORATIONInventor: Seiji Hamase
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Patent number: 6377574Abstract: A packet switch comprising a plurality of line interfaces each connected to a pair of input and output ATM lines, and a routing unit for transferring packets received from each of said line interfaces to one of the other line interfaces specified by the header information of the packets, wherein each of the line interfaces is configured to convert a group of ATM cells received from the input ATM line selectively into either a first type of packet in which ATM cell headers are excluded or a second type of packet in which ATM cell headers are remained, whereby management cells received from the input ATM line are relayed to said one of the other line interface by inserting said management cell into said second type of packet together with user cells on the same connection.Type: GrantFiled: October 26, 1998Date of Patent: April 23, 2002Assignee: Hitachi, Ltd.Inventor: Noboru Endo
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Patent number: 6359896Abstract: The invention provides techniques for selecting, on a dynamic basis, an interworking function (IWF) that can modify a communication protocol to a particular format required by bridged terminal equipment in a communication system. The IWF can be selected to ensure compatibility between transmission bandwidth, coding and other format parameters of a call and the corresponding parameters of its destination terminal in the system. An IWF in accordance with the invention may be utilized to allow a user to bind to different terminals having different capabilities over the duration of a given call. An IWF in accordance with the invention may also be used to insert additional data, retrieved from a database of the switch, into a reverse portion of the call directed from the destination terminal to the source terminal. The invention can thus be used to ensure that the established bandwidth between the destination terminal and the source terminal is substantially bidirectionally symmetric.Type: GrantFiled: February 27, 1998Date of Patent: March 19, 2002Assignee: Avaya Technology Corp.Inventors: Albert D. Baker, Vincent H. Choy, Venkatesh G. Iyengar, James C. Liu, Eileen P. Rose
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Publication number: 20020027900Abstract: Line interface for coupling a twisted pair telephone line with a communications network. The line interface includes a broadband analog front end for coupling the twisted pair telephone line with the line interface, and a programmable filter for filtering frequency bands to separate transmission channels, the transmission channels located in the communications network, wherein the frequency bands are determined by the programmable filter. In this manner, various services can be provided over the twisted pair telephone line.Type: ApplicationFiled: March 16, 2001Publication date: March 7, 2002Inventors: Gudmundur Hjartarson, Mark Feeley, Jonathan Boocock, Andrew Deczky, Andreas Weirich
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Publication number: 20010053146Abstract: In the inbound direction, a tributary processor (32) includes an SPE encoder/decoder for extracting a synchronous payload envelope (SPE) from an STS-1P signal. A path terminator (62) may extract DS3 signals or a matrix payload envelope (MPE) from the STS-1P SPE. A DS1/DS3 extractor (68) generates DS1 signals from either the DS3 or MPE signals. An MPE mapper (70) creates MPE signals from the DS1 signals. A wideband stage interface (74) converts the MPE signals into matrix transport format (MTF) signals for cross-connection in a wideband center stage matrix (22). In the outbound direction, the wideband stage interface (74) receives MTF signals from the wideband center stage matrix (22) and generates MPE signals therefrom. The MPE signals are sent through the MPE mapper (70) in order to extract DS1 signals. The DS1 signals are converted to DS3 signals or another MPE mapping by the DS1/DS3 extractor (68). The path terminator receives DS3 or MPE signals for conversion into an STS-1P SPE.Type: ApplicationFiled: July 23, 2001Publication date: December 20, 2001Applicant: Alcatel U.S.A., Inc., Delaware corporationInventors: Daniel P. Lyon, Richard Schroder, Gary D. Hanson, E. Lawrence Read, Sharlene C. Lin, Michael J. Hanlon, Stephen A. Deschaine