Adjusting For Phase Or Jitter Patents (Class 370/516)
  • Patent number: 11812312
    Abstract: Wireless devices, networks and methods may operate to have a wireless device cause a base station to trigger voice call continuity handovers responsive to the quality of the cellular radio link in addition to the base station triggering such handovers based on location or mobility. Furthermore, wireless communication devices may also perform monitoring of multiple buffers operating within the wireless communication device and associated with different respective communication layers, in addition to monitoring the quality of the cellular radio link, to perform intelligent dropping/discarding and/or scheduling of packets at the wireless communications device. Any one or more of these features may improve the ability of the wireless communications device to achieve stated Voice over Long Term Evolution (VoLTE) performance benchmarks in the context of the realities of current VoLTE networks.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: November 7, 2023
    Assignee: Apple Inc.
    Inventors: David Boettger, Tarik Tabet, Samy Khay-Ibbat, Farouk Belghoul, Ajoy K. Singh, Thanigaivelu Elangovan, Rafael L. Rivera-Barreto
  • Patent number: 11791921
    Abstract: A synchronization method of a communication network, the synchronization method comprises monitoring a connection state of second communication nodes that are synchronized using a synchronization signal provided through a first communication node to which a synchronization source is connected, determining whether the number of the connected second communication nodes exceeds a reference value according to a result of the monitoring and switching a synchronization mode of at least one second communication node when the number of the second communication nodes exceeds a reference value.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: October 17, 2023
    Assignee: SOLiD, INC.
    Inventors: Donghee Kwon, Hoopyo Hong
  • Patent number: 11595461
    Abstract: A method of identifying a network condition between a pair of network devices, wherein one of the devices comprises a jitter buffer for storing packets received via a network, the method comprising: monitoring a measure of delay in receiving media packets over the network; monitoring a size of the jitter buffer; and identifying a network condition in dependence on a change in the measure of delay and a variation in the size of the jitter buffer.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: February 28, 2023
    Assignee: Imagination Technologies Limited
    Inventors: Venu Annamraju, Kiran Kumar Ravuri, Mallikarjuna Kamarthi
  • Patent number: 11586413
    Abstract: The various implementations described herein include methods and systems for synchronous audio playback. In one aspect, a method is performed at each of a plurality of electronic devices, each having an audio system, an internal clock, processors and memory storing programs for execution by the processors. Each device is configured for two-way communications with a server and associated with a user account. The device receives an identification of a first device as a common clock device that has a first internal clock being designated as a master clock. The device receives a synchronized audio playback command that includes audio data to be output and a future playback time. In response to receiving the audio data, the device determines a synchronized audio playback time. If the determined synchronized audio playback time has not yet occurred, the electronic device outputs the audio data based on the determined synchronized audio playback time.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: February 21, 2023
    Assignee: Google LLC
    Inventors: Kenneth Mackay, Adrian Paul Diaconu, Xiaowei Jiang, Christopher K. Chan
  • Patent number: 11539964
    Abstract: In a method for image transmitting executed in a transmitting device, three data transmitting channels are established, the three data transmitting channels are a first channel, a second channel and a third channel. An image of a video is obtained, and the image is divided into a region of interest and a background region. A first data of the region of interest and a second data of the background region are obtained, and the first data is encoded through fountain coding to obtain a third data. The first data, the second data, and the third data are respectively transmitted through the first channel, the second channel, and the third channel to a receiving device. A network condition is received, and whether the network condition matches a preset condition is determined. When the network condition matches the preset condition, the first data is compensated according to a first preset algorithm.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: December 27, 2022
    Assignee: AMBIT MICROSYSTEMS (SHANGHAI) LTD.
    Inventor: Cheng-Long Lin
  • Patent number: 11408921
    Abstract: A circuit and method for realizing a combined connection of neutral wires or live wires using phase information of the neutral wires and the live wires are provided. The circuit includes a phase detection module. The phase detection module is connected to a power grid via the live wire VL and the neutral wire VN. The phase detection module includes a high-voltage phase detector, a first inverter and a second inverter. The output of the high-voltage phase detector is sequentially connected to the first inverter and the second inverter. The method includes: arranging nodes on the live wire VL and the neutral wire VN of the power grid, respectively; defining the nodes by determining a phase relationship that a high-voltage signal first appears on the live wire VL or the neutral wire VN; and connecting systems to be connected in parallel to the power grid through the nodes.
    Type: Grant
    Filed: September 7, 2020
    Date of Patent: August 9, 2022
    Assignee: SHANGHAI SINCERETEK MICROELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Xuegang Ren
  • Patent number: 11392786
    Abstract: The system receives exemplary time-series sensor signals comprising ground truth versions of signals generated by a monitored system associated with a target use case and a synchronization objective, which specifies a desired tradeoff between synchronization compute cost and synchronization accuracy for the target use case. The system performance-tests multiple synchronization techniques by introducing randomized lag times into the exemplary time-series sensor signals to produce time-shifted time-series sensor signals, and then uses each of the multiple synchronization techniques to synchronize the time-shifted time-series sensor signals across a range of different numbers of time-series sensor signals, and a range of different numbers of observations for each time-series sensor signal. The system uses the synchronization objective to evaluate results of the performance-testing in terms of compute cost and synchronization accuracy.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: July 19, 2022
    Assignee: Oracle International Corporation
    Inventors: Kenny C. Gross, Guang C. Wang
  • Patent number: 11349586
    Abstract: A time providing method includes: by a computer, upon receiving data from a device, estimating a generation time of the data using a reception time of the data and a first delay time of the device previously estimated; providing information indicating the generation time to the data; and transmitting the data provided with the information indicating the generation time to a destination of the data.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: May 31, 2022
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Kojun Koshiji, Naoki Higo, Toshimitsu Tsubaki, Masanao Nakano, Tatsuya Ishihara, Yoshiko Sueda
  • Patent number: 11334378
    Abstract: A method for performance analysis of a software application, by its parallel execution in a cluster of reference servers, includes a first execution involving exchanges of useful data between computational and storage nodes of the cluster of servers executed by an interconnection network according to a predetermined protocol by encapsulating these useful data in messages of predetermined size; a second execution involving the same exchanges of useful data between the same computational and storage nodes of the cluster of servers executed by the same interconnection network according to the same protocol but with a different predetermined message size; an extrapolation of the software application performance comprising a simulation of a variation of a bandwidth of the interconnection network based on the difference in the predetermined size of the messages exchanged during the first and second executions.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: May 17, 2022
    Assignee: BULL SAS
    Inventors: Noureddine Taguelmimt, Stephan Jaure
  • Patent number: 11321821
    Abstract: The present disclosure provides a computer implemented method and system for compensating for cloud cover to allow the build-up of composite, cloud free images of a particular geographic area. The disclosure takes satellite or aerial image data as an input and temporally stacks the images for a particular geographic area, with the most recent image at the top. The time for the composite image to be produced (which may be the present time, or may be a time from the past) is defined as a temporal projection plane. The most recent image prior to or temporally proximate to this plane is analysed to identify any areas obscured by clouds. Cloud free areas of the most recent image are projected onto the temporal projection plane. For the identified obscured areas, older, cloud free images in the stack are projected onto the temporal projection plane to fill the obscured areas. This forms a cloud free composite image at the defined temporal projection plane.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: May 3, 2022
    Assignee: Ordnance Survey Limited
    Inventors: Lynne Allan, Miles Austen
  • Patent number: 11275402
    Abstract: A read clock generation circuit may include a multiplexer selecting one of divided clock signals in response to a selection signal and outputting the selected divided clock signal as a preliminary read clock signal, a detection circuit generating a detection signal for indicating detection timing of a divided clock signal having the fastest second edge after the first edge of a write clock signal, among the divided clock signals, based on a result of a comparison between the phases of the divided clock signals and the phase of the write clock signal, a counter generating the selection signal by counting the detection signal in response to the write clock signal, and a correction circuit outputting, as a read clock signal, a signal from which pulses corresponding to an invalid section have been removed, among the pulses of the preliminary read clock signal, in response to the detection signal.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: March 15, 2022
    Assignee: SK hynix Inc.
    Inventor: Minsoon Hwang
  • Patent number: 11257455
    Abstract: A gate drive circuit and a display panel are provided. The gate drive circuit includes N clock signal lines and a plurality of gate drive units. Each of the gate drive units is connected to at least one of the clock signal lines. Each of the clock signal lines is provided with a capacitance compensation unit, a sum of an area of any one of the clock signal lines and an area of the capacitance compensation unit provided on the same clock signal line is equal to a predetermined area, and N is an integer greater than or equal to 2.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: February 22, 2022
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Jue Xiong, Ilgon Kim, Bin Zhao, Xin Zhang, Jun Zhao
  • Patent number: 11249776
    Abstract: An interrupt signal is provided to a guest operating system. A bus connected module is operationally connected with a plurality of processors via a bus attachment device. The bus attachment device receives an interrupt signal from the bus connected module with an interrupt target ID identifying one of the processors assigned for use by the guest operating system as a target processor for handling the interrupt signal. The bus attachment device checks whether the target processor is running using a running indicator provided by an interrupt table entry stored in a memory operationally connected with the bus attachment device. If the target processor is running, the bus attachment device forwards the interrupt signal to the target processor for handling. A translation of the interrupt target ID to a logical processor ID of the target processor is used to address the target processor directly.
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: February 15, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Marco Kraemer, Christoph Raisch, Bernd Nerz, Donald William Schmidt, Matthias Klein, Sascha Junghans, Peter Dana Driever
  • Patent number: 11190334
    Abstract: A method for processing audio signals in a radio transmitter, includes: receiving an analog audio sample stream and a digital audio sample stream; determining offsets in time between the analog audio stream and the digital audio stream using a normalized cross-correlation of audio envelopes of the analog audio sample stream and the digital audio sample stream; filtering the determined offsets in time to produce filtered offset values; determining an alignment slip adjustment value as a function of the filtered offset values; aligning the analog audio sample stream and the digital audio sample stream using the determined alignment slip adjustment value; and generating a hybrid radio signal for broadcast that includes time-aligned analog audio and digital audio.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: November 30, 2021
    Assignee: Ibiquity Digital Corporation
    Inventors: Brian W. Kroeger, Paul J. Peyla
  • Patent number: 11121790
    Abstract: A bitstream representing an Ethernet frame is received over a physical medium. Encoded Ethernet blocks are recovered from the bitstream. The Ethernet blocks are descrambled and provided to downstream switching logic, intact, without removing the synchronization bits that were added during the encoding process. More particularly, the intact descrambled Ethernet block is divided into smaller-sized data words; the size of the data words being an integer multiple of the size of the Ethernet block.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: September 14, 2021
    Assignee: Arista Networks, Inc.
    Inventors: Callum Hunter, Thomas Dejanovic
  • Patent number: 11079256
    Abstract: A rotary element is equipped with a pattern representing a reflected binary code on at least three bits. A detection circuit is configured to sense the pattern and deliver an incident signal encoded in reflected binary code on at least three bits. The incident signal is converted by a transcoding circuit into an intermediate signal encoded in reflected binary code on two bits. A decoding stage decodes the intermediate signal and outputs at least one clock signal representing the amount of rotation of the rotary element and a direction signal representing the direction of rotation. A processing circuit determines the movement of the rotary element, and has at least one general purpose timer designed to receive the at least one clock signal and direction signal.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: August 3, 2021
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Vincent Onde
  • Patent number: 11032179
    Abstract: Switch fabric in routers require tight characteristics in term of packet loss, fairness in bandwidth allocation and low latency for high-priority traffic. Such attributes have been resolved using specialized switch devices, but with the emergence of Data Center Bridging, the possibility of using commodity Ethernet switches to build switch fabric in routers is considered. Systems and methods are provided for estimating congestion associated with a network path in accordance with the variation in average delay experienced by samples of packets.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: June 8, 2021
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Bochra Boughzala, Mahmoud Mohamed Bahnasy, Halima Elbiaze, Brian Alleyne
  • Patent number: 10998002
    Abstract: A device is disclosed. The device includes a plurality of ports to receive a plurality of audio streams, an audio content control unit configured to modify playback length of an audio content of at least one of the plurality of audio streams according to an input time interval, an audio decoder and a memory buffer coupled to the audio decoder and the audio content control unit. The memory buffer is used by the audio content control unit to buffer at least one of the plurality of audio streams.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: May 4, 2021
    Assignee: NXP B.V.
    Inventor: Sebastian Bohn
  • Patent number: 10951390
    Abstract: A system and method are provided for encoding and decoding multiplexed video signals to de-jitter the content. A first de-jitter operation is performed on incoming signals and a second de-jitter operation is performed on PCR modified outbound packetized signals after sequencing of the packetized signals has been determined. In one case the second de-jitter operation can be performed using a PLL that is based, at least in part, on the output hardware limitations.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: March 16, 2021
    Assignee: ARRIS Enterprises LLC
    Inventors: Jing Yang Chen, Robert S. Nemiroff
  • Patent number: 10904606
    Abstract: Embodiments included herein generally relate to measuring a latency of a playback device. For example, a method includes: determining a first latency of a playback device; determining a second latency of the playback device; comparing the second latency to the first latency to determine whether an event occurred at the playback device; and in response to detecting a latency change between the second latency and the first latency indicating the occurrence of the event, adjusting a timing of a data stream provided to the playback device based on the latency change.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: January 26, 2021
    Assignee: Roku, Inc.
    Inventor: Thomas Richard Henry Dewey
  • Patent number: 10880136
    Abstract: An apparatus and a method for synchronizing a Digital Frequency Shift (DFS) for a signal to be transmitted over a wireless channel are disclosed. For example, the method, by a synchronizer, transmits a DFS trigger to a Digital Front End (DFE) processor and a Local Oscillator (LO) trigger to an LO in a synchronous manner, the method, by the DFE processor, applies a DFS on received data in response to receiving the DFS trigger, the method, by the LO, applies a complementary shift on a carrier signal in response to receiving the LO trigger, the method, by the upconverter, digital-to-analog converts and radio frequency modulates the digital frequency-shifted received data and the complementary-shifted carrier signal. In another example, the method, by the synchronizer, transmits a phase error to a phase error corrector that performs a phase error correction.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: December 29, 2020
    Assignee: Intel IP Corporation
    Inventors: Christian Mayer, Thomas Mayer
  • Patent number: 10856310
    Abstract: Certain aspects of the present disclosure relate to methods and apparatus for applying rules to determine when to retune radio components of a user equipment (UE). Certain aspects of the present disclosure provide a method for wireless communications by a UE. The method includes determining first resources assigned to the UE in a first subframe and second resources assigned to the UE for uplink transmissions in a second subframe. The method further includes determining whether to retune radio frequency (RF) circuitry prior to transmitting in the second subframe based on at least one rule involving an overlap between the first resources and second resources.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: December 1, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Alberto Rico Alvarino, Kapil Bhattad, Peter Gaal
  • Patent number: 10812401
    Abstract: Disclosed is an apparatus and method operative to receive packets of media from a network including a receiver unit operative to receive the packets from the network, a jitter buffer data structure for receiving the packets in an ordered queue, the jitter buffer data structure having a tail into which the packets are input; a plurality of heads defining points in the jitter buffer data structure from which the ordered queue of packets are to be played back, the heads comprise an adjustable actual playback head coupled to an actual playback unit and at least one prototype head, each prototype head having associated therewith a target latency a processor having decision logic operable to determine a cost of achieving the associated target latency for each prototype head, wherein the decision logic compares the costs determined for each prototype head to identify a particular target latency and head location for the actual playback head of the buffer and a playback unit coupled to the processor for actual playba
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: October 20, 2020
    Assignee: Dolby Laboratories Licensing Corporation
    Inventors: Richard J. Cartwright, Hannes Muesch
  • Patent number: 10813066
    Abstract: Embodiments are provided for syncing multiple electronic devices for collective audio playback. According to certain aspects, a master device connects (218) to a slave device via a wireless connection. The master device calculates (224) a network latency via a series of network latency pings with the slave device and sends (225) the network latency to the slave device. Further, the master devices sends (232) a portion of an audio file as well as a timing instruction including a system time to the slave device. The master device initiates (234) playback of the portion of the audio file and the slave devices initiates (236) playback of the portion of the audio file according to the timing instruction and a calculated system clock offset value.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: October 20, 2020
    Assignee: GOOGLE TECHNOLOGY HOLDINGS LLC
    Inventors: Michael J. Daley, Travis Bolinger, Heath O'Neal
  • Patent number: 10749717
    Abstract: A demodulator for pulse-width modulated clock signals is disclosed. In one aspect, the demodulator includes an edge detector configured to detect transitions in a reference clock and output a signal indicative of timing of the detected transitions. The demodulator may also include a modulation detection circuit configured to identify modulation events of at least one pulse-width modulated pulse in the reference clock based on the signal output from the edge detector and output a signal indicative of the at least one pulse-width modulated pulse modulation event being identified. The demodulator may further include a retiming circuit configured to generate an output clock synchronized with the at least one pulse-width modulated pulse modulation event based on the signal output from the modulation detection circuit.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: August 18, 2020
    Assignee: Analog Devices, Inc.
    Inventors: Oscar Sebastian Burbano, Reuben P. Nelson
  • Patent number: 10742532
    Abstract: A network device performs operations comprising: receiving a first plurality of data packets, each data packet of the first plurality of data packets including a checksum value, and storing the checksum values of a subset of the first plurality of data packets along with a first timestamp; providing the first plurality of data packets to a network function (NF); receiving, from the NF, a second plurality of data packets generated by the NF in response to the first plurality of data packets, each data packet of the second plurality of data packets including a checksum value; storing a second timestamp when checksum values of a subset of the second plurality of data packets match the stored checksum values; and generating telemetry data based on the first timestamp and the second timestamp.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: August 11, 2020
    Assignee: Futurewei Technologies, Inc.
    Inventors: Yewei Tang, Ulas Can Kozat, Hang Shi, Yinghua Ye
  • Patent number: 10735323
    Abstract: A service traffic allocation method and apparatus, where first leaf node repeatedly sends a probe packet through each physical link of multiple physical links of the first leaf node coupled to a backbone node, for each physical link, the first leaf node receives a returned response packet through the physical link, where each response packet is returned by a second leaf node after a probe packet that is sent through a physical link arrives at the second leaf node, for each path, the first leaf node calculates a transmission parameter of the path according to multiple response packets received on the path to obtain the transmission parameter of each path, and the first leaf node allocates to-be-transmitted service traffic to the physical links according to the transmission parameter of each path.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: August 4, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wenbin Ju, Xuejun Yao
  • Patent number: 10684815
    Abstract: An interface converter and an operation method of interface converter is provided. The interface converter includes a first media stream receiver, a second media stream transceiver, and a controller. The first media stream receiver is configured to fetch a first media stream for matching a first media stream protocol, wherein the first media stream comprises a link symbol clock and a first audio data with an audio parameter, the first media stream receiver further comprises a buffer having a write indicator and a read indicator for buffering sampled audio data from the first audio data. The second media stream transceiver is coupled to the first media stream receiver, and configured to receive the sampled audio data and a adjusted audio clock for generating a second media stream for matching a second media stream protocol.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: June 16, 2020
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chi-Han Lee, Wen-Chi Lin
  • Patent number: 10649871
    Abstract: A device, including a low-ohmic circuit path; a normal operation circuit path coupled in parallel with the low-ohmic circuit path; and a circuit element configured to select between the low-ohmic circuit path and the normal operation circuit path.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: May 12, 2020
    Assignee: Infineon Technologies AG
    Inventor: Jens Barrenscheen
  • Patent number: 10620660
    Abstract: A method may include obtaining a concurrent application including processes, each including operations, and obtaining an initial hybrid timestamp for an initial operation of a process. The initial hybrid timestamp may include a vector list timestamp including vector clocks, each including a clock value for each of the processes. The method may further include determining a synchronization category for a next operation of the process, and in response to the synchronization category indicating that the next operation does not require inter-process synchronization, generating a next hybrid timestamp for the next operation. The next hybrid timestamp may include a differential timestamp relative to the initial hybrid timestamp.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: April 14, 2020
    Assignee: Oracle International Corporation
    Inventors: Yang Zhao, Nicholas John Allen, Cristina Nicole Cifuentes, Nathan Robert Albert Keynes
  • Patent number: 10536166
    Abstract: Disclosed is a Serializer/Deserializer physical layer circuit (SerDes PHY) for receiving and transmitting data in a half-duplex manner, the SerDes PHY including: a clock multiplication unit including a phase frequency detector (PFD), a charge pump (CP), a low pass filter, a voltage-controlled oscillator (VCO) and a loop divider; a sampling circuit sampling a received signal according to clocks from the VCO in a receive mode; a phase detector (PD) operating according to outputs of the sampling circuit; a multiplexer connecting the PD with the CP and disconnecting the PFD from the CP in the receive mode, and connecting the PFD with the CP and disconnecting the PD from the CP in a transmission mode; a parallel-to-serial converter converting parallel data into serial data according a clock from the VCO in the transmission mode; and a transmission driver outputting a transmission signal according to the serial data in the transmission mode.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: January 14, 2020
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Jian Liu, Chi-Kung Kuan
  • Patent number: 10505833
    Abstract: A mechanism is provided for predicting video engagement from network measurements for a user device connected to a wireless network. Wireless network measurements are retrieved from a wireless network device in the wireless network. The wireless network measurements are related to the user device of a user. It is determined that the user device is engaged in a video streaming session. A computer classifies the video streaming session as one of a plurality of classes, in which the plurality of classes predict an outcome of the video streaming session for the user device.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: December 10, 2019
    Assignee: AT&T INTELLECTUAL PROPERTY I, L.P.
    Inventors: Jeffrey Pang, Jeffrey Erman, Lusheng Ji, Jia Wang
  • Patent number: 10496126
    Abstract: A memory system in which a timing drift that would occur in distribution of a first timing signal for data transport in a memory device is determined by measuring the actual phase delays occurring in a second timing signal that has a frequency lower than that of the first timing signal and is distributed in one or more circuits mimicking the drift characteristics of at least a portion of distribution of the first timing signal. The actual phase delays are determined in the memory device and provided to a memory controller so that the phases of the timing signals used for data transport may be adjusted based on the determined timing drift.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: December 3, 2019
    Assignee: Rambus Inc.
    Inventors: Jun Kim, Pak Shing Chau, Wayne S. Richardson
  • Patent number: 10476776
    Abstract: A method for wide bus pattern matching includes, receiving, in a first clock cycle, a bus width of data from a data bus. The method further includes using pattern compare blocks to compare each n-bit portion of data from the data bus to a plurality of different n-bit pattern portions, n being an integer equal to a smallest boundary in which a pattern can start on the data bus. The method further includes detecting, using a plurality of diagonal detectors, matching pattern portions across the pattern compare blocks that are arranged in a diagonal. The method further includes detecting, using a packet boundary detector, when the matching pattern portions arranged in a diagonal indicate a matching pattern that falls within a set of packet boundaries. The method further includes indicating a positive match when the packet boundary detector indicates that the matching.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: November 12, 2019
    Assignee: Keysight Technologies, Inc.
    Inventors: Gerald Raymond Pepper, Marie Stanek Wyszynski
  • Patent number: 10469172
    Abstract: A transceiver comprises: a sampling phase optimization stage comprising: a first interpolator; a first equalizer coupled to the first interpolator; a first optimizer coupled to the first equalizer; and an output; and an equalization stage coupled to the output and comprising: a buffer; a second interpolator coupled to the buffer; and a second equalizer coupled to the second interpolator. A method comprising: receiving an optical burst signal; determining an optimum sampling phase based on a portion of a digital signal representing the optical burst signal; and equalizing all of the digital signal using the optimum sampling phase.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: November 5, 2019
    Assignee: Futurewei Technologies, Inc.
    Inventors: Xiang Liu, Frank Effenberger, Huaiyu Zeng, Shuchang Yao, Lei Zhou, Xianbo Dai, Shengming Ma, Lin Huang
  • Patent number: 10469242
    Abstract: A reset sub-circuit can sample the reset signal based on a low-speed clock reference signal to generate a series of sampled reset signals. A phase relation between a first selected one of the series of sampled reset signals and the high-speed clock signal at the clock input of each sampler can be measured to generate reset trigger signals corresponding to each of a plurality of samplers. A second selected one of the series of sampled reset signals can be sampled based on the high-speed clock signal to generate a positive sampled reset signal and a negative sampled reset signal. The reset sub-circuit can select between the positive sampled reset signal and the negative sampled reset signal based on the reset trigger signals corresponding to each sampler to generate the synchronous reset signal.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: November 5, 2019
    Assignee: MACOM TECHNOLOGY SOLUTIONS HOLDING, INC.
    Inventors: Yanfei Chen, Hiva Hedayati
  • Patent number: 10455350
    Abstract: A method of determining a reference clock in a mesh network includes receiving multiple signals, correlating the multiple signals with a local signal generated by the first node to determine a coarse set of time differences, refining the coarse set of time differences using a phase of a carrier signal of the multiple signals to produce a refined set of time differences, and using the refined set of time differences to define a reference clock.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: October 22, 2019
    Assignee: ZaiNar, Inc.
    Inventors: Philip A. Kratz, Daniel Jacker
  • Patent number: 10454811
    Abstract: An apparatus includes de-jitter buffer control circuitry configured to determine an arrival delay value based on previously received audio packets, to identify a receive time of a first audio packet of a talk spurt, to determine an offset value of the first audio packet based on the receive time and the arrival delay value, and to adjust a target delay value associated with a de-jitter buffer based on the offset value. The apparatus also includes a de-jitter buffer configured to buffer the first audio packet based on the adjusted target delay value.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: October 22, 2019
    Assignee: Qualcomm Incorporated
    Inventors: Tien-Hsin Lee, Matthew Zivney, Manjunatha Kantharaju, Shankar Ganesh Lakshmanaswamy, Kirankumar Bhoja Anchan, Vasudev Nayak
  • Patent number: 10447337
    Abstract: Systems and methods providing improved duplexer isolation are disclosed. In one embodiment, a system having improved duplexer isolation includes a duplexer system and one or more digital filters. The duplexer system includes a first transmit port, a second transmit port, a receive port, and an antenna port. The duplexer system is configured to receive a first transmit signal at the first transmit port and a second transmit signal at the second transmit port, where the first and second transmit signals are balanced transmit signals. The duplexer system is configured to combine the first and second transmit signals at the antenna port. The one or more digital filters are configured to cause destructive combining of transmit leakage signals at the receive port. As a result, the isolation of the duplexer system is substantially improved.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: October 15, 2019
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Mark Wyville
  • Patent number: 10437942
    Abstract: In one embodiment, a Kalman filter based capacity forecasting method includes acquiring a capacity time sequence of an object to be forecasted; establishing a dynamical model for the capacity time sequence, and extracting a state transition parameter and a process noise parameter of the dynamical model; performing Kalman filter estimation on the capacity time sequence by using the state transition parameter and the process noise parameter to generate at least one state characteristic signal; segmenting the capacity time sequence according to the at least one state characteristic signal, and determining at least one corresponding segmentation point; and forecasting the capacity at future time according to the at least one segmentation point determined in the capacity time sequence. By adopting the technical solutions of the invention, accurate forecasting of the capacity growth is achieved, to facilitate operation and maintenance personnel making a reasonable capacity expansion plan.
    Type: Grant
    Filed: September 7, 2015
    Date of Patent: October 8, 2019
    Assignee: Baidu Online Network Technology (Beijing) Co. Ltd.
    Inventors: Beibei Miao, Yu Chen, Xuebo Jin, Xianping Qu, Shimin Tao, Zhi Zang, Bo Wang
  • Patent number: 10412779
    Abstract: Techniques to dynamically configure jitter buffer sizing are described. In one embodiment, an apparatus may comprise a streaming component operative to perform a streaming network connection for a media stream; a media playback component operative to playback the media stream; and a media buffer component operative to maintain a jitter buffer for a streaming network connection on a client device; generate a media frame distribution based on at least one of media frame retrieval from the jitter buffer by the media playback component and media frame addition to the jitter buffer by the streaming component; determine a jitter buffer target size based on the media frame distribution; and apply the jitter buffer target size to the maintaining of the jitter buffer for the streaming network connection. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: September 10, 2019
    Assignee: WHATSAPP INC.
    Inventor: Manpreet Singh
  • Patent number: 10382245
    Abstract: A method for compressing IQ measurement data obtained from a signal is described. Within the IQ measurement data, at least one block of IQ data is determined where redundancy of the respective data can be exploited. The IQ data of the at least one block is transformed into a transform domain where redundancy of the respective data can be exploited. Transform coefficients obtained in the transform domain are determined and assessed with regard to a pre-defined criteria so as to determine whether the transform coefficients comprise significant information. Only the IQ data assigned to transform coefficients having significant information is stored along with indices in the transform domain indicating where the respective transform coefficients occur in the transform domain.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: August 13, 2019
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Luke Cirillo
  • Patent number: 10382155
    Abstract: In a telecommunications network including at least a user device and a network node separated by at least a packet-switched part of the telecommunications network, the user device including a primary jitter buffer having a constant packet play-out rate, the network node including a secondary jitter buffer, incoming packets destined for the user device are received and passed through the secondary jitter buffer of the network node downstream towards the primary jitter buffer of the user device. The departure times of packets passing through the secondary jitter buffer of the network node downstream towards the primary jitter buffer of the user device are monitored. On the basis of the monitoring and one or more known characteristics of the primary jitter buffer, an estimate of a current state of the primary jitter buffer is maintained. Operation of the secondary jitter buffer is dynamically controlled according to the maintained estimate.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: August 13, 2019
    Assignee: Metaswitch Networks Ltd
    Inventor: Colin Tregenza Dancer
  • Patent number: 10374928
    Abstract: Techniques for efficient bandwidth estimation are described herein. In some cases, the bandwidth estimation techniques disclosed herein may, for example, calculate bandwidth based on multiple packet groups transmitted at different times. Additionally, in some cases, the bandwidth estimation techniques disclosed herein may, for example, capture cross traffic and its effects on bandwidth. Furthermore, in some cases, the bandwidth estimation techniques disclosed herein may, for example, employ dynamic self-correcting techniques for more reliable estimates.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: August 6, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Mark Julio Kalman, Bin Wang, Yon-Seo Kim
  • Patent number: 10373674
    Abstract: Apparatuses and methods for data transmission offset values in burst transmissions. An example apparatus may include offset logic configured to provide offset values associated with a receiver circuit of a memory device coupled to a signal line. The offset values are based on individual transition threshold voltages biases of sample circuits of the receiver circuit. The example apparatus may further include an input/output (I/O) circuit comprising a driver circuit. The driver circuit configured to receive a logic signal and the offset values and to provide an output signal to the signal line based on the logic signal and to adjust voltages of the output signal based on the offset values.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: August 6, 2019
    Assignee: Micron Technology, Inc.
    Inventor: Wolfgang A. Spirkl
  • Patent number: 10355929
    Abstract: A computer-implemented method is provided for a network controller to implement an update on network elements with minimal disruption. The network controller receives a request to install the update on a number of network elements in one or more networks. Installing the update in each respective network element removes it from operation for an outage duration of time. The network controller determines how network flows will be distributed in the networks due to the outage from installing the update, and generates an update plan that includes timing for installing the update on each network element. The timing is based on how the network flows will be distributed in the networks. The network controller installs the update in each network element according to the timing of the update plan.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: July 16, 2019
    Assignee: Cisco Technology, Inc.
    Inventors: Jay K. Johnston, David C. White, Jr., Magnus Mortensen
  • Patent number: 10313100
    Abstract: The present invention relates to a method and an apparatus for automatic skew compensation. The apparatus according to the present invention comprises: a skew compensating part configured to receive a high speed data signal and output a plurality of delay data signals having different delay times; a start code detecting part configured to detect a start code from the plurality of delay data signals; and a control part configured to determine a skew delay time depending on signal reception quality which is determined on the basis of the number of start codes normally detected for each different delay time. The apparatus may further comprise a packet start detecting part configured to receive an LP signal separated from an MIPI D-PHY and count the number of received packets.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: June 4, 2019
    Assignee: ISMEDIA CO., LTD.
    Inventor: Sung-Oh Yim
  • Patent number: 10291944
    Abstract: The present disclosure is related to transmitting and receiving media channels, such as audio and video channels. These channels may be transmitted as packets from one or more transmitting devices to one or more receiving devices for playout. Certain embodiments of the present disclosure include systems, methods, and computer-readable media for determining latency of a data network for synchronized playout of received signals. Additionally, certain embodiments of the present disclosure include a systems, methods, and computer-readable media for synchronizing playout among devices connected to a data network.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: May 14, 2019
    Assignee: Audinate Pty Limited
    Inventors: Andrew White, Aidan Williams
  • Patent number: 10193779
    Abstract: An operation method of a server in a communication system, an operation method of an electronic device, the server, and the electronic device are provided. The operation method of the server includes determining a variation type of a buffering delay based on a packet transmission delay of a terminal, determining control information for controlling an uplink transmission rate of the terminal according to the variation type, and transmitting the control information.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: January 29, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seongryong Kang, Jonghyune Kim, Dongjin Lee, Jungah Choi
  • Patent number: 10192610
    Abstract: A memory controller receives data and phase-providing signals from a memory device. The phase-providing signal is not a clock signal, but is used by the memory controller to phase align a local data-sampling signal with the incoming data. The memory controller samples the data signal with the data-sampling signal. The memory controller can perform maintenance operations to update the phase relationship between the phase-providing and data-sampling signals.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: January 29, 2019
    Assignee: Rambus Inc.
    Inventors: Scott C. Best, Richard E. Warmke, David B. Roberts, Frank Lambrecht