Abstract: A receiver and a method for equalizing signals, the method includes: receiving input signals; sampling the input signals to provide oversampled samples; processing the oversampled samples to provide symbol spaced samples and to provide fractionally spaced samples that represent the oversampled samples; calculating taps of a fractionally spaced equalizer based on the symbol spaced samples; feeding the taps to the fractionally spaced equalizer; and filtering the fractionally spaced samples by the fractionally spaced equalizer to provide equalized samples.

Abstract: Various embodiments described herein are directed to methods and systems for blind mode adaptive equalizer system to recover complex valued data symbols from the signal transmitted over time-varying dispersive diversity wireless channels. For example, various embodiments may utilize an architecture comprised of a bank of estimation units, a normalizing gain estimator, a DSP unit and a feedback shift register providing the equalizer feedback state vector. The estimation unit may be further comprised of a multiplicity of adaptive algorithms providing various filtered estimates of the data symbol to the DSP unit or providing the joint estimate of the transmitted data symbol.

Abstract: An OFDM receiver for processing an OFDM received signal to perform OFDM reception in presence of Doppler effects is provided. The receiver has at least two parallel processing chains, each processing chain has a time domain windowing for processing an OFDM block. The processing consisting of the multiplication, element by element of the OFDM block, by a set of predetermined coefficients. The receiver also has a DFT block (such as FFT) for demodulating said windowed OFDM symbol into the frequency domain equivalent wherein the windowings of the at least two parallel processing chains have complementary profiles so as to avoid any loss of information throughout the OFDM sample. The invention also provides a process to be used in an OFDM receiver.

Abstract: A method, receiver and program for equalizing digital samples of a radio signal received over a wireless communications channel. The method comprises: receiving digital samples of the radio signal; calculating equalizer coefficients in the frequency domain; transforming the equalizer coefficients from the frequency domain to the time domain; and equalizing the digital samples in the time domain using the transformed time domain equalizer coefficients.

Abstract: Equalization techniques are provided for high-speed data communications and, more specifically, DFE (decision feedback equalizer) circuits and methods are provided which implement a high-order continuous time filter in a DFE feedback path to emulate structured elements of a channel response.

Abstract: An OFDM communication system performs time domain channel estimation responsive to received symbols before the symbols are processed by a fast Fourier transform. The communication system generates virtual pilots from actual pilots to improve the stability and quality of channel estimation. The system generates a reference signal from the actual and virtual pilots and correlates the resulting reference signal with a signal responsive to the received symbol to generate an initial channel impulse response (CIR) and to determine statistics about the channel. In some circumstances, the resulting reference signal is correlated with a modified symbol in which the actual and virtual pilot locations are emphasized and the data locations are deemphasized. Time domain channel estimation iteratively improves on the initial CIR. The system determines channel estimates for data only symbols through averaging such as interpolation.

Abstract: A receiver may be operable to generate estimates of transmitted symbols using a sequence estimation process that may incorporate a non-linear model. The non-linear model may be adapted by the receiver based on particular communication information that may be indicative of non-linearity experienced by the transmitted symbols. The receiver may generate a reconstructed signal from the estimates of the transmitted symbols. The receiver may adapt the non-linear model based on values of an error signal generated from the reconstructed signal, and the values of the error signal may be generated from a portion of the generated estimates that may correspond to known symbols and/or information symbols. The values of the error signal corresponding to the known symbols may be given more weight in an adaptation algorithm, and the values of the error signal corresponding to the information symbols may be given less weight in the adaptation algorithm.

Abstract: The disclosed embodiments relate to the design of a linear equalizer that supports low-power, high-speed data transfers. In some embodiments, this linear equalizer contains a passive network that provides selective frequency peaking in a frequency range associated with a falling edge of a frequency response of the channel. It also includes a level shifter coupled between the channel and the passive network, wherein the level shifter is an active component that provides amplification and/or level-shifting. Moreover, the linear equalizer is designed so that power from the level shifter facilitates the selective frequency peaking of the passive network.

Abstract: A data equalizing circuit includes an equalizer configured to output data according to a control code; and a detection unit configured to divide the data into N number of calculation periods, count data transition frequencies for the N calculation periods, calculate dispersion values of the data transition frequencies for the N calculation periods, and output the control code corresponding to a largest dispersion value, in response to a counting interruption signal and a counting completion signal, wherein n is equal to or greater than 2, N is greater than n, and the data is divided to n number of unit intervals (UI), and wherein a phase shift of each of the calculation periods with respect to its corresponding UI is different from a phase shift of any of the other calculation periods with respect to its corresponding UI.

Abstract: An equalizer and a related equalizing method for equalizing signal reflection caused by a stub at a transmitting end are provided. The equalizer includes a summing device and a delay device. The summing device is utilized for adding a feedback delay signal to the input signal to generate the equalized signal. The delay device is coupled to the summing device, and utilized for delaying the equalized signal to generate the feedback delay signal. Wherein the delay device has a variable delay time and the variable delay time is a non-integer multiple of a bit time of the input signal.

Abstract: A receiving apparatus in a wireless communication system is provided. The receiving apparatus includes a first interference cancellation unit configured to cancel interference from a received signal that is received through an antenna according to a first scheme, a second interference cancellation unit configured to cancel interference from the received signal that is received through the antenna according to a second scheme, and a combination unit configured to combine the signal from which interference is cancelled according to the first scheme and the signal from which interference is cancelled according to the second scheme.

Abstract: Embodiments of methods, apparatuses and systems for transceiver processing are disclosed. One method includes a transceiver receiving a data stream from a link partner transceiver. A link parameter of a link between the transceiver and the link partner transceiver is determined. Allocation of transceiver processing between high-latency processing and low-latency processing is based at least in part on the link parameter.

Abstract: A BIIR system includes a first delay line for receiving at least one input data sample and generating delayed input samples as a function of the input data sample. The BIIR system further includes a second delay line including multiple delay elements connected in series for generating delayed output samples. An input of one of the delay elements receives at least one output data sample of the BIIR system. A summation element in the BIIR system generates the output data sample of the BIIR system as a function of an addition of at least first and second signals and a subtraction of at least a third signal. The third signal includes a first delayed output sample generated by the second delay line multiplied by a first prescribed value. The first delayed output sample and the output data sample are temporally nonadjacent to one another.

Abstract: An equalization device is arranged for equalizing a received signal, wherein the received signal may include a primary signal and at least one interference signal. The equalization device may include a transformation module, a serial-to-parallel converter, and an equalization module, wherein the transformation module may include a predictive decision feed-back equalizer, a first feed-back filter and an adder. The transformation module is arranged for generating a transformation signal according to the primary signal and the at least one interference signal of the received signal, wherein the transformation signal includes a transformed primary signal and at least one transformed interference signal. The serial-to-parallel converter is arranged for respectively converting the transformed primary signal and the transformed interference signal into a plurality of transformation signal sequences.

Abstract: A technique for a reconditioning equalizer filter for non-constant envelope signals is described. The input to a transmitter chain is modified by a reconditioning equalizer filter, prior to being applied to the transmitter. The reconditioning equalizer filter modifies and smoothens the amplitude of the signal. The modified and smoothened signal has its peaks reduced which results in lower Crest Factor. The input to the reconditioning equalizer filter could be a baseband, intermediate frequency (IF) or radio frequency (RF) signal. When the signal is an IF or RF signal, it needs to be down-converted to baseband before being applied to the reconditioning equalizer filter. The reconditioning equalizer filter could be performed in a digital or analog domain.

Abstract: A multi-standard receiver may comprise in an electronic device, receiving an input radio frequency (RF) signal comprising at least two RF signals of different communication standards. The input RF signal may be separated into two signals based on their different communication standard sand configurable gain levels may be applied to equalize their magnitudes. The amplified signals may be combined, and the combined signals may be converted to a digital signal. The configurable gain may be applied to the two signals using variable gain amplifiers. A null may be generated at the input of at least one of the variable gain amplifiers utilizing a mixer and a filter, both configured to a desired frequency. The desired frequency may correspond to an interferer signal. The input RF signal may be separated into two signals utilizing a diplexer. The input RF signal may be received from a wired connection and/or an antenna.

Abstract: The present invention is provided with: a CIR generating unit which generates an channel impulse response from a received signal; a CIR variation detection unit which uses a plurality of channel impulse responses generated from a plurality of different sections of the received signal by the CIR generating unit to detect an amount of variation in the channel impulse response; an equivalent width control unit which determines an equivalent width corresponding to a signal length used in equalization of the received signal such that the equivalent width is shortened as the amount of variation in the channel impulse response increases; and a waveform equalization unit which uses the channel impulse response generated by the CIR generating unit to equalize the received signal over the equivalent width determined by the equivalent width control unit and generate a demodulated signal.

Abstract: A wireless reception system includes a reception module, a preliminary estimation module, an equalization module and a selection module. The reception module receives a reference signal and at least one input signal transmitted via a multipath environment. The reference signal is associated with a known signal unaffected by the multipath environment. The preliminary estimation module generates a plurality of candidate channel effects according to the at least one input signal. The equalization module performs equalization on the reference signal according to the candidate channel effects to generate a plurality of equalization results. From the equalization results, the selection module selects an optimal equalization result that is most similar to the known signal, and selects the candidate channel effect corresponding to the optimal equalization result to represent the multipath environment.

Abstract: An apparatus having a transmitter is disclosed. The transmitter generally has a filter coupled to a communication channel. The transmitter may be configured to adjust the filter using information based on an estimate of one or more characteristics of the communication channel.

Abstract: Various systems and methods are described for performing fractionally spaced time domain equalization (TEQ). One embodiment is a method implemented in a communication system for training a fractionally spaced time domain equalizer (TEQ). The method comprises performing an initialization phase, averaging a received signal in the system to reduce effects of noise in a channel, determining a channel estimate, and aligning an ideal reference signal with the received signal. The method further comprises updating a target response filter according to a non-integer multiple of a base sampling rate, determining an adaptation error based on useful information both inside and outside a Nyquist band of the TEQ, and updating the TEQ according to the adaptation error.

Abstract: An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer using signal levels in sequences to represent different frequencies.

Abstract: One embodiment relates to an equalizer circuit for a data link. The equalizer circuit including a continuous-time linear equalizer, a first circuit loop, and a second circuit loop. The continuous-time linear equalizer receives a received signal and outputs an equalized signal. The first circuit loop determines a first average signal amplitude. The first average signal amplitude may be an average signal amplitude of the equalized signal. The second circuit loop a second average signal amplitude. The second average signal amplitude may be an average signal amplitude of a high-frequency portion of the equalized signal. Other embodiments and features are also disclosed.

Abstract: Circuits and methods are provided for efficient feed-forward equalization when sample-and-hold circuitry is employed to generate n time-delayed versions of an input data signal to be equalized. To equalize the input data signal, m data signals are input to m feed-forward equalization (FFE) taps of a current-integrating summer circuit, wherein each of the m data signals corresponds to one of the n time-delayed versions of the input data signal. A capacitance is precharged to a precharge level during a reset period of the current-integrating summer circuit. An output current is generated by each of the m FFE taps during an integration period of the current-integrating summer circuit, wherein the output currents from the m FFE taps collectively charge or discharge the capacitance during the integration period. A gating control signal is applied to an FFE tap during the integration period to disable the FFE tap during a portion of the integration period in which the data signal input to the FFE tap is invalid.

Abstract: A communication receiver including a time domain receive filter to provide a filtered output, the filtered output including colored noise. The receiver also includes a frequency domain, fractionally-spaced equalizer (FSE) unit to receive the filtered output from the receive filter. The FSE unit determines a separate weighting factor for each subcarrier, and the weighting factor is determined based on a noise variance of the subcarrier.

Abstract: Equalization circuitry for receiving a digital data signal includes both feed-forward equalizer (“FFE”) circuitry and decision-feedback equalizer (“DFE”) circuitry. The FFE circuitry may be used to give the DFE circuitry a signal that is at least minimally adequate for proper start-up of the DFE circuitry. Thereafter, more of the burden of the equalization task may be shifted from the FFE circuitry to the DFE circuitry.

Abstract: Described embodiments receive a signal by a set of fixed taps and a set of floating taps of a receiver, each tap corresponding to a detected symbol. Each of the floating taps is stored in a corresponding shift register to account for process, operating voltage and temperature (PVT) variations of the receiver without calibration of delay elements. Multiplexing logic selects (i) corresponding floating taps for equalization by coupling selected floating taps to the outputs of the fixed taps, and (ii) different phases of each possible floating tap position. The multiplexing logic prunes and/or amalgamates the phases of each possible floating tap position and selects floating taps based on a magnitude of each phase. A combiner adjusts each output value of the fixed taps and the selected floating taps by a corresponding tap-weight, combines the adjusted values into an output signal and subtracts the output signal from the input signal.

Abstract: Disclosed are a receiving equalization device and a method thereof, the receiving equalization device including a subtracter to output a first output signal, an eye monitor block to obtain a sampling timing by using the output first signal, and a slicer to generate a sampling signal by sampling the first output signal based on the sampling timing, and to return the generated sampling signal to the subtracter via a feedback filter or an algorithm determining block.

Abstract: Circuitry for use in a receiver may comprise: a front-end circuit operable to receive an orthogonal frequency division multiplexing (OFDM) symbol on a first number of physical subcarriers. The circuitry may comprise a decoding circuit operable to decode the OFDM symbol using an inter-carrier interference (ICI) model, the decoding resulting in a determination of a sequence of symbols, comprising a second number of symbols, that most-likely correspond to the received OFDM symbol, where the second number is greater than the first number. The sequence of symbols may comprise N-QAM symbols, N being an integer. The ISCI model may be based, at least in part, on non-linearity experienced by the OFDM symbol during transmission by a transmitter, propagation over a channel, and/or reception by the receiver. The ISCI model may be based, at least in part, on phase-noise introduced to the OFDM symbol during transmission by a transmitter, propagation over a channel, and/or reception by the receiver.

Abstract: An equalizer configured to receive a data signal from a channel. The detector is coupled to the equalizer, and a calibration unit is coupled with the equalizer and the detector. The calibration unit is configured to jointly calibrate the equalizer and the detector using a metric subject to an entropy-preserving equalizer constraint.

Abstract: An equalizer includes a sampler configured to sample an edge and data of an input signal or an induced signal obtained from the input signal, a clock generator configured to generate an edge clock used to decide sampling timing of the edge and a data clock used to decide sampling timing of the data based on the sampled edge and the sampled data, and a controller configured to control the sampling timing of the edge and the sampling timing of the data based on the sampled edge and the sampled data.

Abstract: A method for equalizing a received radio signal in a WCDMA system, comprises receiving (210), in a radio receiver, of a digital radio signal spread by scrambling codes. A channel estimation is performed (230) on the received digital radio signal for a plurality of channels. The received digital radio signal is in an equalizer equalized (240) into an equalized digital radio signal. This equalizing is performed by combining a plurality of part signals, deduced from the digital radio signal, with a respective delay and a respective combining weight. The equalizing (240) comprises provision of the combining weights based on a signal impairment matrix having elements compensated for systematic colouring caused by said scrambling codes.

Abstract: A wireless communication apparatus includes a wireless section configured to receive a plurality of signals via a plurality of antennae from a transmitting device having another plurality of antennae; and a demodulation section configured to apply QR decomposition to a channel matrix generated based on the received signals from the wireless section, to extract a plurality of weight coefficients corresponding to a symbol to be demodulated from a unitary matrix Q, to filter the received signals weighted with the weight coefficients, and to separate the filtered received signals based on a submatrix of an upper triangular matrix R.

Abstract: The present invention is directed to a decision feedback equalizer that implements a multipath delay calculator to determine the delay between a line-of-sight component of a received data signal and a reflection of the line-of-sight component. The determined delay is used to control when decisions are used within the decision feedback equalizer so that the appropriate decisions are delayed until the reflection is received. In this way, the reflection can be substantially removed from the data signal using decisions that were generated when the line-of-sight component was received. Because the correction window is limited to the time when the reflection is received, the number of taps required to perform equalization is greatly reduced resulting in a decision feedback equalizer with less circuitry or logic.

Abstract: Certain aspects of the present disclosure relate to a method for equalizing a pulse signal corrupted by a noise and by various channel effects for obtaining a signal based on the periodic-sinc pulse, which is suitable for Finite Rate of Innovation (FRI) processing applied at a receiver of a pulse-based communication system (e.g., an Ultra-Wideband receiver).

Abstract: A multi-phase partial response equalizer is disclosed. The equalizer includes receiver circuitry to receive a data symbol over N bit intervals and to generate N sets of samples in response to N clock signals having different phases. A first storage stage is provided, including storage elements to store the sets of samples during a common clock interval. First and second selection circuits are respectively coupled to an input and an output of the first storage stage. An output storage stage is coupled to the second selection circuit to store an output sample. The first and second selection circuits, over multiple clock intervals, cooperatively select the output sample from one of the sets of samples based on a most recent previous output sample.

Abstract: Complex polyphase nonlinear equalizer (cpNLEQs) mitigate nonlinear distortions generated by complex in-phase/quadrature (I/Q) time-interleaved analog-to-digital converters (TIADCs). Example cpNLEQs upsample the digital waveform emitted by the TIADC, e.g., by a factor of two, then separate the upsampled digital waveform into upsampled in-phase and quadrature components. Processors in the cpNLEQs create real and imaginary nonlinear compensation terms from the upsampled in-phase and quadrature components. The nonlinear compensation terms are downsampled, and the downsampled imaginary nonlinear compensation term is phase-shifted, then combined with the downsampled real component to produce an estimated residual distortion. Subtracting the estimated residual distortion from the digital waveform emitted by the TIADC yields an equalized digital waveform suitable for further processing.

Abstract: An adaptive equalizer circuit, set forth by way of example and not limitation, includes a plurality of paths receiving an input signal. One or more equalizers are each provided on one of the paths and are operative to equalize signal amplitude. An equalizer selector receives the input signal and is operative to output a selection signal based on higher-frequency content and lower-frequency content of the input signal. The selection signal is operative to select one of the paths to output an output signal that is based on the input signal.

Abstract: In at least some embodiments, a receiver for a wireless communication system is provided. The receiver includes an equalizer that provides an equalized channel matrix. The receiver also includes scaling logic coupled to the equalizer, the scaling logic selectively scales coefficients of the equalized channel matrix. The receiver also includes a decoder coupled to the scaling logic. The decoder decodes a signal based on the equalized channel matrix with scaled coefficients.

Abstract: Signal equalization is facilitated in a manner that provides for feedback operation with desirable equalization operation. As consistent with one or more embodiments, a sign is assigned to received signals by generating an output that is an absolute value of the received signals, and a comparator processes the output and to generate a signal having a voltage level limited to a predetermined value. A sign of a signal output by an equalizer is detected and used to assign a sign to the output of the comparator. A summation circuit sums the output of the equalizer with the output of the comparator, and provides the sum to the equalizer as an error signal. The equalizer modifies a frequency component of received signals based on the error signal.

Abstract: Methods and apparatus are provided for detecting and decoding adaptive equalization training frames (having a frame marker comprised of a string of binary ones and binary zeroes). Training frames are detected by shifting the received data; inserting at least one binary value at one end of the shifted received data to generate a modified version of the received data; applying a logic function to the received data and the modified version of the received data that identifies when corresponding bit positions have different values; and detecting the frame marker when an output of the logic function has a first binary value in an approximate middle of a string of a second binary value. The training frames are decoded using a distance between the approximate center of the frame marker and a predefined binary value in an output of the logic function.

Abstract: An adaptive filter includes: a filter configured to perform a filtering process for an input signal with a filter coefficient set therein, and output the processed input signal as an output signal; a calculating unit configured to calculate a value indicative of an error between an amplitude of the output signal and a reference amplitude; an output unit configured to output a first constant as a parameter when the amplitude of the output signal is greater than the predetermined amplitude, the parameter used when updating the filter coefficient, and output a second constant as the parameter when the amplitude of the output signal is smaller than the predetermined amplitude; and an updating unit configured to update the filter coefficient with an update amount corresponding to the parameter and the value indicative of the error, such that the error is reduced.

Abstract: A signal processing apparatus includes a signal processing unit configured to carry out signal processing on a single-carrier signal and a multi-carrier signal by making use of a plurality of common filters shared by the single-carrier signal and the multi-carrier signal.

Abstract: A two-way wireless repeater and booster system and method with watermarking of uplink signals are disclosed. The repeater includes a network unit having at least one wireless receiver and at least one wireless transmitter, the network unit being configured to communicate with the network transceiver. The transceiver further includes a user unit having at least one wireless receiver and at least one wireless transmitter, the user unit being configured to communicate with the user transceiver, and a two-way communication path between the network unit and the user unit to communicate signals between the network transceiver and the user transceiver in autonomous hops comprising between the network transceiver and the network unit, between the user transceiver and the user unit, and between the network unit and the user unit. The network unit and/or user unit is further configured to repeatedly transmit a training sequence to the other unit to train the at least one channel equalizer of the other unit.

Abstract: An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer as logic level sequences are transmitted at different frequencies.

Abstract: Systems and methods are provided for decoding signal vectors in multiple-input multiple-output (MIMO) systems, where the receiver has received one or more signal vectors from the same transmitted vector. The receiver combines the received vectors by vector concatenation The concatenated vector may then be decoded using, for example, maximum-likelihood decoding. In some embodiments, the combined signal vector is equalized before decoding.

Abstract: Techniques are described to adaptively adjust the equalizer settings of each transmitter in a transmitter-receiver pair. The transmitter-receiver pair can be used at least with implementations that comply with 40GBASE-CR4 or 100GBASE-CR10. For implementations that comply with 40GBASE-CR4, equalizer settings of four transmitters may be independently established.

Abstract: The present invention relates to a receiver in a 2×2 Line of Sight Multiple Input Multiple Output, LoS MIMO, system. The receiver is arranged to estimate a first (?1) and a second (?2) signal on the basis of a first (r1(t)) and a second (r2(t)) signal received from respective first and second transmitters (Tx1,Tx2). Said received signals (r1(t), r2(t) comprises a first and second signal. The receiver comprises a first Phase Locked Loop (11), PLL, and a second PLL (12), which are arranged to respectively determine a first (In1) and second (In2) demodulated signal from the first (r1(t)) and the second (r2(t)) received signals. The receiver further comprises an equalizer (13) which is arranged to estimate the first (S1) and second (S2) signals from the demodulated signals (In1,In2).

Abstract: Discussed herein is a semiconductor package and a method of overcoming multiple reflections while transmitting high speed broadband signals through the semiconductor package. The semiconductor package includes at least one trace having a first terminal that is configured to receive a broadband signal and a second terminal configured to output the broadband signal. The semiconductor package includes a stub which is positioned along a longitudinal length of the trace and is configured to reduce broadband reflections in the trace by causing multi-frequency reflections to destructively interfere with at least some broadband reflections in the trace that occur due to impedance discontinuities. The stub parameters such as stub length, stub impedance and the location of the stub along the trace can be determined to minimize signal degradation.

Abstract: For a demand of high speed, low cost and low power loss short distance wireless communication, a high-speed sampling and low-precision quantification pulse ultra-wideband wireless communication method is provided. A baseband narrow pulse sequence is generated at a transmission end using the digital technology by the method, and is transmitted after modulating amplifying and filtering and amplifying at a reception end, after the digital-signal processing of synchronizing, channel estimating, related detecting, and channel decoding, tec, is performed for the quantified data, the transmission information is retrieved.

Abstract: A receiver may be operable to receive a QAM-based, inter-symbol correlated (ISC) signal having pilot overhead of 5% at a signal-to-noise ratio (SNR). The receiver may be operable to process the QAM-based, ISC signal to output information at a particular rate with a symbol error rate lower than or equal to 1e?2. The first SNR may be at least 3 dB below a SNR required to achieve the same particular information rate and the same symbol error rate while processing a signal having zero inter-symbol interference.