Abstract: Analog signal current integrators are provided having tunable peaking functions. Analog signal current integrators with tunable peaking functions enable data rate dependent loss compensation for applications in high data rate receiver integrated circuits incorporating advanced equalization functions, such as decision-feedback equalizers. For instance, a current integrator circuit includes a current integrating amplifier circuit comprising an adjustable circuit element to tune a peaking response of the current integrator circuit, and a peaking control circuit to generate a control signal to adjust a value of the adjustable circuit element as a function of an operating condition of the current integrator circuit. The operating condition may be a specified data rate or a communication channel characteristic or both. The adjustable circuit element may be a degeneration capacitor or a bias current source.

Abstract: An equalizer that includes equalizer circuitry, a mean squared error (MSE) system, and adaptive control logic includes features that inhibit undesirable convergence to local minima.

Abstract: Methods and apparatus are provided for directing a beam towards a receiving device in the presence of interference. A beam transmitted by a transmission source is received at a receiving device. The received beam is affected by an interference signal from an interfering source. The receiving device computes a covariance matrix that represents a channel estimate associated with the interfering source. The receiving device modifies a predetermined sounding signal based on the covariance matrix for transmission to the transmission source. The receiving device causes the transmission source to estimate an equivalent channel matrix based on the predetermined sounding signal and the modified predetermined sounding signal. The equivalent channel matrix represents the channel estimate associated with the interfering source and a channel estimate associated with the transmission source.

Abstract: Requests are identified for equalization coefficients and a plurality of coefficient selections are tracked relating to the requests. A matrix is maintained within a grid space that is to represent the coefficients, the matrix representing one or more of the coefficient selections. The matrix is adjusted within the grid space to obtain an adjusted matrix that is to accommodate selection of a particular coefficient outside the matrix. A final coefficient can be selected based on the adjusted matrix.

Abstract: A radio frequency (RF) receiver includes an analog receiver chain followed by digital circuitry for reducing nonlinear distortion components within an output signal of the analog receiver chain. In at least one embodiment, the digital circuitry includes a digital equalizer that is configured with a sparse set of Volterra series coefficients. In this manner, a desired level of linearity performance may be achieved in the receiver with relatively low power consumption.

Abstract: A system and method for canceling noise in a received signal are provided. A signal is received at a receiver comprising a frequency domain equalizer (FEQ). A noise prediction error of the signal is determined. The FEQ is updated with the noise prediction error, wherein the act of updating mitigates the effect of noise in the signal.

Abstract: One embodiment relates to a method of adapting a receiver for equalization of an input data signal. A variable gain amplifier (VGA) loop adapts a VGA circuit using an initial threshold voltage so as to adjust a VGA gain setting to regulate a data amplitude feeding into a decision feedback equalization (DFE) circuit. In addition, the DFE adaptation loop may adapt the DFE circuit using the initial threshold voltage. When the adaptation of the VGA is done, then the VGA gain setting is frozen and adaptation of the threshold voltage may be performed by a threshold adaptation loop. Another embodiment relates to a system which includes a DFE adaptation circuit module, a CTLE adaptation circuit module, and a threshold adaptation circuit module that adapts a threshold voltage that is fed to the DFE adaptation circuit and the CTLE adaptation circuit. Other embodiments and features are also disclosed.

Abstract: A SerDes corn link with a retiming receiver is operable in link training (LT) mode. A SerDes transmitter includes a TX FIR channel driver to transmit TX Data with TX pre-emphasis EQ based on TX FIR coefficients. The retiming receiver includes an RTE (retimer/reclocker) with an RT FIR driver outputting retimed RX Data based on RT FIR coefficients. A link training unit (LTU) adjusts RT FIR coefficients based on a comparison of impulse cursor information for RX Data signals received at the RTE input and re-timed RX Data signals output from the RT FIR, so that the adjusted RT FIR coefficients correspond to the TX FIR coefficients (including reflecting LT changes in TX pre-emphasis EQ). In effect, the LTU performs a linear FIR coefficient translation from the TX FIR to the RT FIR, propagating LT FIR coefficient changes from RTE input to output.

Abstract: An OFDM receiver receives OFDM symbols in the frequency domain and comb filters and then punctures the OFDM symbols to leave symbols with actual pilot information and with null values at the data symbols. The receiver provides the punctured OFDM symbols to an OFDM symbol queue. A virtual pilot interpolator is coupled to the punctured OFDM symbol storage to generate virtual pilot information introduced to OFDM symbols. The interpolator may be a two dimensional Wiener filter. The receiver also includes a time domain channel estimator that processes a first OFDM symbol including virtual pilot information to generate a channel impulse response for the first OFDM symbol. A frequency equalizer equalizes the OFDM symbol in response to the channel impulse response for the first OFDM symbol.

Abstract: A time domain switching analog-to-digital converter apparatus and methods of utilizing the same. In one implementation, the converter apparatus comprises a carrier signal source, and at least one reference source. The carrier signal is summed with the input signal and the summed modulated signal is fed to a comparator circuit. The comparator is configured detects crossings of the reference level by the modulated waveform thereby generating trigger events. The time period between consecutive trigger events is used to obtain modulated signal deviation due to the input signal thus enabling input signal measurement. Control of the carrier oscillation amplitude and frequency enables real time adjustment of the converter dynamic range and resolution. The use of additional reference signal levels increases sensor frequency response and accuracy. A dual channel converter apparatus enables estimation and removal of common mode noise, thereby improving signal conversion accuracy.

Abstract: A decision feedback equalizer that can operate at higher speed is provided. The decision feedback equalizer includes a weighting addition circuit (adder 21, coefficient units Tap1a, Tap2 to Tapn) that sums an input signal to weighted versions of feedback signals FB1 to FBn, n being an integer not less than 2. The decision feedback equalizer also includes a decision circuit 11 that decides whether or not the result of addition by the weighting addition circuit is not less than a defined threshold value and that outputs the result of the decision to outside and to a shift register (latch circuits L2 to Ln). The decision circuit operates in synchronism with a clock signal. The shift register sequentially holds the result of decision of the decision circuit 11 in synchronism with the clock signal, and outputs the contents held by its component registers as feedback signals FB2 to FBn.

Abstract: An adaptive receiver is disclosed for optimally receiving and processing signals. The receiver utilizes one or more memory blocks to store groups of incoming symbols. The groups of symbols are processed by a channel estimation subsystem to determine channel characteristics. The receiver determines the appropriate demodulation and decoding strategy to implement based on the determined channel characteristics. The receiver includes a plurality of demodulation and decoding schemes, one of which is selected based on the results of a channel estimation analysis.

Abstract: An apparatus for encoding data signals includes a transmitter configured to encode and transmit a data signal over a communication channel, the transmitter including a precoder; a signal shaper configured to adjust the data signal by applying an equalization setting to the data signal, the equalization setting including an amplitude and offset and transmit the adjusted data signal to the precoder; and a processing unit. The processing unit is configured to perform: receiving channel coefficients associated with the communication channel; for each of a plurality of amplitude settings and a plurality of offset settings, calculating whether a modulo amplitude level would occur at a receiver using a modulo operation; selecting the equalization setting from the plurality of amplitude settings and the plurality of offset settings based on the calculation; and transmitting a control signal specifying the equalization setting to the signal shaper.

Abstract: Embodiments disclosed herein provide systems and methods for determining properties of a channel response in frequency and time at a subcarrier basis. The determined properties of the channel may include a power delay profile (PDP), channel impulse response, attenuation and phase response over frequency and time, and antenna correlation over the wireless network.

Abstract: A method for processing signals transmitted via a connection and received by a digital interface, where individual data frames are transmitted by the signals as a sequence of modulated symbols, and where the received signals are corrected by an equalizer; the equalizer sampling the received signals, and an adaptation of the equalizer only taking place in particular time intervals in a manner controlled by a protocol.

Abstract: Methods and apparatus are described for improving receiver performance in a multicarrier communication network in which an encoded symbol (250) is transmitted over a transmission channel (20) in the communications system. A model of the transmission channel (20) is estimated (718, 760), said model characterizing an effect of intercarrier interference on at least one carrier in the multicarrier system. The received symbol (250) is decoded (720, 762) using the estimated model to remove a predicted effect of intercarrier interference. A pre-processor (40) is also described for operation in conjunction with a communications receiver (30) in the network. The pre-processor (40) includes a channel estimator (42) operable to estimate at least one feature of the communication channel based on a received signal. The pre-processor (40) modifies the received signal dependent on the at least one estimated feature and provides the modified signal to the communications receiver (30).

Abstract: A circuit for reducing phase errors in a digital communication systems signal is provided. The circuit comprises a demodulator block, a feed-forward path, a feed-back path, and a slicer. The demodulator block generates a plurality of samples from the signal and determines for each sample a corresponding phase error. The feed-forward path is configured to reduce in the signal a high frequency component of the phase errors. The feed-back path configured to reduce in the signal a low frequency component of the phase errors. The slicer selectively forwards phase errors to the feed-forward path or the feed-back path based on a respective magnitude of the phase error when operating in a decision-directed mode.

Abstract: A crest factor reduction (CFR) circuit reduces the peak-to-average (PAR) power of a digitally modulated signal in a complex baseband is achieved by post-processing the input signal, with negligible increase in out-of-band emissions. The CFR circuit takes advantage of a procedure that solves for an optimum CFR using a constraint-optimization approach. In one embodiment, the CFR circuit, which receives an input signal and provides an output signal, includes: (a) an error generation circuit that receives the input signal and provides an error signal representative of a measure of circuit-induced distortion and a delayed input signal, the delayed input signal being the input signal delayed by a predetermined value; (b) a linear-phase filter receiving the error signal to provide a correction signal; and (c) a summer that subtracts the correction from the delayed input signal to provide the output signal.

Abstract: A partial response decision feedback equalizer (PrDFE) includes a receiver including at least first and second comparators operative to compare an input signal representing a sequence of symbols against respective thresholds and to respectively generate first and second receiver outputs. A first selection stage is provided to select (a) between the first comparator output and a first resolved symbol according to a first timing signal, and (b) between the second comparator output and the first resolved symbol according to the first timing signal, to produce respective first and second selection outputs. A second selection stage selects between the first and second selection outputs according to a selection signal. The selection signal is dependent on a prior resolved symbol that precedes the first resolved symbol in the sequence.

Abstract: A method and apparatus for updating equalization coefficients of an adaptive pre-equalizer of a network element are provided. The method includes monitoring a communications channel to measure distortion of a communications signal received from the network element and detecting whether a transient impairment is present in the communication signal. When a transient impairment is not detected to be present, a pre-equalization coefficient update is transmitted to the network element. However, when a transient impairment is detected to be present, at least selected ones of the pre-equalization coefficients are scaled before the update is transmitted to the network element or the update is withheld from being transmitted to the network element. An apparatus is also disclosed.

Abstract: Methods and apparatus adapting equalizers for compensating for signal distortion of a received digital signal are disclosed. The method comprises deriving equalizer settings for a received signal, determining at least one signal parameter of said received signal; and storing the derived equalizer settings together with an indication of the signal parameter. The signal parameter could, for instance, comprise the data rate of the signal. If the signal parameter changes the equalizer is configured to use any stored settings which are appropriate for the new signal parameter. Thus, rather than start an entirely new equalizer adaptation routine every time the signal parameter changes the equalizer will use any stored settings which are appropriate for the changed parameter.

Abstract: A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.

Abstract: A digital broadcast receiver receives a digital broadcast signal through a plurality of antennas, orthogonally demodulates the received signals, performs channel estimation by detecting a delay profile from a known signal included in each of the orthogonally demodulated signals, and uses the channel estimation results to equalize data signals included in the orthogonally demodulated signals. The delay profiles are also used to estimate the signal quality of each of the equalized data signals by determining the power of the signal component and the power of the noise component in each delay profile and calculating a signal to noise ratio. Diversity combining is performed by weighting the equalized data signals on a basis of their estimated signal quality.

Abstract: Embodiments are directed to feed-forward equalization. In some embodiments, a first circuit is configured to receive a signal transmitted over a channel as a differential pair, and a second circuit is configured to mirror the signal as at least a pre-cursor component comprising a first transistor of a first type of technology, a cursor component comprising a second transistor of a second type of technology, and a post-cursor component comprising a third transistor of the first type of technology.

Abstract: An asymmetric PHY pair for communicating over a point-to-point link is disclosed. The PHY pair is asymmetric in that the signal processing power used by one of the PHYs to communicate a unit of data over the link is made to be less than that of the other PHY. This asymmetry is accomplished not merely by reducing the signal processing power of one of the PHYs at the expense of the rate at which symbols can be communicated over the link, but by transferring the signal processing power from one of the PHYs to the other PHY so that the symbol rate can be substantially maintained as compared to the symbol rate of a symmetric PHY pair. The asymmetric PHY pair can be advantageously implemented in many different types of communication systems (i.e., in communication systems where one end is more congested and/or crowded than the other end).

Abstract: A radio receiver apparatus includes a serving cell detector configured to generate a detected serving cell signal based on a serving cell detector input signal. The radio receiver apparatus further includes a first interfering cell detector configured to generate a detected first interfering cell signal based on a first interfering cell detector input signal and a first interfering cell synthesizer configured to generate synthesized first interfering cell signal based on the detected first interfering cell signal. A serving cell interference removing unit is configured to remove the synthesized first interfering cell signal from a serving cell signal to generate the serving cell detector input signal.

Abstract: A transmission apparatus includes a transmission equalizer that equalizes a transmission signal transmitted in a signal transmission performed via a non-contact coupling including a magnetic coupling of a pair of coupling elements. The transmission equalizer creates plural equivalent transmission signals by branching the transmission signal; and includes plural signal paths that respectively give time delays different from each other to the equivalent transmission signals, and respectively multiplies the delayed transmission signals by tap coefficients. In addition, at least one pair of signal paths is set includes a variable delay circuit that can change the corresponding time delay to be given to the corresponding transmission signal.

Abstract: An apparatus relating generally to data pattern bias detection is disclosed. This apparatus includes a bias detector. A slicer is coupled to the bias detector to provide an error signal from the slicer to the bias detector. The bias detector is configured to determine a difference between an error input and an error mean for the error signal to detect a presence of correlated data in input signaling.

Abstract: Systems, methods, devices, circuits for transition based equalization.

Abstract: The present invention reduces the degradation in performance of one or more radio signals that are co-transmitted with a first radio signal from the same transmitting antenna in the same frequency channel and received by the same antenna due to multipath or other shared interference, where the one or more radio signals can be separated from the first radio signal. All received signals are coupled to the same adaptive array or adaptive filter to reduce multipath or other shared interference of the first radio signal, which reduces multipath and other shared interference in the other radio signals before they are separated and processed by their respective receivers, or the individual radio signals are separated before the first signal enters the adaptive array and coupled to a slave weighting network slaved to the weights of the adaptive array of the first signal to reduce interference in all the signals.

Abstract: A SerDes data sampling controller that includes a gear shifting data sampling clock that zeroes the data sampling skew at the center of the unit interval during the CDR phase lock stage, and then skews the data sample timing away from the center of the unit interval as the DFE coefficients adapt during the data transfer stage. This allows the controller to implement the best (unskewed) data sample timing during the CDR phase locking stage, and then skew the data sample timing after the DFE coefficients have adapted to provide the best (skewed) data sample timing for data bit sampling during the data transfer stage. The data sampling gear shifter may apply a variable skew value to the transition sampling or quadrature (Q) data sampling clock differentially varying the quadrature (Q) transition sampling clock from the inphase (I) data sampling clock.

Abstract: A method is provided for equalizing OFDM symbol vectors received on AM in-band on-channel radio signal including a main carrier and first and second BPSK modulated subcarriers. The method comprises: computing a BPSK magnitude signal; filtering the BPSK magnitude signal; filtering complex samples received on the main carrier; using the filtered BPSK magnitude signal and the filtered complex samples received on the main carrier to compute a plurality of flat fade equalization coefficients; and multiplying the OFDM symbol vectors by the flat fade equalization coefficients. A receiver that includes an equalizer, which operates in accordance with the method is also provided.

Abstract: Circuits and methods characterize a receiver. The circuit includes a decision feedback equalizer (DFE) circuit, a clock and data recovery (CDR) circuit, a data checker, and an eye-scan controller. The DFE circuit generates a filtered signal from the communication signal. The filtered signal is a sum of the communication signal and a variable weighting of a symbol recently sampled from the filtered signal. The CDR circuit samples a sequence of sampled symbols from the filtered signal. The CDR circuit samples the filtered signal at a variable phase relative to a clock signal. The data checker generates an indication of an error in the sequence of sampled symbols. The eye-scan controller varies the variable weighting and the variable phase through multiple value combinations. The eye-scan controller checks for the indication of the error for each of the value combinations.

Abstract: An iterative processing unit iterates equalization processing on a reception signal. A PMI determination unit determines a precoding matrix by taking into consideration an interference amount that is removable by the iterative processing unit. A control information transmission unit transmits information indicating the precoding matrix.

Abstract: To keep communication even if a distance between transmission devices is farther and a transmission distance therebetween is longer. A transmission device for alternately performing transmission and reception to/from a communication destination transmission device transmits transmit data to the communication destination transmission device. It receives return data transmitted by the communication destination transmission device after the transmit data reaches the communication destination transmission device.

Abstract: Aspects of the present invention include devices and methods for receiving signals in communication systems. A partial response equalizer includes a full response linear equalizing device for equalizing a received signal; and a partial response post filter for post filtering the equalized signal. Aspects of the present invention devices and methods for coherently receiving signals in an optical communication system. A receiver front end converts a received partial response optical signal to a partial response digital signal. An equalizing device equalizes the pre-filtered full response digital signal. A full response carrier recovery device performs carrier recovery of the signal equalized by the equalizing device. A post-filter filters the signal having undergone carrier recovery by the full response carrier recovery device.

Abstract: Circuits and methods are provided for efficient feed-forward equalization when sample-and-hold circuitry is employed to generate n time-delayed versions of an input data signal to be equalized. To equalize the input data signal, m data signals are input to m feed-forward equalization (FFE) taps of a current-integrating summer circuit, wherein each of the m data signals corresponds to one of the n time-delayed versions of the input data signal. A capacitance is precharged to a precharge level during a reset period of the current-integrating summer circuit. An output current is generated by each of the m FFE taps during an integration period of the current-integrating summer circuit, wherein the output currents from the m FFE taps collectively charge or discharge the capacitance during the integration period. A gating control signal is applied to an FFE tap during the integration period to disable the FFE tap during a portion of the integration period in which the data signal input to the FFE tap is invalid.

Abstract: A system and method for blind equalization of a QAM signal. Equalization is achieved using an algorithm characterized by cost function that is a function the Euclidian distance, e.g. the minimum Euclidian distance, between points of the constellation associated with the QAM signal, i.e. the distance between symbols.

Abstract: In a data processing device and a method for analyzing stability of the data processing device, one or more sets of equalization parameters and a predetermined bit error ratio (BER) are received. Times and voltages of data points that represent a waveform of an electronic signal generated by the data processing device are read, and an output type of the electronic signal is selected to obtain a time interval of outputs of the electronic signal. Optimal equalization parameters are selected from the one or more sets of equalization parameters to compute a sample interval. Interfering voltages of the electronic signal are computed to select a frequency which is equal to the predetermined BER, and the interfering voltages corresponding to the selected frequency are obtained. An eye pattern is established using the interfering voltages corresponding to the selected frequency, and a determination is made according to the eye pattern.

Abstract: A data detecting device includes a multi-input adaptive equalizer, a binarizing unit, and an equalization error calculating unit. The multi-input adaptive equalizer includes a plurality of adaptive equalizers and outputs a reproduction information signal from a target track and a reproduction information signal from a close track close to the target track as equalization signals by calculating outputs of the adaptive equalizers, the reproduction information signals being input to the adaptive equalizers, respectively as reproduction information signals. The binarizing unit obtains binarized data by performing a binarization process on the equalization signals.

Abstract: A method includes, in a mobile communication terminal, receiving downlink signals from at least two antennas. A signal covariance matrix for the received signals is calculated. Each diagonal element of the signal covariance matrix is enlarged by a respective antenna-specific value that depends on a respective antenna associated with the diagonal element. Equalizer coefficients are computed based on the signal covariance matrix having the enlarged diagonal elements. The received downlink signals are equalized using the equalizer coefficients.

Abstract: An equalization parameter analyzer includes a parameter section configured to acquire at least one current parameter for a wireless receiver and an analyzer section configured to compare the at least one current parameter with at least one corresponding previous parameter. Additionally, the equalization parameter analyzer also includes a coefficients section configured to initiate a generation of new equalizer coefficients in the wireless receiver based on a change between the at least one current and corresponding previous parameters that exceeds a predefined threshold. A method of equalization coefficients generation is also provided.

Abstract: A circuit includes: a first adder configured to add a first offset cancellation value to an input signal value; a second adder configured to add a first equalization value to an output signal value from the first adder; a first comparator configured to make a binary decision on an output signal value from the second adder; a third adder configured to add a second offset cancellation value to the input signal value; a fourth adder configured to add a second equalization value to an output signal value from the third adder; a second comparator configured to make a binary decision on an output signal value from the fourth adder; a selector configured to output a determination result of the first comparator or a determination result of the second comparator in accordance with a determination result of preceding one bit of the input signal value.

Abstract: A serial communication circuit (FIG. 3) is disclosed. The circuit includes an equalizer circuit (306) arranged to receive a data signal (CH 1) and produce an equalized data signal. A log detector circuit (300) receives the data signal and produces a power signal indicating a power level of the data signal. A decision circuit (332) receives the power signal and produces a select signal. A first selection circuit (336) receives a plurality of first correction signals and applies one of the first correction signals to the equalizer circuit in response to the select signal.

Abstract: A wireless communication device includes a reception processing circuit including a weight coefficient computation circuit that includes a computation circuit to compute a weight coefficient which is used for removing a distortion of a reception signal caused by a multi-path, and which of each of fingers corresponds to each of a specified number of paths among a plurality of paths caused by the multi-path between the device and the opposing device, by iteratively performing a computation including a complex multiplication between a weight coefficient while being iteratively computed and a component of a correlation matrix, and a control circuit to cause the computation circuit to compute complex multiplications between a first (second) component of a pair of components having a complex conjugate relationship and a first (second) weight coefficient while being iteratively computed when the pair of components is present among components used for computing the weight coefficient.

Abstract: Methods and apparatus for provision of equalization effort-balancing of transmit (TX) Finite Impulse Response (FIR) and receive (RX) Linear Equalizer (LE) or RX Decision Feedback Equalizer (DFE) structures in high-speed serial interconnects are described. In some embodiments, data corresponding to a plurality of transmit equalization values and a plurality of receive equalization values for each lane of a link having a plurality of lanes is detected. At least one of the plurality of the transmit equalization values and at least one of the plurality of the receive equalization values are selected for each lane of the plurality of lanes of the link based on detection of saturation in a Decision Feedback Equalizer (DFE) tap of a corresponding lane of the link. Other embodiments are also claimed and/or disclosed.

Abstract: A method for compensating frequency response of a filter unit in remote radio unit in real time, said remote radio unit comprises filter unit equalizer, transmitter observation receiver and antenna calibration receiver, said method comprising the steps of: receiving input signal of said filter unit by transmitter observation receiver; receiving output signal of said filter unit by antenna calibration receiver; calculating coefficients of filter unit equalizer in real time based on said input signal and said output signal; updating said filter unit equalizer based on said calculated coefficients in order to compensate frequency response of said filter unit. A device to carry out the above method, remote radio unit comprising said device and a telecommunication system comprising said remote radio unit are also provided.

Abstract: A receiver receives multipath signals in a W-CDMA system. Channel estimates and timing reference signals are generated utilizing the received multipath signals. Timing correction signals indicating a location of the received multipath signals may be generated and the received multipath signals may be combined based on the computed channel estimates and/or the generated timing reference signals. The multipath signals may be combined as a signal cluster. Circuitry may be provided that computes channel estimates based on at least one of a plurality of received multipath signals, and generates timing reference signals indicating a location of at least one of the plurality of received multipath signals. Circuitry may also be provided that combines at least a portion of the plurality of received multipath signals based on at least a portion of the computed channel estimates and/or the generated timing reference signals.

Abstract: An OFDM receiver receives OFDM symbols in the frequency domain and comb filters and then punctures the OFDM symbols to leave symbols with actual pilot information and with null values at the data symbols. The receiver provides the punctured OFDM symbols to an OFDM symbol queue. A virtual pilot interpolator is coupled to the punctured OFDM symbol storage to generate virtual pilot information introduced to OFDM symbols. The interpolator may be a two dimensional Wiener filter. The receiver also includes a time domain channel estimator that processes a first OFDM symbol including virtual pilot information to generate a channel impulse response for the first OFDM symbol. A frequency equalizer equalizes the OFDM symbol in response to the channel impulse response for the first OFDM symbol.

Abstract: Techniques for correcting component mismatches in an M-channel time-interleaved Analog to Digital Converter (ADC). In order to obtain an error measure for offset, gain or phase, errors, outputs from each ADC are either summed or averaged over No samples. Calling each of the sums or averages as Xk where k=1, 2, . . . , M, there are M such values as a result. A single value representing the mean of these M values, Xmean, is chosen as a reference value. The offset, gain and phase errors for the M different ADCs are then obtained from Xk?Xmean. The sign of each offset error, i.e., sign (Xk?Xmean), is then used to drive an adaptive algorithm whose output represents an offset correction value for the corresponding ADC. The offset, gain, and phase correction outputs from the adaptive algorithm is fed to an array of Digital-to-Analog converters (DACs) whose outputs are voltages or currents that directly or indirectly controls the offset, gain or phase setting of each individual ADC.