Abstract: A system and method are provided for communicating in a borehole. In one example, the method includes receiving a baseband signal transmitted through a drill string using a plurality of elastic waves, where a spectrum of the baseband signal is duplicated after transmission due to oversampling. At least one passband is selected in order to recover the baseband signal from the duplicated spectrum. The baseband signal is decoded to recover a bit stream contained within the baseband signal.

Abstract: An apparatus includes a plurality of delay elements configured to delay a respective input signal and to output a respective delayed signal. The apparatus also includes a weight generator configured to generate a plurality of tap weights based on the delayed signals. The apparatus further includes a tap controller configured to generate tap weight enabling signals corresponding to one or more of the tap weights if the corresponding tap weights are greater than a predetermined threshold value. The tap controller is also configured to generate a set of bias factors based on corresponding tap weights of the plurality of tap weights.

Abstract: One embodiment relates to a receiver circuit for a data link. The receiver circuit includes at least a first signal path, a second signal path, and a path selector circuit. The first signal path includes first equalization circuitry, and the second signal path includes second equalization circuitry. The path selector circuit is configured to select one signal path of the first and second signal paths. Other embodiments and features are also disclosed.

Abstract: A modified Viterbi algorithm, that integrates decision feedback equalization (DFE), is disclosed. The modified algorithm may be used especially for rate ½ coded transmissions through additive noise channels, where the additive noise is one-tap filtered noise. Each state in the presently-disclosed trellis holds an aggregate error and an aggregate weight of the winner path terminating at that state. Each branch of the trellis carries one or more aggregate errors, where each of the aggregate errors includes a contribution from the aggregate error of the branch's source state as well as a contribution from the difference between an expected symbol of the branch and a corresponding received symbol.

Abstract: A method and a clock receiver circuit for implementing low jitter and enhanced duty cycle, and a design structure on which the subject circuit resides are provided. The clock receiver circuit accepts single-ended complementary metal oxide semiconductor (CMOS) and differential clock signals. The clock receiver circuit includes input circuitry coupled to a differential pair that biasing a reference clock and allows for single-ended or differential clock signals. The differential pair uses multiple current mirrors for switching the polarity of the input signals to achieve enhanced jitter performance, and cross coupled inverters for retaining signal symmetry.

Abstract: A receiver having a high frequency selectivity noise tolerance is achieved on a small calculation scale by way of an received signal spectrum (RSS) calculation part, that calculates a received signal spectrum on the basis of a complex baseband signal (CBB) signal transmitted from a frontend, a channel frequency response (CFR) estimation part, that calculates an estimated channel characteristic and a residual signal on the basis of the CBB signal and estimated transmitted symbols estimated by a trellis decoder, and a noise power spectrum (NPS) estimation part, that calculates an estimated noise power spectrum on the basis of the residual signal calculated by the CFR estimation part. A combination part combines a plurality of received signal spectrums on the basis of the received signal spectrum, estimated channel characteristics and estimated noise power spectrum. An equalization part performs equalization of the combination result, thereby calculating an equalized spectrum.

Abstract: Systems and methods of mitigating precursor ISIs for communication channels having time-variant precursor channel responses using digital circuit designs. A phase adaptation circuit is utilized in a receiver and configured to generate a phase control signal responsive to an input signal and based on the current precursor channel response. The phase control signal controls the phase shift of a recovered clock to a position where the precursor ISI at h(?1) is minimized. The phase control signal corresponds to a “feed-forward equalization (FFE) first tap weight” obtained via a digital least-mean-square (LMS) process.

Abstract: A method and system for the design and implementation of an optimally factored filter is presented. Pairs of angle values are organized in pairing candidates and a threshold is defined to indicate an upper bound on the number of pairing candidates. A first pairing candidate is exchanged above the threshold with a second pairing candidate below the threshold and a matrix is generated based on the pairing candidates below the threshold. A lowest predicted total quantization cost between all pairing candidates represented within the matrix is determined and the pairing candidates that result in the lowest predicted total quantization cost are used to determine the coefficients of the filter.

Abstract: Modular, low power serializer-deserializer receivers and methods for configuring such receivers are disclosed. The disclosed receivers are configured to sample input signals at the front-end utilizing a plurality of track-and-hold circuits time-interleaved based on a plurality of phase-shifted clock signals. The disclosed receivers are also modular and various processing components, including analog front-end and equalizers, are selectively utilized based on the determined length of the communication channel, ranging from ultra short reach applications to very short reach, medium reach, long reach and extra long reach applications.

Abstract: An apparatus, method, computer readable medium, and system are provided to generate a symbol placement associated with a transmission scheme by transforming a retrieved set of equalization coefficients. Symbols included in the symbol placement may be analyzed and quantified in terms of their distance from a decision boundary. Symbols may be synthesized on an iterative basis in order to obtain visibility into the underlying performance of the transmission scheme over time. If equalization is unable to reduce a signal impairment below a threshold value within a predetermined amount of time, then a determination may be made that a non-linear distortion source is present in a network or communication system. Signals received from a plurality of user terminals may be compared with one another in order to determine a probable location or cause of the non-linear distortion.

Abstract: A selection process is disclosed for a user equipment (UE) to select between a WAN and a WLAN. Instead of defaulting to select one or the other networks, as long as the connection is available, a better load balancing and maximization of the system capacity may be achieved when the UE selects the network according to a priority order between the WAN/WLAN. The priority order takes into account various network metrics, such as loading, channel conditions, bandwidth, and service requirements.

Abstract: A method of allocating pilot bits in a wireless communication system using a multiple carrier modulation (MCM) is disclosed. The method includes allocating a plurality of precoded data symbols precoded by a precoding matrix module and a plurality of non-precoded pilot bits to a plurality of subcarriers, and transmitting the allocated precoded data symbols and the allocated non-precoded pilot bits.

Abstract: An output characteristic of a monotonic system is controlled using a plurality of adjustable inputs. The adjustments are controlled using a set of setpoints and a set of dither magnitudes. Each input's adjustment is controlled simultaneously using a setpoint and a dither around the setpoint. The dither values for each input have a zero mean and there is zero correlation between the dithers applied to different inputs. The changes in the output characteristic that result from the dithers are measured, and are used to create an adjustment value. The adjustment value is used to create a set of adjusted dither magnitudes. The set of adjusted dither magnitudes are added to a set of integrated prior adjusted dither magnitudes to create a set of setpoint adjustments. Adding the setpoint adjustments to corresponding setpoints creates a set of updated setpoints. This process is repeated so that the setpoints converge on a value that maximizes the output characteristic being controlled.

Abstract: In a mobile communication system, an apparatus acquires a first variant amount by which to vary uplink transmit power as requested by a base station, based on a control command issued from the base station. The apparatus controls the uplink transmit power using a second variation amount smaller than the first variant amount when accumulated uplink transmit power obtained by accumulating the first variation amount satisfies a suppression condition for adjusting the uplink transmit power to be outputted.

Abstract: Described embodiments provide for, in a SerDes device, an adaptation process that adjusts data path gain through programmable-bias based on process, voltage, temperature (PVT) and data rate changes. Such adaptation process extends bias current dynamic range, and low frequency gain can be programmed to a desired target range of values for a given variable gain amplifier (VGA) setting at any PVT and data rate corner. A receive (RX) data path structure auto-adapts data path gain through programmable bias based on sensed PVT and data rate changes. The low frequency attenuation/gain range is extended, and can be programmed to a desirable targeted range by a SerDes device RX adaptive process for a given VGA and linear equalizer (LEQ) setting at any given PVT and data rate condition.

Abstract: According to one embodiment, a system for processing data includes a processor and logic integrated with and/or executable by the processor, the logic being configured to individually set, for each of one or more range-constrained finite impulse response (FIR) filter taps configured for use in a FIR filter, a predetermined range of values suitable for controlling an equalizer response, and pass data through the equalizer including the FIR filter to obtain equalized data, wherein each of the one or more range-constrained FIR filter taps are individually adaptive within its predetermined range of values. Other systems and methods for processing data by constraining FIR filter taps while reading data from a data storage medium are described in more embodiments.

Abstract: An ASIC for monitoring wideband GHz spectrum to sense respective frequency components present in the spectrum. The ASIC implements Fast Fourier Transform (FFT) techniques to facilitate identification of one or more frequency components of a sparse signal after the signal is sub-sampled at a rate below the Nyquist criterion. The ASIC computes a first Fast Fourier Transform (FFT) of a first sub-sampled set of samples of a time-varying signal representing the monitored spectrum and sampled at a first sampling rate, and further computes a second FFT of a second sub-sampled set of samples of the time-varying signal sampled at a second sampling rate different from the first sampling rate. In one example, each of the first FFT and the second FFT is a low-radix FFT to facilitate a low-power and low-cost ASIC implementation of wideband spectrum sensing.

Abstract: A system for an orthogonal frequency division multiplexed (OFDM) equalizer, said system comprising a program memory, a program sequencer and a processing unit connected to each other, wherein the processing unit comprises an input selection unit, an arithmetic logic unit (ALU), a coprocessor and an output selection unit; further wherein the program sequencer schedules the processing of one or more symbol-carrier pairs input to said OFDM equalizer using multiple threads; retrieves, for each of the one or more symbol-carrier pairs, multiple program instructions from said program memory; generates multiple expanded instructions corresponding to said retrieved multiple program instructions; and further wherein said ALU performs said processing of the one or more symbol-carrier pairs using the multiple threads across multiple pipeline stages, wherein said processing comprises said ALU executing arithmetic operations to process said expanded instructions using said multiple threads across the multiple pipeline stag

Abstract: In an example, a clock data recovery (CDR) circuit for a receiver includes a timing error detector circuit, a loop filter, and a phase interpolator. The timing error detector circuit is coupled to receive, at a baud-rate, data samples and error samples for symbols received by the receiver. The timing error detector circuit is operable to generate both a timing error value and an estimated waveform value per symbol based on the data samples and the error samples. The loop filter is coupled to the timing error detector to receive timing error values. The phase interpolator is coupled to the loop filter to receive filtered timing error values, the phase interpolator operable to generate a control signal to adjust a sampling phase used to generate the data samples and the error samples.

Abstract: A high-speed serial interface includes a transmitter having an output module with settings that select an output impedances of the output module and a tuning value for the output impedance, and a receiver having a plurality of compensation modules each to provide a selectable level of equalization to a data bitstream from the transmitter, and a control module that directs the transmitter to successively select each of the tuning values, that directs the compensation modules, for each tuning value, to successively select each of the levels of equalization, that evaluates an indication of a performance level of the receiver for each of the successively selected levels of equalization and for each of the tuning values, and that selects a particular tuning value based upon the indications of the performance level of the receiver.

Abstract: An apparatus and a method are provided for receiving a signal in a communication system supporting a Gaussian frequency shift keying (GFSK) modulation scheme. The method includes receiving the signal; and estimating a codeword vector by performing a signal detecting operation based on a GFSK-maximum likelihood sequence estimation (MLSE) scheme, which is based on a GFSK modulation scheme and an MLSE scheme, on the received signal. States of a Viterbi trellis that are used in the GFSK-MLSE scheme are determined based on the GFSK modulation scheme.

Abstract: Methods and communication terminals for determining rank indication in a multicarrier communication system, wherein communication in the multicarrier communication system is carried out over a plurality of subcarriers, wherein the communication terminal communicates with an interface station within a cell in a multiple-input-multiple-output (MIMO) configuration. In particular, multicarrier symbols are received including pilot signals from the interface station, wherein the pilot signals contain pilot data, and channel properties are estimated based on the received multicarrier symbols, wherein the channel properties include channel properties of at least one subcarrier carrying one of the pilot signals. The pilot data are equalized based on the channel properties for determination of at least one pilot power and at least one interference power based on the equalized pilot data, and a rank indication is determined based on the at least one pilot power and the at least one interference power.

Abstract: A method of operation of a communication system includes: estimating a channel; calculating a predicted signal within the channel; evaluating a prediction accuracy of the predicted signal; and adjusting a handoff parameter when the prediction accuracy of the predicted signal is within a threshold range for communicating through a mobile station.

Abstract: A system for multi-rate digital self-interference cancellation including a signal component generation system coupled to a digital transmit signal of a communication system that generates a set of signal components from the digital transmit signal; a multi-rate adaptive filter that transforms the set of signal components into a digital self-interference cancellation signal, according to a transform configuration, to form an interference-reduced receive signal; and a transform adaptor that dynamically sets the transform configuration in response to changes in the interference-reduced receive signal.

Abstract: A radio receiver comprising a compensator arranged to compensate for intersymbol interference in a signal received at the receiver and a configurator arranged to configure the compensator, wherein the compensator comprises a programmable filter and the configurator is capable of configuring the filter in a first mode to operate as an ISI equaliser or in a second mode to implement a RAKE finger set.

Abstract: Systems and methodologies are described for processing information at a device operating in a wireless communication system. Techniques for in-phase and quadrature (I/Q) calibration, interference cancellation, channel estimation, and signal-to-noise ratio (SNR) and rank metric calculation are provided herein. As provided herein, one or more of the described techniques can be used to adjust the performance of a wireless station in the presence of impairments to the wireless station and/or a communication link used by the wireless station.

Abstract: Described is an apparatus which comprises: a comparator unit to receive at least three data signals with respective clock signals embedded in the at least three data signals, the comparator unit to provide first, second, and third clock signals; and a delay unit coupled to the comparator unit, the delay unit to receive the first, second and third clock signals to generate delayed versions of the first, second and third clock signals respectively.

Abstract: Presented herein are techniques for enhancing pre-equalization operations in a telecommunications network. In one example, a cable modem termination system (CMTS) determines the coherent bandwidth for pre-equalization coefficients associated with upstream transmissions received from a cable modem. The CMTS uses the coherent bandwidth of the pre-equalization coefficients to calculate a time constant for a time domain filter that may be applied to the pre-equalization coefficients. The CMTS also calculates, based on the time constant, filter coefficients for the time domain filter and applies the time domain filter to the pre-equalization coefficients to generate signal-to-noise ratio (SNR)-enhanced pre-equalization coefficients. The CMTS then sends the SNR-enhanced pre-equalization coefficients to the cable modem.

Abstract: An n-tap (n?2 (in the case of FIG. 1, n=2)) DFE equalizes a received signal on the basis of a determination result of a signal which has been received, and outputs a determination result of the received signal after equalization. An adjustment section generates a plurality of filter patterns for observation of an inter-symbol interference amount by changing values of n bits included in the plurality of filter patterns. The adjustment section then compares each of the plurality of filter patterns generated with an output data string corresponding to the determination result of the received signal after equalization and adjusts tap coefficients set for n (in the case of FIG. 1, 2) taps included in the DFE on the basis of adjustment values corresponding to values of the n bits included in a filter pattern which matches the output data string.

Abstract: A data receiver is disclosed, including an equalization process part, a multi-value oversampling part, and an equalization controller. The equalization process part equalizes serial received data before binarization and outputs the serial received data being equalized. The multi-value oversampling part binarizes the serial received data being equalized by multiple threshold values, conducts oversampling, and generates the multi-value sampling data. The equalization controller detects an eye pattern of the serial received data being equalized based on the multi-value oversampling data, and controls an equalization characteristic of the equalization process part based on a detection result.

Abstract: A transmitter comprising a baseband modulator arranged to modulate a complex baseband signal and to output a complex modulated signal xin(n) with amplitude g and phase q, i.e. xin(n)=g(n)ejq(n), to the input port of a filter, the filter in turn having its output coupled to a transmit unit, said filter being arranged to output a filtered complex output signal xout(n) with amplitude g but phase m, i.e. xout(n)=g(n)ejm(n), so that the filter is arranged to affect the phase but not the amplitude of its input signal. The filter is arranged to have as its transfer function for the phase of its input signal the z-transform F(z)=1+wz?1, where w is a weighting function whose value is determined by means of the additive noise autocorrelation, the phase noise autocorrelation and the signal amplitude of xin.

Abstract: Power aware equalization in a serial communications link that includes a transmitter and a receiver, including: determining, by a power aware equalization module, a required signal eye width and a required signal eye height for signals received by the receiver; identifying one or more signal equalizers for signals transmitted over the serial communications link; identifying one or more cumulative equalizer settings that equalize signals transmitted over the serial communications link to conform with the required signal eye width and the required signal eye height for signals received by the receiver; determining power consumption values associated with each of the one or more cumulative equalizer settings; and setting the one or more signal equalizers to configuration settings in dependence upon the power consumption values associated with each of the one or more cumulative equalizer settings.

Abstract: Techniques for training a link are described herein. An example electronic device includes a port coupled to a link partner. The port and the link partner use closed-loop equalizer training to obtain receiver equalization coefficients for the receiver of the port and obtain transmitter equalization coefficients for the transmitter of the link partner.

Abstract: A method and apparatus for adaptive nonlinear equalization, comprising: a horizontal polarization component compensation unit configured to calculate a linear damage value of an input signal, a nonlinear damage value of a horizontal component of the input signal, and a crosstalk value caused by a vertical component to the horizontal component, and compensate the horizontal component according to the linear damage value, the nonlinear damage value and the crosstalk value; and, a vertical polarization component compensation unit configured to calculate a linear damage value of the input signal, a nonlinear damage value of a vertical component of the input signal, and a crosstalk value caused by a horizontal component to the vertical component, and compensate the vertical component according to the linear damage value, the nonlinear damage value and the crosstalk value.

Abstract: A method and apparatus for synchronizing a carrier frequency of a node included in a distributed network are provided. The apparatus includes a frequency offset estimating unit, an offset average value calculating unit, and a frequency adjustment value calculating unit. The method includes receiving preambles from a plurality of nodes adjacent to the node, estimating offsets of the carrier frequencies from the received preambles for each of the plurality of neighbor nodes, calculating an average value of the estimated offsets, calculating an adjustment value of the carrier frequencies with respect to the entirety of the plurality of neighbor nodes by using the average value, and adjusting a carrier frequency of the node on the basis of the adjustment value.

Abstract: The carrier phase of a carrier wave modulated with information symbols is recovered with a multi-stage, feed-forward carrier phase recovery method. A coarse phase recovery is performed to determine a first phase angle which provides a first best estimate of the information symbol corresponding to the digital signal. Using the first best estimate as input, a second stage of estimation is then performed to determine a second phase angle which provides an improved (second) best estimate of the information symbol. Additional stages of estimation can be performed.

Abstract: A pre-distortion method. A signal to be transmitted Tx is pre-distorted to compensate for nonlinearities of a transmitter. The pre-distorted signal is filtered by an EBEE filter and a baseband filter. The EBEE filter has a filter characteristic of that cancels the baseband filter response over the range of frequencies from a first corner frequency of the baseband filter to a frequency of N*fB where N is a highest order of distortion component being cancelled and fB is the bandwidth of the original signal to be transmitted. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Abstract: Embodiments include systems and methods for using generalized pulse amplitude modulation (PAM-X) signaling with an at-rate not-return-to-zero (NRZ) clock data recovery (CDR) system. Some implementations include dual-mode signaling for an at-rate CDR (e.g., using standard NRZ signaling at lower operating frequencies and pseudo-NRZ signaling derived from PAM-X signaling at higher operating frequencies. Embodiments derive an apparent direction of signal transition from PAM-X signaling. The direction can be used to calculate pseudo-NRZ values. For example, when the PAM-X signal transitions in an upward direction, a pseudo-current NRZ value and a pseudo-previous NRZ value of ‘?1’ and ‘+1’ can be generated, respectively. An at-rate NRZ CDR can use the pseudo-NRZ values and a derived error value to make an offset determination. The offset determination can then be used to offset a generated clock signal in the CDR system.

Abstract: A multi-phase partial response receiver supports various incoming data rates by sampling PrDFE output values at a selected one of at least two clock phases. The receiver includes a calibration circuit that performs a timing analysis of critical data paths in the circuit, and this analysis is then used to select the particular clock phase used to latch the output values. These techniques permit the multiplexer outputs from for each phase of the partial response receiver to directly drive selection of a multiplexer for the ensuing phase, i.e., by avoiding regions of instability or uncertainty in the respective multiplexer outputs.

Abstract: A method of equalizing an input data signal using a multiple-stage continuous-time linear equalization (CTLE) circuit. A zero-forcing least-mean-square (ZF LMS) procedure is applied to adapt the settings of the CTLE stages. The amplitude settings and the frequency boost settings of the CTLE stages are adapted within the ZF LMS procedure. In an exemplary implementation, an error screening threshold may be applied to an error signal within the ZF LMS procedure to generate a reduced error signal such that weight updates do not occur if the error signal is below the error screening threshold. In addition, if an accumulated sign error signal within the ZF LMS procedure reaches a predetermined maximum indicative of a high loss channel, then a setting for a variable gain amplifier may be increased, and an amplitude setting for the CTLE circuit may be decreased. Other embodiments, aspects and features are also disclosed.

Abstract: Disclosed herein are systems, methods, and computer-readable storage media for enabling improved cancellation of self-interference in full-duplex communications, or the transmitting and receiving of communications in a single frequency band without requiring time, frequency, or code divisions. The system estimates the signal strength and phase of a self-interference signal, generates a cancellation signal based on this estimate, then uses the cancellation signal to suppress the self-interference before sampling received analog signal. After applying the cancellation signal, the system samples and digitizes the remaining analog signal. The digitized signal is then subjected to additional digital cancellation, allowing for extraction of the desired signal.

Abstract: An impulse noise mitigation circuit (INMC) may set a cut-off frequency of each of two high pass filters to bound a frequency bandwidth of a desired signal, wherein a first of the two filters allows frequencies higher than the frequency bandwidth of the desired signal, and a second of the two filters allows frequencies lower than the frequency bandwidth of the desired signal. The INMC may compute and store a mean magnitude separately for a first signal response of the first filter and a second signal response of the second filter. The INMC may select the first filter for impulse noise mitigation when the mean magnitude of the second filter is greater than the mean magnitude of the first filter. The INMC may select the second filter for impulse noise mitigation when the mean magnitude of the first filter is greater than the second filter.

Abstract: A signal receiving apparatus includes an equalization module, a coarse tuning module and a fine tuning module. The equalization module receives an input signal, and performs an equalization process on the input signal according to an equalization strength to generate an equalized signal. The coarse tuning module adjusts the equalization strength according to the equalized signal until the equalized signal satisfies a preliminary convergence condition. When the preliminary convergence condition is satisfied, the fine tuning module adjusts the equalization strength according to the equalized signal until the equalization strength satisfies a final convergence condition.

Abstract: Apparatus and method for recovering data from a multi-channel input signal, such as but not limited to a readback signal from a bit patterned medium (BPM) having a plurality of subtracks. In accordance with some embodiments, a single input single output (SISO) equalizer is adapted to generate equalized outputs responsive to alternating subchannels of the multi-channel input signal. A detector is adapted to generate estimates of data symbols represented by the input signal responsive to the equalized outputs. A switching circuit is adapted to switch in different equalizer coefficients for use by the SISO equalizer for each of the alternating subchannels in the input signal.

Abstract: An estimate of a multiple input, multiple output (MIMO) channel is computed, and an equalizer to be applied to signals received via the MIMO channel is computed. The equalizer is initialized based on the estimate of the MIMO channel. The equalizer is applied to a received signal, and the received signal is demodulated to generate a demodulated signal. The demodulated signal is decoded according to an error correction code to generate decoded data, and the decoded data is re-encoded according to the error correction code to generate re-encoded data. The re-encoded data is re-modulated to generate a re-modulated signal. The received signal is compared to the re-modulated signal, and the equalizer is updated based on the comparison. After updating the equalizer, the equalizer is applied to the received signal.

Abstract: It becomes difficult to perform the optimum equalization signal processing in coherent receiving systems if a channel response in an optical fiber transmission line includes a factor without temporal centrosymmetry, therefore, an equalization signal processor according to an exemplary aspect of the invention includes an equalization filter means configured to receive digital signals by coherent receiving systems; a coefficient control means configured to control coefficients defining characteristics of the equalization filter means; a significant coefficient holding means configured to hold significant coefficients of significant values among initial values of the coefficients; a significant coefficient positioning means configured to determine a significant coefficient position, a position of the significant coefficients in the initial values, so that equalization characteristics of the equalization filter means may be optimized; and a significant coefficient setting means configured to allocate the signific

Abstract: A method in a radio receiver arrangement for receiving data blocks of radio signalling. The method comprises receiving a plurality of data blocks over a radio interface from a transmitting side. The method also comprises applying a single hybrid automatic repeat request (HARQ) process to the plurality of data blocks, whereby it is determined that at least one of the plurality of data blocks has been received ok and that at least one of the plurality of data blocks has not been received ok. The method also comprises generating a negative acknowledgement (NAK) for the plurality of data blocks in response to the at least one of the plurality of data blocks having not been received ok. The method also comprises outputting, from the receiver arrangement, at least one symbol obtained from the at least one of the plurality of data blocks which has been received ok.

Abstract: [Problem] An object of the present invention is to provide a control apparatus for an electric power steering apparatus that improves ripple accuracy of a torque, a velocity and so on, does not generate abnormal noises and does not generate an uncomfortable feeling with respect to a steering by compensating each-phase characteristics of a motor and the control apparatus and converting into a desired characteristic, and at the same time conforming each-phase characteristics.

Abstract: Systems and methods are provided for an equalizer. An equalizer includes a first voltage correcting circuit configured to correct a communication signal by applying a first variable corrective voltage to the communication signal, the first corrective voltage having a voltage level selected according to a first adjustable granularity. A second voltage correcting circuit is configured to further correct the communication signal by applying a second variable corrective voltage to the communication signal, the second corrective voltage having a voltage level selected according to a second adjustable granularity that is different from the first adjustable granularity.

Abstract: Embodiments of the present disclosure enable bandwidth extension of receiver front-end circuits without the use of inductors. As a result, significantly smaller and cheaper receiver implementations are made possible. In an embodiment, bandwidth extension is achieved by virtue of very small floating capacitors that are coupled around amplifier stages of the receiver front-end circuit. Each of the capacitors is configured to generate a negative capacitance for the preceding stage (e.g., equalizer or amplifier), thus extending the bandwidth of the preceding stage. A capacitively-degenerated cross-coupled transistor pair allows bandwidth extension for the final (e.g., amplifier) stage. Embodiments further enable DC offset compensation with the use of a digital feedback loop. The feedback loop can thus be turned on/off as needed, reducing power consumption.