Abstract: A multi-slicing horizontal synchronization signal generating apparatus and method is provided. The apparatus includes a slicer, a numerically controlled oscillator (NCO), a first phase detector, a second phase detector and a calibration circuit. The slicer performs edge detection on a video signal having a first horizontal synchronization, and generates a first detection signal and a second detection signal according to a first voltage level and a second voltage level, respectively. The NCO generates a second horizontal synchronization signal. The first phase detector detects a first phase difference between the first detection signal and the second horizontal synchronization signal, and the second detector detects the second phase difference between the second detection signal and a reference time point. The calibration circuit generates a calibration signal according to the first phase difference and the second phase difference.

Abstract: Soft decision sections (503, 506) provisionally decide each modulated signal (502, 505) separated using an inverse matrix calculation of a channel fluctuation matrix at separation section (501). Signal point reduction sections (508, 510, 514, 516) reduce candidate signal points of a multiplexed modulated signal using the provisional decision results (504, 507). Soft decision sections (512, 518) make a correct decision using the reduced candidate signal points and obtain received data (RA, RB) of each modulated signal. This allows received data RA, RB with a good error rate characteristic to be obtained with a relatively small number of calculations without reducing data transmission efficiency.

Abstract: A multi-chip stack structure and a signal transmission method are disclosed in specification and drawing, where the multi-chip stack structure includes first and second chips. The first chip includes a first inductance coil with a first series capacitor, and the second chip includes a second inductance coil with a second series capacitor. The first and second inductance coils are magnetically coupled to each other. The magnetically coupled inductance coils and the capacitors constitute a coupling filter.

Abstract: Methods and apparatus enabling a wireless network to generate data that can be used by a receiver (e.g., UE) to resolve the contributions of individual transmitters, such as to determine its location without resort to external devices such as GPS satellites. In one embodiment, the wireless network comprises a single frequency network (SFN), and a unique base station identifier is embedded within the data, and encoded in a manner which allows the UE to calculate path characteristics (such as path latency, and Direction of Arrival) to triangulate its position. In one variant, the data encoding comprises weighting frames of data from different base stations using an orthogonal matrix. Advantageously, the encoding and embedded identifier are also transparent to legacy UE, thereby allowing for implementation with no infrastructure or UE modifications other than software. Network and user apparatus implementing these methodologies, and methods of doing business, are also disclosed.

Abstract: A method and apparatus for the transmission of multiple control characters of the same type to a receiver to improve the retention of transmitter to receiver synchronization in a noisy environment having receiver code that is less complex and does not require an increase in the bandwidth of the system since the control codes are already utilized to initiate other functions. Detection of any of the control characters of the same type by the receiver allows the receiver to maintain proper synchronization. The receiver will detect these control signals and anticipate the occurrence of an event within a predetermined time period.

Abstract: Systems, methods, and computer readable media for fractional pre-emphasis of multi-mode interconnect are disclosed. According to one aspect, the subject matter described herein includes a method for fractional pre-emphasis of multi-mode interconnect. Multiple bits of binary data are periodically received. For each period, the multiple bits of binary data are encoded into multiple scalar values, each value representing a level of an analog signal to be output over a multi-mode interconnect system during the current period. Multiple analog signal outputs are generated corresponding to multiple scalar values, each signal output being driven to a level according to its corresponding scalar value. For each representative scalar value, a difference between the scalar value generated during the current period and the scalar value generated during the previous period is determined, and a pre-emphasis signal that is proportional to the difference is generated.

Abstract: Digital video data is transmitted from a video source (61) to a video sink (62) as a group of three multilevel symbols (611, 612, and 613) per pixel color with each associated symbol being sent at a rate of three times the pixel clock (601). When eleven levels are used per symbol (611) and undesirable symbol groups having excess DC residual or minimal energy are eliminated, and a built-in-test symbol group is added for pixel alignment; there results a one-to-one correspondence between the remaining symbol groups available and the two-hundred and sixty possible states that are used in the TMDS physical layer that is in widespread commercial use.

Abstract: A first convolutional coder (building-block trellis coder) is used to establish a minimum squared Euclidian distance (MSED) between signal points within a coded constellation building block. A second convolutional encoder (tiling encoder) is designed to ensure that the building block's MSED is maintained between building blocks once they are tiled onto an integer lattice. When this approach is applied to the trellis code of the WiMAX standard, a 3 dB coding is realized. Recall that Wei's 16-state 4D code suffered from a 1.36 dB due to constellation expansion, resulting in a net 4.66 dB coding gain. Our building block approach recovers 1.33 dB of this loss with only a minor increase in coding complexity. We then use the building block approach to derive simpler and more powerful higher dimensional codes that provide further gains still over the Wei family of multidimensional codes.

Abstract: The present invention discloses a single-wire asynchronous serial interface, and a method for transmitting commands and data through one transmission wire, wherein the transmission wire is capable of transmitting signals of three level states. The disclosed interface comprises a signal level extraction circuit receiving signals transmitted through the wire and outputting logic or functional bits according to the received signals; a clock extraction circuit generating clock signals according to the functional bits, and a memory circuit controlled by the clock signals and storing the logic bits. The disclosed method comprises: using two of the level states to represent logic 0 and logic 1, and the third of the states as a functional bit; and determining whether a group of signals is a command or data by the existence of a functional bit within the group.

Abstract: An apparatus and method are disclosed to encode binary data into trinary data. Applicants' method provides binary data, and encodes that binary data into trinary data. By “binary data,” Applicants mean a plurality of bits, wherein each of those bits comprises a value selected from the group consisting of a first value and a second value. By “trinary data,” Applicants mean a plurality of bits, wherein each of those bits comprises a value selected from the group consisting of a first value, a second value, and a third value. The trinary data may be stored in ROM optical disks, nano-sized indentations in a thin-film, or multi-level magnetic storage. The trinary data may be also transmitted via three light levels in an optical communications network.

Abstract: A novel and useful apparatus for and method of nonlinear adaptive phase domain equalization for multilevel phase coded demodulators. The invention improves the immunity of phase-modulated signals (PSK) to intersymbol interference (ISI) such as caused by transmitter or receiver impairments, frequency selective channel response filtering, timing offset or carrier frequency offset. The invention uses phase domain signals (r, ?) rather than the classical Cartesian quadrature components (I, Q) and employs a nonlinear adaptive equalizer on the phase domain signal. This results in significantly improved ISI performance which simplifies the design of a digital receiver.

Abstract: The invention relates to a method for demodulating information emitted by amplitude modulation with two levels by a reader (2) to a transponder (4), comprising a step to determine if this symbol is identical to or is different from the previous symbol, after each symbol.

Abstract: A system and method for generating test patterns of baseline wander, such as worst-case test patterns commonly referred to as killer packets. The number of steps required to cycle an output of a multi-level encoder in order to arrive at an anticipated level is determined. A test packet generator then generates the test patterns according to the determined steps and the state of a scrambler.

Abstract: A data communication system, comprising at least three signal conductors and a first and a second power supply terminal, for supplying currents of mutually opposite direction to the signal conductors respectively. A driver circuit establishes respective combinations of currents through the signal conductors from a selectable set of combinations, which includes combinations with currents from the first supply terminal and to the second supply terminal, so that a sum of the currents through the signal conductors substantially has a same value for each combination and at least one of the conductors in operation does not merely function in a differential-pair relation with another one of the conductors, the driver circuit determining which of the combinations from the set are established depending on information to be transmitted.

Abstract: A method of allocating sub-channel signal interleaving patterns to BSs forming a wireless communication system that divides a frequency band into a plurality of sub-carriers and including a plurality of sub-channels, which are a set of predetermined adjacent sub-carriers. The method includes: creating a basic orthogonal sequence having a length identical to a number of the sub-carriers forming the sub-channel; creating a plurality of sequences having a same length as the basic orthogonal sequence by cyclic-shifting the basic orthogonal sequence a predetermined number of times or performing a modulo operation based on a number of the sub-carriers forming the sub-channel, after adding a predetermined offset to the cyclic-shifted basic orthogonal sequence; selecting a predetermined number of sequences corresponding to a number of the BSs from among the plurality of sequences; and allocating the selected sequences as the sub-channel signal interleaving patterns for the BSs.

Abstract: A method for adapting filter cut-off frequencies for the transmission of discrete multitone symbols, where a transmit symbol datastream consisting of discrete multitone symbols is applied to an interpolation device, the transmit symbol datastream is interpolated with a symbol rate in the interpolation device, an interpolated symbol datastream is filtered in a first low-pass filtering device in accordance with a first filter cut-off frequency, which can be predetermined by a first filter cut-off frequency determining device, a digital symbol datastream obtained after a digital-analog conversion, transmission and analog-digital conversion, is filtered at the receiver end in a second low-pass filtering device in accordance with a second filter cut-off frequency, which can be predetermined by a second filter cut-off frequency determining device, in order to provide an equalized symbol datastream, the equalized symbol datastream is decimated in a decimation device and the decimated received symbol datastream consi

Abstract: A data transmitting apparatus has improved security against eavesdropping for secret communication using Y-00 protocol. The multi-level code generation section generates, based on key information, a multi-level code sequence in which a signal level changes so as to be approximately random numbers. The multi-level processing section generates a multi-level signal having a level which corresponds to a combination between information data and the multi-level code sequence. The error signal generation section generates an error signal which changes randomly. The accumulation section accumulates the error signal, and outputs an accumulated error signal. The adding section adds the accumulated error signal to the multi-level signal, and outputs a variable multi-level signal. The modulator section modulates the variable multi-level signal, and outputs a modulated signal.

Abstract: A driver circuit is coupled to an optical waveguide transmitter. The driver circuit has a current generator that is in series with the transmitter, and a current robbing circuit is coupled to the transmitter. The current robbing circuit is to divert first and second amounts of current from the transmitter, in accordance with predetermined values of first and second bit streams, respectively, in which data is received to be transmitted. Other embodiments are also described and claimed.

Abstract: To provide a receiving apparatus which is capable of demodulating information data from a multi-level modulated signal, which is generated by using a Y-00 protocol, without using high-performance component parts. In the receiving apparatus, the soft decision section 211 performs soft decision on the multi-level signal 22, in which a fixed decision level is used. A converted data identification section 214 performs logical decision on a value of the converted information data 25 in accordance with a highest-order bit of a multi-level code sequence 23 and a decision result 24 of the soft decision. A data reproduction section 215 performs an XOR operation between the converted information data 25 and a lowest-order bit of the multi-level code sequence 23, and outputs a resultant thereof as information data 23.

Abstract: Provided is a communication system using a space division multi-user multiple input multiple output (SD-MIMO) communication method. A transmission apparatus may transmit, to each of terminals included within a coverage, common control information commonly transmitted to the terminals and individual control information individually transmitted to each of the terminals. The transmission apparatus does not precode the common control information and transmits the non-precoded common control information. The transmission apparatus precodes the individual control information and transmits the precoded individual control information.

Abstract: Multi-level modulation is performed with a signal point constellation in which any three adjacent signal points on a phase plane form an equilateral triangle and at least a distance between a signal point closest to the origin of the phase plane and the origin is increased within a range that the transmission mean power remains unchanged.

Abstract: A computer program comprises instructions for advertising a plurality of communication modes. In response to detecting that one or more communication modes of a second physical layer module have been advertised to a first physical layer module, the computer program synchronizes the communication mode between the first and second physical layer modules based on the plurality of advertised communication modes of the first physical layer module and the one or more advertised communication modes of the second physical layer module. In response to not having detected that one or more communication modes of the second physical layer module have been advertised to the first physical layer module, the computer program detects whether the second physical layer module has been preset to communicate in a full duplex mode, and sets the communication mode between the first physical layer module and the second physical layer module to the full duplex mode.

Abstract: A joint detection system and associated methods are provided. The joint detection system is configured to perform joint detection of received signals and includes a joint detector accelerator and a programmable digital signal processor (DSP). The joint detector accelerator is configured to perform front-end processing of first data inputted to the joint detector accelerator and output second data resulting from the front-end processing. The joint detector accelerator is further configured to perform back-end processing using at least third data inputted to the joint detector accelerator. The programmable DSP is coupled to the joint detector accelerator, and the programmable DSP is programmed to perform at least one intermediate processing operation using the second data outputted by the joint detector accelerator. The programmable DSP is further programmed to output the third data resulting from the intermediate processing operation to the joint detector accelerator.

Abstract: A data communication apparatus which improves security against eavesdropping is provided for secret communication using Y-00 protocol. In a data transmitting apparatus 101, a multi-level code generation section 111 generates, based on key information 11, a multi-level code sequence 12 in which a signal level changes so as to be approximately random numbers. A multi-level processing section 112 generates a multi-level signal 13 having a plurality of levels each corresponding to a combination between information data 10 and the multi-level code sequence 12. A level conversion section 113 divides the plurality of levels of the multi-level signal 13 into several groups, and allocates one level of a converted multi-level signal 21 to a plurality of levels included in each of the several groups in an overlapped manner. The level conversion section 113 then converts the multi-level signal 13 into the converted multi-level signal 21.

Abstract: The disclosure relates to a method and apparatus for providing efficient signal transmission. Conventional linear amplifiers are most efficient when operated in compressed mode. In the compressed mode, the digital power amplifier switches between the on and off modes. A digital power amplifier operates in compressed mode only if the incoming signal is an on-off constant envelop signal. In one embodiment, the disclosure provides a method and apparatus for converting a digital baseband signal to on-off constant envelop signals for processing through binary-weighted or thermometer-weighted amplifier which are operated in compressed mode.

Abstract: When a receiver (200) receives a signal transmitted from a transmitter, an A/D converter (204) converts the signal into a digital signal having two or more levels by A/D conversion. A zero-level detector (207) converts the signal into a two-level digital signal of positive and negative levels. The converted signals are subjected to spectrum despreading by correlators (206, 208), respectively. Whichever signal has a higher intensity is selected by absolute value detectors (209, 210), a comparator (211), and a switch (212). A decoder (213) decodes the selected signal. In a receiving state where the zero-level detector (207) is selected, the transmitter transmits the transmission signal after the signal is converted into a two-level signal. In a receiving state where the A/D converter (204) is selected, the transmitter transmits the transmission signal after the signal is converted into a signal having two or more levels.

Abstract: A serial communications architecture for communicating between hosts and data store devices. The Storage Link architecture is specially adapted to support communications between multiple hosts and storage devices via a switching network, such as a storage area network. The Storage Link architecture specifies various communications techniques that can be combined to reduce the overall cost and increase the overall performance of communications. The Storage Link architecture may provide packet ordering based on packet type, dynamic segmentation of packets, asymmetric packet ordering, packet nesting, variable-sized packet headers, and use of out-of-band symbols to transmit control information as described below in more detail. The Storage Link architecture may also specify encoding techniques to optimize transitions and to ensure DC-balance.

Abstract: The mixer of a transmit chain of a wireless transmitter (such as the transmitter of a cellular telephone handset) is driven with low third harmonic in-phase (I) and quadrature (Q) signals. The low third harmonic I and Q signals have three or more signal levels, and transition between the these three or more signal levels at times such that each of the I and Q signals approximates a sine wave and has minimal third harmonic spectral components. In one example, reducing the third harmonic components of the I and Q signals simplifies design of amplifier stages of the transmitter and helps reduce receive band noise.

Abstract: Two decoding algorithms are introduced for the decoding of multi-level coded modulation and other types of coded modulation involving component codes and interleaving operations. An improved hard iterative decoding (IHID) algorithm is presented that improves upon a hard iteration decoding technique by adding a stopping criterion. Also, a list Viterbi hard iteration decoding (LV-IHID) algorithm is presented that employs list decoding in conjunction with the IHID algorithm. Both of these decoding algorithms improve upon conventional multi-stage decoding by reducing the effective error multiplicity that is observed at the lowest coding level. It is demonstrated that the LV-IHID algorithm performs close to soft iterative decoding. The computational and delay complexity of the proposed decoding algorithms compare favorably with soft iterative decoding strategies. Also, a novel labeling strategy for MLC design is presented.

Abstract: Two decoding algorithms are introduced for the decoding of multi-level coded modulation and other types of coded modulation involving component codes and interleaving operations. An improved hard iterative decoding (IHID) algorithm is presented that improves upon a hard iteration decoding technique by adding a stopping criterion. Also, a list Viterbi hard iteration decoding (LV-IHID) algorithm is presented that employs list decoding in conjunction with the IHID algorithm. Both of these decoding algorithms improve upon conventional multi-stage decoding by reducing the effective error multiplicity that is observed at the lowest coding level. It is demonstrated that the LV-IHID algorithm performs close to soft iterative decoding. The computational and delay complexity of the proposed decoding algorithms compare favorably with soft iterative decoding strategies. Also, a novel labeling strategy for MLC design is presented.

Abstract: A method and apparatus for encoding data of arbitrary length. Data of arbitrary size is divided into one or more data blocks. One or more length blocks are generated that include length information identifying a quantity of the one or more data blocks into which the data is divided, wherein the length information can be determined by a number of reads of the length blocks and without examining the data blocks. The length blocks and the data blocks are transmitted.

Abstract: A parallel channel timing recovery circuit. The parallel timing recovery circuit comprises multiple prefilters receiving parallel channel outputs and providing prefilter outputs. Multiple sampling filters receive the prefilter outputs and provide multiple discrete time signal samples. A self-timing circuit has multiple inputs receiving the multiple discrete time signal samples. The self-timing circuit provides a sampling control output to the sampling filters. The sampling control output is based on a composite of the multiple discrete time signal samples. Each of the sampling filters generates a discrete time signal sample based on the sampling control output and the prefilter outputs.

Abstract: Soft decision sections (503, 506) provisionally decide each modulated signal (502, 505) separated using an inverse matrix calculation of a channel fluctuation matrix at separation section (501). Signal point reduction sections (508, 510, 514, 516) reduce candidate signal points of a multiplexed modulated signal using the provisional decision results (504, 507). Soft decision sections (512, 518) make a correct decision using the reduced candidate signal points and obtain received data (RA, RB) of each modulated signal. This allows received data RA, RB with a good error rate characteristic to be obtained with a relatively small number of calculations without reducing data transmission efficiency.

Abstract: A data communication apparatus improves security against eavesdropping for secret communication by using Y-00 protocol. A multi-level code generation section generates, based on key information, a multi-level code sequence in which a signal level changes so as to be approximately random numbers. A level conversion section irreversibly converts the multi-level code sequence such that a converted multi-level code sequence does not constitute a mapping of the multi-level code sequence. A multi-level processing section generates a multi-level signal having a plurality of levels each corresponding to a combination between the information data and the multi-level code sequence. A modulator section modulates a multi-level signal in a predetermined modulation method and outputs a modulated signal.

Abstract: A highly concealable data communication apparatus based on an astronomical complexity and causing an eavesdropper to take a significantly increased time to analyze a cipher text, is provided. In a multi-level code generation section 111a, a random number sequence generation section 141 generates, based on predetermined key information 11, a plurality of modulation pseudo-random number sequences. The plurality of modulation pseudo-random number sequences is inputted to a multi-level conversion section 142 as a part of an input bit sequence which is converted into a multi-level code sequence 12. A multi-level processing section 111b combines the multi-level code sequence 12 and information data 10, and generates a multi-level signal 13 having a plurality of levels corresponding to a combination of the multi-level code sequence 12 and the information data 10.

Abstract: Semiconductor devices, a system including said semiconductor devices and methods thereof are provided. An example semiconductor device may receive data scheduled for transmission, scramble an order of bits within the received data, the scrambled order arranged in accordance with a given pseudo-random sequence. The received data may be balanced such that a difference between a first number of the bits within the received data equal to a first logic level and a second number of bits within the received data equal to a second logic level is below a threshold. The balanced and scrambled received data may then be transmitted. The example semiconductor device may perform the scrambling and balancing operations in any order. Likewise, on a receiving end, another semiconductor device may decode the original data by unscrambling and unbalancing the transmitted data. The unscrambling and unbalancing operations may be performed in an order based upon the order in which the transmitted data is scrambled and balanced.

Abstract: An arrangement and method for signal transmission between different voltage domains is disclosed. One embodiment provides a first signal processing unit receiving a first supply voltage. A second signal processing unit receives a second supply voltage, the first supply voltage and the second supply voltage overlap each other in a first overlap range. A third signal processing unit receives a third supply voltage, the second supply voltage and the third supply voltage overlap each other in a second voltage overlap range. A first information signal from the first signal processing unit is transmitted to the second signal processing unit. A second information signal dependent on the first information signal from the second signal processing is transmitted to the third signal processing unit.

Abstract: A radio communication apparatus, a radio communication method, and a radio communication system, which are capable of improving receiving reliability of predetermined bits such as bits having a high degree of importance, and the like, are provided. A code length L is decided based on the modulation system and the coding rate being specified, and the bit length of S2. The relay station decides a coding rate of S1 from the code length L. In the case of 16 QAM, since a half of all bits correspond to the bits used as the object of the quadrant discrimination, the bit length of S1 is set to L/2. Therefore, the coding rate of S1 is 2(LS1)/L, where the bit length of S1 is LS1. In the present example, S1 is coded and gives S1+P1, and S2 is coded and gives S2+P4. P1 denotes the parity bit of S1, and P4 denotes the parity bit of S2.

Abstract: An ultra-wideband clear channel assessment system uses a double-window energy technique for energy detection, which indicates a clear or busy channel.

Abstract: A system and method for estimating a channel spectrum. The method includes: (a) receiving an input signal from a channel, where the input signal includes one or more major echoes and zero or more minor echoes introduced by the channel; (b) identifying the one or more major echoes present in the input signal; (c) identifying the minor echoes from a filtered autocorrelation function of the input signal in response to a determination that there is only one major echo; (d) identifying the minor echoes from a filtered power spectrum of the input signal in response to a determination that there is more than one major echo; (e) computing a channel spectrum estimate from the major echoes and minor echoes; where the channel spectrum estimate is usable to remove at least a portion of the one or more major echoes and one or more minor echoes from the input signal.

Abstract: The present invention aims to provide a transmission device that, in a communication system using multilevel modulation with 2?n levels (n being an integer greater than or equal to two), limits the run length to a predetermined value or less and guarantees DC balance. The transmission device, which transmits data to which 2?n amplitude modulation has been applied, separates data for transmission into n data sequences; encodes one of the n data sequences to guarantee run length, thereby generating a converted data sequence; generates an intermediate data sequence by either inverting or not inverting a specific data sequence so that, based on candidate data, the next output voltage guarantees DC balance; and applies 2?n amplitude modulation to n-bit symbols each of which has a bit in the intermediate data sequence as a most significant bit and bits in the remaining data sequences, excluding the specific data sequence, as subsequent bits.

Abstract: A communication system includes a first device and a second device connected to the first device by a single communication line. The first device includes a first transmitting portion which transmits to the second device a pulse signal set to a predetermined cycle that differs according to data, and a first receiving portion which reads data transmitted from the second device based on a voltage value of a transmission signal transmitted over the communication line. The second device includes a second transmitting portion which transmits to the first device a voltage signal set to a predetermined voltage value that differs according to the data, and a second receiving portion which reads data transmitted from the first device based on a pulse signal cycle of the transmission signal transmitted over the communication line.

Abstract: A moderate cost and complexity digital radio receiver system having enhanced instantaneous dynamic range response to the receipt of simultaneous signals and also providing large single signal dynamic range. Multiple signal instantaneous dynamic range improvement is achieved through use of a suppressed zero signal amplitude representation arrangement having a selected number of signal amplitude representing digital bits rather than the larger entire array of digital output bits of the receiver system's analog to digital converter. Digital apparatus for accomplishing the selection of desired high order bits from the analog to digital converter output is also disclosed in detail. Use of a “Monobit” and related simplified Fourier transformation radio receivers as disclosed in identified previous patents of the recited inventors and colleagues is preferred for embodying the digital radio receiver circuit included in a present system.

Abstract: A transmission apparatus obtains, for each transmission to a reception apparatus, information on a per-bit transmission of a transmission bit string, and controls a per-bit transmission condition for a current transmission bit string such that a per-bit transmission quality of the transmission bit string approaches evenly based on cumulative information on the transmissions up to the last transmission.

Abstract: Provided are a signal amplifying apparatus and method and a wireless transmitter using the same. The signal amplifier includes a polar coordinate converter configured to output an envelope signal and a phase signal by converting a signal to a polar coordinate, a multilevel quantizer configured to output a multilevel quantized signal by quantizing the envelope signal to multiple levels, an amplification state controller configured to control an amplification state using the multilevel quantized signal, and a power amplifier configured to amplify the phase signal according to the controlled amplification state.

Abstract: Systems and methods for determining a slicing level which is used as a threshold to determine whether timeslots of an incoming data signal contain ones or zeros. The method of one embodiment comprises receiving a data signal, identifying a maximum level of the data signal, identifying a minimum level of the data signal, determining an average of the minimum and maximum levels, and then using the average of the minimum and maximum levels as a slicing level to identify bits of a data packet embodied in the data signal.

Abstract: A MIMO communication system implements an interleaver design with multiple encoders for more than two transmit antennas for high throughput WLAN communication systems. Multiple encoders are utilized in the transmitter and multiple decoders are utilized in the receiver, wherein each encoder operates at lower clock speed than would be necessary with a single encoder. In conjunction with using multiple encoders, a modified interleaving function for each spatial stream processing allows fully exploring the diversity gains. The provided interleaving function is suitable for transmitter architectures with multiple encoders. Similarly, a modified de-interleaving function is provided that is suitable for receiver architectures with multiple decoders.

Abstract: A known sequence of symbols is located within a transmitted sequence of symbols by estimating the phase differences between offset symbols within a portion or more of the transmitted sequence, estimating the phase differences between offset symbols in the known sequence, and determining that the symbols within the portion or more of the transmitted sequence are the known sequence if the phase difference estimates determined from the symbols within the portion or more of the transmitted sequence are substantially equal to the phase difference estimates determined from the known sequence.

Abstract: A low-power pulse generator is provided for use in ultra-wideband (UWB) systems. In one embodiment, the UWB pulse generator includes four pulse generators, such as digital triangular pulse generators, that generate Gaussian-like pulses of alternating polarity at different time offsets. The resulting four Gaussian-like pulses are combined to generate a UWB pulse that approximates the fifth derivative of a Gaussian pulse. In other embodiments, different-order derivatives of a Gaussian pulse may be approximated by combining different numbers of Gaussian-like pulses. The UWB pulse generator is preferably implemented with CMOS circuitry to limit power consumption.

Abstract: An wireless terminal includes a demodulating unit which comprises an FV (fading vector) estimating unit for receiving a CPICH spread/demodulated signal to output an FV signal with a reduced noise ratio; a phase synchronization unit for multiplying a PDSCH spread/demodulated signal with a complex conjugate of the FV signal to correct the phase offset of the PDSCH I and Q signals to send the resulting PDSCH I and Q signals to a multi-level QAM amplitude synchronization detection unit and to an amplitude demodulating unit; a first-quadrant transformation unit for collecting the second to fourth quadrant signals of the phase-synchronized PDSCH I and Q signals; and a threshold value detecting unit for calculating a multi-level QAM threshold value from the first quadrant signals and the FV signals to send the threshold signal to an amplitude demodulating unit. The amplitude demodulating unit effects amplitude demodulation to output multi-level QAM demodulated signals.