Abstract: A device and system communicates data and includes a modulation and mapping circuit that modulates and maps data symbols into a plurality of multiple subcarrier frequencies that are orthogonal to each other to form an Orthogonal Frequency Division Multiplexed (OFDM) communications signal based on a fixed or variable OFDM symbol rate. A pseudo-random signal generator is operative with the modulation and mapping circuit and generates pseudo-random signals to the modulation and mapping circuit based on an encryption algorithm for frequency hopping each subcarrier at an OFDM symbol rate to lower any probability of interception and detection, reduce power per frequency (dB/Hz/sec), and lower any required transmission power while maintaining an instantaneous signal-to-noise ratio, wherein selected subcarriers are turned ON or OFF to increase the transmit power and signal-to-noise ratio and reduce the Inter-Carrier Interference (ICI) and adverse effects of frequency selective fading.

Abstract: A technique to determine carrier frequency offset (CFO) phase shift and perform channel estimation for symbols of a signal communicated across a multiple-input-multiple-output (MIMO) communication channel, in which preambles utilized for channel estimation are sent over more than one time block. Because the transmission of preambles used for channel estimation are sent over multiple time blocks, a CFO phase shift that is flat across tones of an OFDM signal is experienced between preambles of the two time blocks. Upon detection of the CFO phase shift, a weighting matrix used for channel estimation is modified to account for the CFO phase shift, in order to perform the channel estimation with correction for the CFO phase shift.

Abstract: A differential receiver which provides for estimation and tracking of frequency offset, together with compensation for the frequency offset. Estimation and tracking of the frequency offset is undertaken in the phase domain, which reduces computational complexity and allows frequency offset estimation and tracking to be accomplished by sharing already-existing components in the receiver. Compensation for the frequency offset can be performed either in the time domain, before differential detection, or in the phase domain, after demodulation, or can be made programmably selectable, for flexibility.

Abstract: A method and apparatus for correcting of phase errors in a coherent optical receiver are disclosed. Embodiments include a method for calculating a phase error between in-phase and quadrature-phase component signals, multiplying the phase error by one of the component signals and subtracting the result from the other component signal to output a corrected signal.

Abstract: An apparatus for independently extracting streams from a hierarchically-modulated signal and performing a soft-decision, and a method thereof are provided. The apparatus includes: a synchronizing unit for receiving a hierarchically-modulated signal configured of an I-channel signal and a Q-channel signal from an external device and performing a synchronizing process on the received signal; a divaricating unit 410 for divaricating the synchronized signal configured of the I-channel signal and the Q-channel signal from the synchronizing unit; a high priority (HP) stream extracting and soft-decision unit for extracting a HP stream from one of the divaricated signals, and performing a soft-decision; a processing unit for processing the other of the divaricated signals to allow constellation points to be distinguished; and a low priority (LP) stream extracting and soft-decision unit for extracting a LP stream from the processed signal from the processing unit and performing a soft-decision.

Abstract: Aspects of a method and system for signal phase variation detection in communication systems are presented. Aspects of the system may enable detection of phase change between a current received symbol, and one or more previous received symbols. Based on the phase change a channel estimation filter bandwidth may be selected for despreading and/or descrambling one or more subsequent received symbols. In addition, a decision may be made as to whether the subsequent received symbols are to be received based on a closed loop system, or based on an open loop system.

Abstract: A carrier phase and symbol timing recovery circuit and method may be used for robust synchronization in a broadcasting ATSC receiving system. Carrier phase and symbol timing offsets may be simultaneously adjusted by using redundancy information contained in an ATSC signal spectrum. A desired sampling time instant and carrier phase offset for synchronization may be simultaneously obtained due to correlation between carrier phase and symbol timing detectors.

Abstract: A method for communication using a modulation scheme defined in a signal space includes determining demodulation confidence levels at a plurality of points distributed over the signal space. Weights are assigned to the respective points responsively to the demodulation confidence levels. A signal is received and demodulated using an adaptive loop so as to derive a corresponding signal point in the signal space. The adaptive loop is adjusted responsively to a weight assigned to the derived signal point.

Abstract: According to an embodiment of the invention, a method and system is disclosed for determining log-likelihood ratios for a coded set of individual bits (40) of a quadrature amplitude modulation (QAM) codeword. In the method at most two constant values (33,35) may be determined to perform a set of predetermined functions, the output of each of function is based on the constant values and at least one received component corresponding to the codeword, to determine log-likelihood ratios (37) for each individual bit of the set of individual bits of the codeword. The QAM codeword may correspond to at least a portion of a signal of a wireless device, such as a mobile third-generation device operating according to a Wideband Code-Division Multiple Access (WCDMA) standard.

Abstract: A digital demodulator includes a resonator having a resonance frequency same as a carrier frequency to store a charge corresponding to a digital signal modulated by phase shift keying, a capacitor to store the charge of the resonator, an amplifier including an input node and an output node between which the capacitor is connected to convert a stored charge of the capacitor into a voltage signal, and a controller configured to accumulate in the resonator the charge induced by the frequency signal modulated by phase shift keying in a first control mode and configured to transfer the charge of the resonator to the capacitor in a second control mode, to output the voltage signal corresponding to the stored charge of the capacitor from the output node of the amplifier.

Abstract: A demodulator system and method is disclosed. In an embodiment, the demodulator system can include a Coordinate Rotation Digital Computer (CORDIC) mixer to mix a first signal substantially to baseband using a first input frequency and to mix a second signal substantially to baseband using a second input frequency. In another embodiment, the demodulator system can include a phase detector to receive a pilot signal and to generate a control signal to adjust a decimation rate based on the pilot signal. In another embodiment, the demodulator system can include a symbol decoder to determine a symbol from a phase signal.

Abstract: According to one embodiment, a demodulation system, such as DPSK in a SPS system can be used with soft decision information to correct bit errors. Soft decision information values are utilized to switch hard decision bits of the differentially decoded signal. A parity check can be used to determine if the toggling of the bit corrected the parity error.

Abstract: A multi-mode digital down-converter for down-converting an incoming IF signal to baseband according to a selected air interface standard. The down-converter comprises a re-configurable gain control block controlled by a first gain parameter for amplifying the incoming IF signal and a mixer stage for down-converting the amplified incoming IF signal to produce a first in-phase baseband signal. The down-converter further comprises a reconfigurable CIC decimation filter block controlled by a second gain parameter and a first decimation parameter. The reconfigurable CIC decimation filter block filters the first in-phase baseband signal according to the second gain parameter and decimates the first in-phase baseband signal according to the first decimation parameter. The first and second gain parameters and the first decimation parameter are determined by the selected air interface standard.

Abstract: Provided is a sub-harmonic frequency mixer having a structure in which two terminals of transistors receiving a Radio Frequency (RF) signal and a Local Oscillation (LO) signal are coupled. The frequency mixer is composed of a single-level structure of transistors and thus can be driven at a lower supply voltage compared to a common frequency mixer. A direct-conversion receiver employing such a frequency mixer needs an RF signal and an LO signal sources of single-phase. Therefore, the direct-conversion receiver has an architecture that simplifies a whole RF transceiver circuit and thus can be advantageously applied in implementing SoC (System-on-Chip) for a low power, high integration, low price and subminiature wireless transceiver circuit.

Abstract: Process for the blind demodulation of a linear waveform source or transmitter in a system comprising one or more sources and an array of sensors and a propagation channel. The process comprises at least the following steps: the symbol period T is determined and sampled to Te such that T=ITe (I being an integer); a spatio-temporal observation z(t), the mixed sources of which are symbol trains from the transmitter, is constructed from the observations x(kTe); an ICA-type method is applied to the observation vector z(t) in order to estimate the Lc symbol trains {am-i} that are associated with the channel vectors ?z,j=?z(kj); the Lc outputs (âm,j, ?z,j) are arranged in the same order as the inputs (am-i,hz(i)) so as to obtain the propagation channel vectors ?z,j=?z(kj); and the phase ?imax associated with the outputs is determined.

Abstract: A system for demodulation of the Loran Data Channel transmitted over the Enhanced Loran (eLoran) system including a quadrature filter. The quadrature filter calculates the real and quadrature phase components of a received ninth pulse. The resultant components are used to obtain the angle of the ninth pulse. This angle is then compared with a set of pre-tabulated angles/symbols that are calculated using the same quadrature filter on thirty-two different simulated ninth pulses. The closest angle match gives the corresponding symbol. Such twenty-four symbols make up a single Reed Solomon encoded message. This message is then passed through a Reed Solomon decoder and the transmitted message is obtained.

Abstract: A symbol vector received from a multiple antenna transmitting array is detected using a sphere decoder. The sphere decoder is used to select from a set of candidate binary strings that string which is most likely to have been transmitted. Soft information for use in a turbo decoder or the like is obtained by considering cost functions for a set of candidate strings, including strings derived from the most likely string by flipping one or more bits thereof.

Abstract: A method for clock synchronisation between an amplitude-modulated or phase-modulated received signal (r(t)) and a transmitted signal (s(t)) estimates the timing offset (?) between the received signal (r(t)) and the transmitted signal (s(t)) by means of a maximum-likelihood method. The maximum-likelihood method in this context is realised by an estimation filtering (S40; S140) dependent upon the transmission characteristic, a subsequent nonlinear signal-processing function (S50; S150) and an averaging filtering (S60, S100; S180, S200). The received signal (r(t)) is especially a modified vestigial-sideband-modulated received signal (rVSB?(t)). The nonlinear signal-processing function (S50; S150) maintains the alternating component in the spectrum of the pre-filtered vestigial-sideband-modulated received signal (vVSB?(t)).

Abstract: Improved spur reduction architectures that improve linearity in direct radio frequency (RF) receiver architectures. Non-uniform sampling in the form of sampling clock phase (or frequency) modulation is used to induce phase (or frequency) modulation on signals that are being received from a given Nyquist zone. At the output of the ADC (analog-to-digital converter), the signals are de-modulated to remove the induced modulation based on the Nyquist zone that is being received. The de-modulation process results in non-desired spurious artifacts (interfering leakage signals and ADC spurs) being spread in the frequency domain. Strong spurious artifacts may be removed after measuring the induced modulation and de-modulating. For the case of weak spurious artifacts, the de-modulation for the desired Nyquist zone spread these signals in the frequency domain. Induced modulation on signals may also provide a dithering effect on the ADC.

Abstract: A real-time digital quadrature demodulation method and device for the ultrasonic imaging system are disclosed in this invention. In addition to a multiplying step and a filtering step, the method further comprises a sine and cosine table generating step for generating the sine and cosine table in real time, and a filter parameter generating step for generating corresponding filter parameters in real time to filter signals from the multipliers. The device comprises two multipliers, two filters, a sine and cosine table generating module, a filter parameter generating module, and two parameter memories. The real-time digital quadrature demodulation method and device for the ultrasonic imaging system according to the invention are capable of effectively saving the storage resource, and are easily controllable.

Abstract: The invention relates to a method and system for use in assessing the quality and integrity of a data transmission path or link between a data transmitting location and at least one receiving location at which a broadcast data receiver is located with means to allow an error rate calculation to be made with respect to a known data signal sequence which is inserted into the transmitted signal. On the basis of the calculations made and sent to the transmitting location a particular data modulation scheme is adopted to provide the most efficient data transmission method for each receiving location. The invention is of particular use in cable data transmission networks of the type which for example allow television channels and other services to be provided to a plurality of receiving locations.

Abstract: The device is used for decoding convolution-encoded reception symbols. In this context, transmission data are modulated with a modulation scheme to form symbols, which are encoded with a transmission filter to form convolution-encoded transmission symbols. A convolution-encoded transmission symbol contains components of several symbols arranged in time succession. These transmission symbols are transmitted via a transmission channel and received as reception symbols. The Viterbi decoder decodes the reception symbols by use of a modified Viterbi algorithm. Before running through the Viterbi decoder, the reception symbols are processed by a state-reduction device, which determines additional items of information relating to possible consequential states of the decoding independently of the decoding through the Viterbi decoder in every state of the decoding. The state-reduction device uses the additional items of information to restrict the decoding through the Viterbi decoder to given consequential states.

Abstract: When the first switching circuit outputs the output signal of the first selection filter, the receiver switches the output signal of the second switching circuit to the output signal of the delay compensator, and when the first switching circuit outputs the output signal of the second selection filter, the receiver switches the output signal of the second switching circuit to the output signal of the third selection filter.

Abstract: Phase trackers (7) for tracking phases of received data are provided with interpolators (20), error detectors (21,22), combiners (25) and indicator generators (26) for generating at least two streams of interpolated samples, for generating error signals per stream, and for generating an indicator signal for adjusting the interpolation, to avoid the use of sync words for phase tracking. The indicator generator (26) converts combined error signals into indicator signals for adjusting the interpolation through shifting sampling phases of interpolated samples.

Abstract: A synchronization acquiring device and method for realizing synchronization acquisition at high speed equivalent to that of parallel search with a simple constitution similar to that of series search. A synchronization acquiring device (100) has a superposition template acquiring section (120) for acquiring superposition template signals generated by superposing template signals on one another, a first correlation detecting section (110) for detecting preliminary correlation matching between a superposition template signal and the received signal and, if the preliminary correlation matching is not detected, detects preliminary correlation matching after replacing the superposition template signal with another superposition template signal, and a second correlation detecting section (130) detects, if preliminary correlation matching is detected, the final correlation matching between a superposition template signal out of the template signals and the received signal.

Abstract: A diversity antenna system and method comprising a plurality of antennas, a plurality of switches and a plurality of phase shifters, wherein the switches and the antennas are selectively opened and closed or switched on an off to achieve equiphasing. This system separates the noise signal from the useful signal in order to achieve a proper determination of the different phases. In addition there is a receiver which is configured to receive the output of the diversity system. The logic control unit is configured to perform particular steps or algorithms in order to achieve equiphasing of the received signals.

Abstract: Embodiments disclosed herein address the need in the art for an efficient multi-symbol deinterleaver. In one aspect, a plurality of memory banks are deployed to receive and simultaneously store a plurality of values, such as soft decision values determined from a modulation constellation, in accordance with a storing pattern. In another aspect, the storing pattern comprises a plurality of cycles, a selected subset of the plurality of memory banks and an address offset for use in determining the address for storing into the respective memory banks indicated for each cycle. In yet another aspect, the stored values may be accessed in order with a sequentially increasing index, such as an address. Various other aspects are also presented. These aspects have the benefit of allowing multiple symbol values to be deinterleaved in an efficient manner, thus meeting computation time constraints, and conserving power.

Abstract: In a wireless receiver that receives an electric signal that has undergone digital modulation, a sample-hold circuit converts a wireless modulated signal, which is a continuous time signal, to a discrete time signal, and the frequency band is converted and selected by means of a band-pass filter. A demodulation circuit carries out demodulation based on the instantaneous value of the voltage amplitude of the modulated signal. A shut-down circuit further effects adaptive control of the circuit shut-down time to minimize the circuit activation time while ensuring that the demodulation error rate of the demodulated baseband signal satisfies a value stipulated by the communication standard.

Abstract: A method and apparatus are provided for processing a windowed time division multiplexed signal received by a radio receiver. The method includes the steps of detecting (802) a pilot symbol within the windowed time division multiplexed signal, determining (804) a difference between the detected pilot symbol and a corrected pilot symbol where the corrected pilot signal has been corrected for distortion caused by windowing of the windowed time division multiplexed signal and calculating (806) a channel response estimate based upon the determined difference between the detected pilot symbol and corrected pilot symbol.

Abstract: A quadrature demodulator preweights an input signal prior to mixing with in-phase and quadrature clock signals. In an implementation with discrete phase rotation, a series of weighting circuits may be arranged before or after a select circuit to select the amount of phase rotation. Various implementations may include ratioed current mirrors to perform the weighting function, a stacked arrangement of mixers, an H-bridge input stage, integrated mixers and select circuits, and/or selectable gain stages such as gm cells to perform the weighting function.

Abstract: An orthogonal frequency division multiplex signal and a digital modulation signal or an analog modulation signal can be identified by blind processing. The modulation mode identifying apparatus comprises: a correlation signal generating circuit which generates a duplicate signal for correlation processing based on an unknown communication signal; an autocorrelation circuit which performs autocorrelation processing through carrying out sliding processing on the duplicate signal with respect to the unknown communication signal; a detection unit which detects information regarding a pilot symbol and a guide interval symbol of the communication signal based on a correlation value output obtained by the autocorrelation processing; and an identifying circuit which identifies a modulation mode of the unknown communication signal based on the information regarding the pilot symbol and the guide interval symbol of the communication signal.

Abstract: A quadrature frequency division multiplexing (“OFDM”) wireless receiver, including methods and devices for adaptive quantization of OFDM signals according to modulation and coding schemes and sub-carrier frequency responses, is provided. Efficient quantization may be utilized to reduce the large dynamic range of signals to achieve circuit simplification and chip area reduction. In one embodiment, a quantization circuit includes a quantization selector to select quantization thresholds according to modulation and coding schemes and sub-carrier frequency responses, and a non-uniform quantizer to reduce input dynamic range so that an output is represented by fewer bits than an input.

Abstract: A system for processing signal communications between a frequency translation module and an integrated receiver decoder. According to an exemplary embodiment, the decoder and the frequency translation module comprise a signal processing apparatus comprising an input for receiving an frequency shift keyed modulated signal, an amplifier having negative feedback coupled to said input, wherein said input is further coupled to a first source of reference potential and a second source of reference potential; and a tank circuit coupled between said differential amplifier and an output.

Abstract: A method and apparatus for efficiently selecting a demodulation scheme for a particular channel in a digital broadcast receiver supporting a plurality of demodulation schemes are provided. The method includes receiving the digital broadcast signal of the channel; attempting demodulation of the digital broadcast signal using a demodulation scheme corresponding to a sequential index; and if the demodulation attempt succeeds, restoring data and if the demodulation attempt does not succeed, attempting demodulation again using a demodulation scheme corresponding to a next sequential index.

Abstract: A first signal path having an amplifier and a second signal path having an amplifier with adjustable gain factor are provided. A signal applied to the first and second signal paths is amplified and demodulated on the first signal path. Concurrently, the signal is amplified on the second signal path with a gain factor, and a power of the signal amplified by the second signal path is determined and used for determining the gain factor. A signal conditioning circuit has first and second signal paths and a first and a second operating state. In the first operating state, the first signal path is arranged for amplification for a demodulation, and the second signal path is arranged for amplification for determination of a power of the signal present. In the second operating state, one of the two signal paths is inactive and the other is arranged for demodulating the signal present.

Abstract: A system and device communicates data. A modulation and mapping circuit modulates and maps data symbols into a plurality of multiple subcarrier frequencies that are orthogonal to each other to form an Orthogonal Frequency Division Multiplexed (OFDM) communications signal based on a fixed or variable OFDM symbol rate. A pseudo-random signal generator is operative with the modulation and mapping circuit for generating pseudo-random signals to the modulation and mapping circuit based on an encryption algorithm for frequency hopping each subcarrier at an OFDM symbol rate to lower any probability of interception and detection, reduced power per frequency (dB/Hz/sec), and lower any required transmission power while maintaining an instantaneous signal-to-noise ratio.

Abstract: A frequency modulation-frequency shift keying (FM/FSK) demodulator is provided, including a modulation signal input terminal for receiving a first modulation signal; a phase shifter for receiving the first modulation signal and then shifting its phase to output a second modulation signal; a multiplier connected to the modulation signal input terminal and the output of the phase shifter for multiplying the first modulation signal and the second modulation signal together to output a demodulation signal; an adder having at least two input terminals and an output terminal where the first input terminal receives the demodulation signal; a direct current (DC) compensation unit connected to the output terminal of the adder for compensating the DC of the demodulation signal and low-frequency offsets, and a demodulation signal output terminal connected to the output of the adder for outputting the demodulation signal.

Abstract: The present invention is directed to a receiver for a wire-free communication system for reception of a received signal which is modulated using a digital modulation method having a first frequency conversion device for production of a frequency-converted received signal by conversion of the received signal to an intermediate frequency. The receiver further includes a pre-filter for production of a filtered received signal from the frequency-converted received signal such that the received signal is band-limited, and an analogue/digital converter for production of a binary received signal from the filtered received signal by comparison of the filtered received signal with a level threshold.

Abstract: A modulated clock, a method of providing a modulated clock signal, an integrated circuit including a modulated clock and a library of cells including a modulated clock. In one embodiment, the modulated clock includes (1) a clock controller configured to generate a digital control stream and (2) clock logic circuitry having a first input configured to receive a clock signal and a second input configured to receive the digital control stream. The clock logic circuitry is configured to provide a modulated clock signal in response to the clock signal and the digital control stream, wherein the modulated clock signal has an effective frequency that differs from the first frequency.

Abstract: [Problems] To realize a log likelihood ratio calculation performed at a higher speed while the circuit size and the power consumption are reduced, regardless of the multilevel number of a modulation method. [Means for Solving the Problems] A hard-decision bit of the bits indicating the P-axial coordinate of a reception signal point is input to an area detection circuit, and based on the hard-decision bit input, the area detection circuit detects and outputs an area on the phase plane where the coordinate of the reception signal point is present. A soft-decision bit of the bits indicating the coordinate of the reception signal point is input to an LLR circuit, and based on the soft-decision bit input, the LLR circuit calculates a primary LLR. An LLR converter calculates the final LLR based on an output (area detection result) from the area detection circuit.

Abstract: A digital broadcasting transmission/reception system having an improved receiving performance and a signal processing method thereof. The transmission system includes a FEC encoder encoding an incoming signal according to a certain FEC scheme, a sync insertion unit inserting a sync into the encoded signal, a hidden pilot insertion unit inserting a hidden pilot into the sync-inserted signal, a pilot insertion unit inserting a pilot tone into the hidden-pilot-inserted signal, a pulse shaping filter pulse-shaping the pilot-tone-inserted signal with a certain roll-off factor, and a RF unit transmitting the pulse-shaped signal through a transmission channel band. Performances of equalization and synchronization acquirement can be enhanced in multipath conditions by utilizing the transmission system containing the hidden pilot.

Abstract: In a quadrature amplitude (QAM) demodulator, an auxiliary symbol may be utilized in place of the decision symbol to adjust the decision-feedback loops within the demodulator. For the formation and definition of the auxiliary symbol, the radius and angle information of the received signal or of the preliminary symbol may be used. Through use of the auxiliary symbol instead of the decision symbol, any error in the angle information due to the unknown frequency and phase deviation of the local oscillator may be ignored. An auxiliary symbol generator may be provided which, instead of assigning to the received signal an element from the predetermined symbol alphabet, generates an auxiliary symbol that lies on the most probable one of the nominal radii. Nominal radii may mean those radii on which in QAM the predetermined symbols of the alphabet lie in the plane determined by the quadrature signal pair. For the angle component of the auxiliary symbol, the angle information of the sampled digital signal may be used.

Abstract: An adaptive rotation angle control apparatus of this invention includes a communication quality approximating equation storage portion which stores a communication quality approximating equation including as variables reception quality information, amplitude fluctuation information, and a rotation angle; a computation portion which substitutes into the communication quality approximating equation the reception quality information and amplitude fluctuation information of the input information, and a rotation angle, and calculates the value of the communication quality approximating equation; and an adaptive control portion which provides a rotation angle to the computation portion, receives from the computation portion communication quality information, which is the value of the communication quality approximating equation calculated using the rotation angle provided, and determines the optimum rotation angle based on the received communication quality information.

Abstract: A method for implementing phase rotator circuits and phase rotator circuit of the invention includes a polyphase filter network to create a quadrature phase version of the input signal. The polyphase filter network is partitioned into a first part that is physically isolated from the phase rotator circuit and a second part that is embedded in the phase rotator circuit. The second part of the polyphase filter is coupled to the first part of the polyphase filter by a high-pass equalizing buffer stage. The second part of the polyphase filter is coupled to the phase rotator circuit by a bandlimiting buffer stage.

Abstract: An apparatus and method for adaptively correcting I/Q imbalance, which is used in a receiver for correcting a received I/Q imbalanced signal to thus eliminate the I/Q imbalance. First, an interference amount caused by interference from an imbalanced in-phase signal to an imbalanced quadrature-phase signal is computed and accordingly subtracted from the quadrature-phase signal, so that a corrected quadrature-phase signal without phase imbalance is obtained. Next, a power of output in-phase signal, a power of output quadrature-phase signal, and a target are compared to thus determine an in-phase scaling factor and a quadrature-phase scaling factor. Finally, the imbalanced in-phase signal is multiplied by the in-phase scaling factor to thus obtain the output in-phase signal, and the corrected quadrature-phase signal is multiplied by the quadrature-phase scaling factor to thus obtain the output quadrature-phase signal.

Abstract: Provided are a receiving apparatus and method for a wireless communication system using multiple antennas. A receiving method for a wireless communication system using multiple paths, the receiving method comprising: receiving signals through a predetermined number of multiple paths; sensing a carrier according to saturation state degrees of the signals, and providing saturation state information; calculating automatic gain components of the received signals by using the received signals and the saturation state information of the received signals; and performing a noise matching process to amplify noises on the predetermined multiple paths according to the automatic gain components during a predetermined period.

Abstract: Aspects of a method and system for signal phase variation detection in communication systems are presented. Aspects of the system may enable detection of phase change between a current received symbol, and one or more previous received symbols. Based on the phase change a channel estimation filter bandwidth may be selected for despreading and/or descrambling one or more subsequent received symbols. In addition, a decision may be made as to whether the subsequent received symbols are to be received based on a closed loop system, or based on an open loop system.

Abstract: A receiver includes a mixing module for mixing an input signal by at least one mixing sequence to produce a mixed signal. The mixed signal is filtered to produce a first filtered signal. A first downsampler downsamples the first filtered signal to produce a first decimated signal, wherein the decimation period is not a multiple of the mixing period.

Abstract: A DSP tuner, which is equipped with an A/D converter and a digital signal processing part, is provided to the receiving parts of an in-vehicle equipment and a portable equipment that constitute an in-vehicle equipment remote control system. The A/D converter quantizes analog input signals received by receiving antennas and converts them into digital values. The digital signal processing part always appears, and removes as a noise a frequency band of which spectrum hardly change within a predetermined time period. Moreover, the digital signal processing part sets a frequency band with a comparatively large spectrum change as an FSK modulation signal corresponding to code contents, and outputs binary data corresponding to the frequency band as a code signal.

Abstract: A phase-shift keying (PSK) receiver includes a carrier wave generator generating a carrier wave, an extracting unit extracting an in-phase component I and a quadrature component Q from a received signal on the basis of the carrier wave and the received signal, a comparator comparing the in-phase component I and the quadrature component Q extracted from the received signal to a predetermined threshold values respectively and acquiring 1-bit digital signals corresponding to the in-phase component I and the quadrature component Q respectively; and a BPSK demodulator demodulating the received signal using a binary phase-shift keying (BPSK) scheme on the basis of positional relationship on I-Q constellation between the 1-bit digital signals corresponding to the in-phase component I and the quadrature component Q acquired by the comparator.