Pattern Mask Patents (Class 378/35)
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Patent number: 6593041Abstract: A photolithography mask for use with extreme ultraviolet lithography (EUVL) irradiation is disclosed. The mask comprises a multilayer stack that is substantially reflective of said EUV irradiation, a supplemental multilayer stack formed atop the multilayer stack, and an absorber material formed in trenches patterned into the supplemental multilayer stack. The absorber material being substantially absorptive of the EUV irradiation.Type: GrantFiled: July 31, 2001Date of Patent: July 15, 2003Assignee: Intel CorporationInventor: Pei-yang Yan
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Publication number: 20030128803Abstract: The present invention describes a method for fabricating an x-ray mask tool which can achieve pattern features having lateral dimension of less than 1 micron. The process uses a thin photoresist and a standard lithographic mask to transfer an trace image pattern in the surface of a silicon wafer by exposing and developing the resist. The exposed portion of the silicon substrate is then anisotropically etched to provide an etched image of the trace image pattern consisting of a series of channels in the silicon having a high depth-to-width aspect ratio. These channels are then filled by depositing a metal such as gold to provide an inverse image of the trace image and thereby providing a robust x-ray mask tool.Type: ApplicationFiled: October 1, 2002Publication date: July 10, 2003Inventors: Alfredo M. Morales, Dawn M. Skala
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Publication number: 20030129503Abstract: Mask Shaping using temporal and spatial Coherence for Ultra High Resolution Lithographic imaging and printing refers to methods and apparatus that can be adopted to print near-ideal images of basic shapes when the shapes are asymmetrical. Ultra High Resolution Lithography refers to proximity printing of clear mask features when they are demagnified by bias. In this lithography, optical components, including lenses and mirrors, are not used between the mask and wafer. When a clear mask feature is asymmetric and the mask-wafer gap is set so that the Critical Condition is maintained for the shortest print dimension, then undesirable features typically appear in other longer dimensions consistent with Fresnel diffraction. The undesirable features impede illumination uniformity for controlled printing in exposed areas. Such features, including Bright Spots and Ripple, are counteracted by the Mask Shaping that is designed to optimize printing with temporal and spatial coherence near the Critical Condition.Type: ApplicationFiled: January 8, 2002Publication date: July 10, 2003Inventor: Antony J. Bourdillon
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Publication number: 20030128350Abstract: A stage device includes a first stationary member, a second stationary member, a moving member and positioning devices. The first stationary member extends in a first direction. The second stationary member extends in the first direction and is spaced apart from the first stationary member in a second direction perpendicular to the first direction. The moving member can cooperate with the first stationary member and with the second stationary member. The positioning devices selectively position the moving member into cooperation with one of the first and second stationary members without physically contacting the moving member with the first and second stationary members. In addition, a stage device provided with a moving member that can move within a two-dimensional plane having a first direction and a second direction perpendicular to the first direction includes a first stationary member and a second stationary member.Type: ApplicationFiled: December 9, 2002Publication date: July 10, 2003Applicant: NikonInventor: Keiichi Tanaka
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Publication number: 20030117609Abstract: A reticle (23) with a pellicle is movably set on a reticle support table (28). An inert gas supply portion (29) and inert gas exhaust portion (37) are so driven as to sandwich a pellicle frame (25), and align the pellicle frame (25). The inert gas supply portion (29) and inert gas exhaust portion (37) are brought into tight contact with the pellicle frame (25). In this state, inert gas is supplied from the inert gas supply portion (29) into the pellicle space via a vent hole (27) of the pellicle frame (25). Inert gas is exhausted to the inert gas exhaust portion (37) via a vent hole (27) formed on the opposite side.Type: ApplicationFiled: December 3, 2002Publication date: June 26, 2003Inventor: Takashi Kamono
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Publication number: 20030108148Abstract: A method of providing a reticle layout for a die having at least three patterns, namely a right pattern, a center pattern, and a left pattern, where the center pattern is oversized relative to the photolithography step size. To avoid the non-uniformity effects resulting from stitching the center pattern, the center pattern size is minimized. This is accomplished by moving portions of the center pattern to the left and right patterns.Type: ApplicationFiled: December 12, 2002Publication date: June 12, 2003Inventors: Jack C. Smith, James D. Huffman
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Patent number: 6576380Abstract: The present invention relates to reflective masks and their use for reflecting extreme ultraviolet soft x-ray photons to enable the use of extreme ultraviolet soft x-ray radiation projection lithographic methods and systems for producing integrated circuits and forming patterns with extremely small feature dimensions. The projection lithographic method includes providing an illumination sub-system for producing and directing an extreme ultraviolet soft x-ray radiation &lgr; from an extreme ultraviolet soft x-ray source; providing a mask sub-system illuminated by the extreme ultraviolet soft x-ray radiation &lgr; produced by the illumination sub-system and providing the mask sub-system includes providing a patterned reflective mask for forming a projected mask pattern when illuminated by radiation &lgr;.Type: GrantFiled: September 13, 2002Date of Patent: June 10, 2003Assignee: Corning IncorporatedInventors: Claude L. Davis, Jr., Kenneth E. Hrdina, Robert Sabia, Harrie J. Stevens
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Patent number: 6578190Abstract: A method of creating a pattern for a mask adapted for use in lithographic production of features on a substrate. The method comprises initially providing a mask pattern of a feature to be created on the substrate using the mask. The method then includes establishing target dimensional bounds of the pattern, determining simulated achievable dimensional bounds of the pattern, comparing the target dimensional bounds of the pattern to the simulated achievable dimensional bounds of the pattern, and determining locations where the simulated achievable dimensional bounds of the pattern differ from the target dimensional bounds of the pattern. In its preferred embodiment, the feature is an integrated circuit to be lithographically produced on a semiconductor substrate.Type: GrantFiled: January 11, 2001Date of Patent: June 10, 2003Assignee: International Business Machines CorporationInventors: Richard A. Ferguson, Mark A. Lavin, Lars W. Liebmann, Alfred K. Wong
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Patent number: 6577443Abstract: A reduction objective, a projection exposure apparatus with a reduction objective, and a method of use thereof are disclosed. The reduction objective has a first set of multilayer mirrors in centered arrangement with respect to a first optical axis, a second set of multilayer mirrors in centered arrangement with respect to a second optical axis, and an additional mirror disposed at grazing incidence, such that said additional mirror defines an angle between the first optical axis and said second optical axis. The reduction objective has an imaging reduction scale of approximately 4× for use in soft X-ray, i.e.Type: GrantFiled: June 11, 2001Date of Patent: June 10, 2003Assignee: Carl-Zeiss StiftungInventors: Udo Dinger, Hans-Jürgen Mann
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Publication number: 20030098966Abstract: A stage system includes a stage being movable in a predetermined direction, a first unit for applying a force to the stage in the predetermined direction, a moving mechanism for moving one of the first unit and a structure including the first unit, a first measuring system for measuring at least one of the position and movement amount of the stage, and a second measuring system for measuring at least one of the position and movement amount of one of the first unit and the structure, wherein the stage is controlled on the basis of a measured value of the first measuring system, and wherein the moving system is controlled on the basis of a measured value of the second measuring system.Type: ApplicationFiled: January 13, 2003Publication date: May 29, 2003Applicant: CANON KABUSHIKI KAISHAInventors: Nobushige Korenaga, Ryuichi Ebinuma
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Publication number: 20030098964Abstract: A stage assembly (10) for moving and positioning a device (26) includes a device table (20), a device holder (24) that retains the device (26), and a stage mover assembly (14). The stage assembly (10) includes one or more features that can isolate the device holder 24 and the device (26) from deformation. In some embodiments, the stage assembly (10) allows precise rotation of the device (26) between a first position (42) and a second position (44) without influencing the flatness of the device (26) and without deflecting and distorting the device (26). For example, the stage assembly (10) can include a carrier (60) and a holder connector assembly (62). The carrier (60) is supported above the device table (20) and rotates relative to the device table (20). The holder connector assembly (62) connects the device holder (24) to the carrier (60). Further, the stage assembly (10) can include a holder mover (120) that rotates the device holder (24) relative to the device table (20).Type: ApplicationFiled: November 29, 2001Publication date: May 29, 2003Inventors: Martin E. Lee, Mike Binnard, Douglas C. Watson
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Patent number: 6569577Abstract: A phase-shift photo mask blank comprises a half tone phase-shift film, wherein the half tone phase-shift film consists of at least two layers and in the case of two layers, the refractive index of the upper layer of the film is smaller than that of the lower layer thereof; in the case of three layers, the refractive index of the intermediate layer is smaller than those observed for the upper and lower layers or the refractive index of the upper layer is smaller than that of an intermediate layer; in the case of at least 4 layers, the refractive index of the upper most layer is smaller than that of the layer immediately below the upper most layer. The photo mask blank permits the production of a phase-shift photo mask having a high transmittance at an exposure wavelength and a low reflectance as well as a low transmittance at a defect-inspection wavelength. The photo mask in turn permits the fabrication of a semiconductor device having a fine pattern.Type: GrantFiled: November 3, 2000Date of Patent: May 27, 2003Assignees: Ulvac Coating Corporation, Mitsubishi Denki Kabushiki KaishaInventors: Akihiko Isao, Susumu Kawada, Shuichiro Kanai, Nobuyuki Yoshioka, Kazuyuki Maetoko
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Publication number: 20030091911Abstract: A photolithography mask is based on a combination of a half-tone phase mask and an alternating phase mask such that, when the radiation passes through some of the openings, a phase difference is in each case produced between adjacent openings, and the surroundings of the openings are partially transparent and shift the phase of the radiation. Consequently, the advantages of alternating phase masks and half-tone phase masks can be realized on one mask and, accordingly, significantly enlarged process windows for the actual lithography process result with the photolithography mask according to the invention. In particular, these advantages can be obtained with only one absorber material, and the size of non-imaging auxiliary structures is approximately as large as the smallest main structure. In addition, the invention provides methods for fabricating the photolithography masks according to the invention.Type: ApplicationFiled: November 15, 2002Publication date: May 15, 2003Inventor: Christoph Noelscher
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Publication number: 20030093251Abstract: Design geometry information from an area outside the area of interest (AOI) on a mask can be combined with inspection information from the AOI to facilitate an accurate, simulated wafer image. The design geometry information can be easily generated or accessed, thereby ensuring an uninterrupted inspection process and minimizing the associated storage costs for the simulation process. The design geometry information can be pseudo design geometry information or actual design geometry information.Type: ApplicationFiled: November 14, 2001Publication date: May 15, 2003Applicant: Numerical Technologies, Inc.Inventor: Fang-Cheng Chang
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Publication number: 20030082460Abstract: A method of making a photolithographic mask includes detecting a defect in a mask blank. The mask blank includes a reflector on a substrate. The method also includes calculating a correction of an absorber pattern to be used in forming an absorber and forming an absorber on the mask blank using the absorber pattern and the calculated absorber pattern correction. The correction reduces effects of the mask blank defect on the operation of the mask.Type: ApplicationFiled: October 30, 2001Publication date: May 1, 2003Inventors: Alan R. Stivers, Shoudeng Liang, Barry Lieberman
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Patent number: 6556702Abstract: A lithography method and apparatus which represent a substrate surface as gray level values and determine a shape data that specifies a shape and position of a flash field. The apparatus receives a pattern in a vector format, represents the substrate surface as a grid of pixels, and then represents each pixel as a gray level value specifying a proportion of the pixel that includes the pattern. Subsequently the apparatus constructs a matrix of a quadrant of four pixels and surrounding pixels, modifies the matrix so that three intermediate shapes corresponding to an exposed region of the quadrant may be provided, determines an intermediate shape data of the quadrant; and performs a reverse modification on the shape to determine the shape data that specifies a flash field.Type: GrantFiled: January 6, 1999Date of Patent: April 29, 2003Assignee: Applied Materials, Inc.Inventors: Stephen A. Rishton, Weidong Wang, Volker Boegli, Ulrich Hofmann
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Devices and methods for compensating for tilting of a leveling table in a microlithography apparatus
Publication number: 20030071981Abstract: With respect to exposure apparatus, apparatus and methods are disclosed for compensating for lateral shift of a leveling table caused by a tilt (&thgr;) of the leveling table. One embodiment includes a wafer-stage-position loop servo, a leveling-table tilt-position loop servo, and a first feed-forward loop from the leveling-table tilt-position loop servo to the wafer-stage-position loop servo. The first feed-forward loop converts a torque-control signal for the leveling table to a linear-acceleration-control signal for the wafer stage. Thus, the wafer stage moves laterally to compensate for lateral shift of the leveling table. If the exposure apparatus includes a reticle stage controlled by a reticle-stage-position loop servo, then the subject apparatus can include (in addition to or in place of the first feed-forward loop) a second feed-forward loop from the leveling-table tilt-position loop servo to the reticle-stage-position loop servo.Type: ApplicationFiled: October 11, 2001Publication date: April 17, 2003Applicant: Nikon CorporationInventor: Toshio Ueta -
Patent number: 6549608Abstract: To provide a semiconductor manufacturing apparatus and a semiconductor device manufacturing method able to form a sufficiently precise pattern by ablation. A semiconductor manufacturing apparatus comprising a light source emitting light of a first wavelength on the surface of a wafer and a mask through which at least a part of the light of the first wavelength passes and removing a material of the part of the wafer exposed by the light of the first wavelength by vaporization, wherein the light source comprises an electron beam generating means for generating an electron beam and a light emitting means for emitting light of a second wavelength longer than the first wavelength and wherein the light of the first wavelength is inverse Compton scattered light obtained by collision of electrons in the electron beam with photons in the light of the second wavelength causing the energy of the electrons to be given to the photons and a semiconductor device manufacturing method using the apparatus.Type: GrantFiled: March 30, 2000Date of Patent: April 15, 2003Assignee: Sony CorporationInventors: Takayoshi Mamine, Nobuyuki Matsuzawa, Noriyuki Kishii
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Patent number: 6550051Abstract: To reduce the time for verification in lithographic data and reduce the turn-around-time in preparation of lithographic data, a first lithographic input data and a second lithographic input data are compared in their data formats to extract data of the first lithographic input data excluding data common to the second lithographic input data as a first difference data, or to extract data of the second lithographic input data excluding data common to the first lithographic input data as a second difference data. If the first difference data and the second difference data contain data, they are compared graphically to extract different data as a third difference data. If the third difference data contains data, the first lithographic input data and the second lithographic input data are acknowledged to have a difference therebetween.Type: GrantFiled: March 1, 2000Date of Patent: April 15, 2003Assignee: Sony CorporationInventor: Ryuji Takenouchi
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Publication number: 20030064296Abstract: A photolithographic mask is used in a photolithography imaging system for patterning a semiconductor wafer. The photolithographic mask includes a substrate, and an absorber on the substrate. The absorber is selectively etched to form mask features. In one implementation, the mask includes a thin layer on the substrate, a thickness and material of the thin layer producing a phase correction that offsets a phase error such that a common process window of the mask is maintained above a threshold level. In another implementation, the mask includes a multilayer reflector and portions of the multilayer reflector are etched adjacent to features of the mask. In a further implementation, an index of refraction of the absorber matches or nearly matches an index of refraction of the atmosphere at which the photolithography imaging occurs.Type: ApplicationFiled: October 3, 2001Publication date: April 3, 2003Inventor: Pei-Yang Yan
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Patent number: 6537706Abstract: A method for making a photolithographic mask. The method comprises forming a film on a substrate that deforms the substrate, and applying a deformation reducing agent to the substrate to reduce the amount of deformation that the film caused. In a preferred embodiment, the deformation reducing agent comprises one or more films, which are formed on one side of the substrate, that balance the substrate deformation effect of one or more films that are deposited on the other side of the substrate. The film or films that constitute the deformation reducing agent may be similar to, or different from, an absorption film and/or any other films deposited on the substrate or on the absorption film.Type: GrantFiled: March 14, 2000Date of Patent: March 25, 2003Assignee: Intel CorporationInventors: Qing Ma, Jin Lee, Jun Fei Zheng, Giang Dao
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Publication number: 20030054260Abstract: The present invention describes a method of forming a mask comprising: providing a substrate, the substrate having a first thickness; forming a balancing layer over the substrate, the balancing layer having a second thickness; forming an absorber layer over the balancing layer, the absorber layer having a first region separated from a second region by a third region; removing the absorber layer in the first region and the second region; removing the balancing layer in the second region; and reducing the substrate in the second region to a third thickness.Type: ApplicationFiled: September 19, 2001Publication date: March 20, 2003Inventors: Giang Dao, Qi-De Qian
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Publication number: 20030039894Abstract: A photolithography mask is disclosed. The mask comprises a pattern layer that is selectively formed on a substrate in a photomask pattern. Next, a multilayer stack is formed on the pattern layer and the substrate. The multilayer stack is comprised of a plurality of pairs of thin films. Finally, an absorptive layer is disposed in trenches formed within the multilayer stack. The absorptive layer is absorptive of an EUV illuminating radiation. Further, the trenches are located substantially over the borders between the pattern layer and the substrate.Type: ApplicationFiled: August 24, 2001Publication date: February 27, 2003Inventors: Pei-Yang Yan, Fu-Chang Lo
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Publication number: 20030039897Abstract: Disclosed herein are a semiconductor device manufacturing method and a semiconductor device manufacturing mask both of which make it possible to suppress a semiconductor-device global step and simply manufacture a high-reliable semiconductor device. Square dummy patterns each having one side of, for example, 0.25 &mgr;m or less are inserted into an area other than an actual pattern lying within a semiconductor device manufacturing mask to thereby uniformize a pattern density, enable etching processing without changing conditions set every semiconductor device manufacturing masks and prevent an increase in global step of a post-CMP interlayer insulating film.Type: ApplicationFiled: August 6, 2002Publication date: February 27, 2003Inventor: Takeshi Morita
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Patent number: 6523164Abstract: Grouping is performed by classifying the data of features having same shapes and sizes in the same layer into the same group. In the grouping, a feature size having lengths of two adjacent sides of a rectangle inscribed by the feature is obtained to attach the size to the feature data, and if feature data has the same kind, layer and size, the same group name is attached to the feature data. When a feature data is selected by an operator to modify it, the other feature data having the same group name are automatically modified in the same manner.Type: GrantFiled: January 30, 2001Date of Patent: February 18, 2003Assignee: Fujitsu LimitedInventors: Shunji Igarashi, Kazunori Koike
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Patent number: 6522716Abstract: Microlithography apparatus and methods are disclosed for achieving high-resolution pattern transfer of a pattern onto a substrate, such as a semiconductor wafer, using extreme ultraviolet (EUV, also termed soft X-ray) radiation. The apparatus include an imaging-optical system (projection-optical system) capable of receiving pattern-encoding EUV light from a mask and forming an image of the pattern on the substrate. The desired wavelength of the EUV light is 20 nm to 50 nm, and the imaging-optical system includes multiple reflective mirrors having aspherical surficial profiles and multilayer-film reflective surfaces. The apparatus are configured especially to achieve a pattern-element resolution, of the projected image, of 70 nm or finer.Type: GrantFiled: October 6, 2000Date of Patent: February 18, 2003Assignee: Nikon CorporationInventors: Katsuhiko Murakami, Yutaka Ichihara
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Publication number: 20030031938Abstract: A reflector for EUV has additional multi-layers on the front surface of a base multilayer stack provided selectively to compensate for figure errors in the base multilayer stack or the substrate on which the multilayer stack is provided. A reflective mask for EUV uses two multilayer stacks, one introducing a relative phase shift and/or altered reflectivity with respect to the other one.Type: ApplicationFiled: May 17, 2002Publication date: February 13, 2003Inventors: Mandeep Singh, Josephus Johannes Maria Braat
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Publication number: 20030030779Abstract: An anti-vibration system with air dampers of high natural frequency, in small space. There are a pair of air dampers disposed with their driving directions opposed to each other, and inside pressures of these dampers can be changed to variably set the natural vibration frequency.Type: ApplicationFiled: October 3, 2002Publication date: February 13, 2003Applicant: CANON KABUSHIKI KAISHAInventor: Hiromichi Hara
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Publication number: 20030031937Abstract: The present invention discloses a mask having a substrate; a lower multilayer mirror disposed over the substrate, the lower multilayer mirror having a first region and a second region; a buffer layer disposed over the second region of the lower multilayer mirror; and an upper multilayer mirror disposed over the buffer layer. The present invention further discloses a method of forming such a mask.Type: ApplicationFiled: August 9, 2001Publication date: February 13, 2003Inventor: Pei-Yang Yan
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Publication number: 20030031939Abstract: In order to increase the rigidity of a membrane mask that can be used for ion projection lithography, a second wafer made of the material of the membrane layer is provided in addition to a first wafer. The second wafer is patterned in the same way as the first wafer to form a second carrying ring and is fitted on the membrane layer in a mirror-inverted manner with respect to the first wafer so that the membrane area is arranged between the first and second carrying rings in a centered manner in the direction perpendicular to the membrane plane.Type: ApplicationFiled: August 8, 2002Publication date: February 13, 2003Inventors: Jorg Butschke, Albrecht Ehrmann, Ernst Haugeneder, Frank-Michael Kamm, Florian Letzkus, Hans Loschner, Reinhard Springer
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Publication number: 20030027053Abstract: A photolithography mask for use with extreme ultraviolet lithography (EUVL) irradiation is disclosed. The mask comprises a multilayer stack that is substantially reflective of said EUV irradiation, a supplemental multilayer stack formed atop the multilayer stack, and an absorber material formed in trenches patterned into the supplemental multilayer stack. The absorber material being substantially absorptive of the EUV irradiation.Type: ApplicationFiled: July 31, 2001Publication date: February 6, 2003Inventor: Pei-yang Yan
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Patent number: 6513151Abstract: A method for new product mask evaluation is provided. Focus exposure matrices are printed at one or more layers (e.g., active gate) on full flow production wafers. The focus exposure matrices are then analyzed to produce data that facilitates detecting printed defects. The full flow production wafers are also subjected to end of line electrical testing to determine bit level errors. Print defects can be correlated with bit level errors to increase confidence in detected defects. The method includes a hierarchy of testing layers, each of which produce data that can be employed in detecting defects in a reticle and/or producing a yield analysis. The method involves scanning a reticle upon which the new product mask is etched and performing a printability simulation to determine what affect, if any, detected reticle defects will have on printing defects on a wafer.Type: GrantFiled: February 26, 2001Date of Patent: January 28, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Jeff Erhardt, Khoi Phan
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Patent number: 6509124Abstract: There is disclosed a method for producing a diamond film for lithography wherein a diamond film is formed on a silicon substrate on which an insulating film is formed or on an insulating substrate using a mixed gas of methane gas, hydrogen gas and oxygen gas as a raw material gas, and then the substrate is removed by etching treatment, and a method of producing a mask membrane for lithography wherein diamond particles fluidized with gas are brought into contact with a surface of a silicon substrate on which an insulating film is formed or an insulating substrate, a diamond film is grown on the substrate, and then the substrate is removed by etching treatment. There can be provided a method of producing a diamond film for lithography wherein a diamond film having high crystallinity and desired membrane stress can be formed on a substrate, and the film can be easily produced without degrading smoothness, membrane stress or the like after film formation.Type: GrantFiled: November 6, 2000Date of Patent: January 21, 2003Assignees: Shin-Etsu Chemical Co., Ltd., NTT Advanced Technology CorporationInventors: Hitoshi Noguchi, Yoshihiro Kubota, Ikuo Okada
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Patent number: 6507944Abstract: A data processing apparatus comprises a grid pattern area calculation section (24) for calculating the minimum grid and the present area of a circuit element for each layer of circuit patterns given by CAD data (1); an overlap area calculation section (25) for calculating an overlap area of present areas; and a composition/division optimization judgment section (26) for judging by a criterion whether the layers including the overlap area should be processed according to a single common grid or different grids. Each layer can be assigned the grid with the minimum accuracy required for the layer. A grid with more minute accuracy than it requires may not be used. Operation load in making reticle mask data and processing load in actually performing exposure or the like are thereby considerably relieved.Type: GrantFiled: March 23, 2000Date of Patent: January 14, 2003Assignee: Fujitsu LimitedInventors: Kenji Kikuchi, Yoshimasa Ilduka, Tomoyuki Okada, Masahiko Minemura
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Publication number: 20030007596Abstract: A method for determining an arrangement of first and second objects such that a gap between the first and second objects becomes a predetermined gap includes the steps of forming a light transmitting entry window on the first object, forming a light transmitting exit window on the first object at such a position that light would enter through the entry window the second object, reflect on the second object or on the first and second objects, and then enter the first object if the first and second objects are arranged in parallel at the predetermined gap, introducing light to the entry window to provide the second object with the light, detecting an intensity of light from the exit window, and determining the arrangement for the predetermined gap based on the detected light intensity.Type: ApplicationFiled: June 25, 2002Publication date: January 9, 2003Inventor: Takahiro Matsumoto
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Publication number: 20030003372Abstract: The present invention discloses a microelectromechanical system mask with an array of reflectors, each reflector having two mirrors separated from each other by an adjustable gap.Type: ApplicationFiled: June 29, 2001Publication date: January 2, 2003Inventor: John Hutchinson
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Publication number: 20030003373Abstract: A mask having a first region and a second region; the first region having a multilayer mirror over a substrate, the multilayer mirror having alternating layers of a first material and a second material, the first material having a high index of refraction, the second material having a low index of refraction; and the second region having a compound of the first material and the second material over the substrate.Type: ApplicationFiled: June 30, 2001Publication date: January 2, 2003Inventor: Pei-Yang Yan
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Patent number: 6501824Abstract: An X-ray mask is integrated with a micro-actuator. The X-ray mask includes a mask portion, a mask holder portion, at least one elasticized supporter and a micro-actuator unit. The mask portion has a thin shuttle mass and an X-ray absorber attached on the shuttle mass. The mask holder portion is formed around the mask portion with a predetermined distance maintained therebetween. The elasticized supporter connects the mask portion and the mask holder portion elastically. The micro-actuator unit is prepared between the mask portion and the mask holder portion to precisely control a position of the mask portion when a voltage is applied.Type: GrantFiled: January 16, 2002Date of Patent: December 31, 2002Assignee: Postech FoundationInventors: Seung Seob Lee, Kwang-Cheol Lee, Sang Jun Moon
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Publication number: 20020196896Abstract: An exposure method, an exposure apparatus, an X-ray mask and a resist for achieving enhanced resolution and throughput compared with those having been accomplished are provided and further a semiconductor device and a microstructure manufactured by using them are provided. According to the exposure method, X rays emitted from an X-ray source are radiated to a resist film via an X-ray mask. A material constituting the resist film is selected to have an average wavelength of X rays absorbed by the resist film that is equal to or smaller than an average wavelength of X rays radiated to the resist film.Type: ApplicationFiled: September 26, 2001Publication date: December 26, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Toyoki Kitayama, Kenji Itoga, Kenji Marumoto, Atsuko Fujino, Teruhiko Kumada
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Publication number: 20020187434Abstract: A lithographic process is disclosed. In the process, devices are fabricated by a sequence of steps in which materials are deposited on a substrate and patterned. These patterned layers are used to form devices, such as semiconductor devices, optical devices and the like over the substrate. The desired pattern is formed by introducing an image of a first pattern in a layer of energy sensitive material. The image is then developed to form a pattern with features having a first size. Subsequently, the pattern is exposed to an isotropic liquid etchant to reduce the size of the features to a second, smaller size. The pattern having the features of the second, smaller size is then transferred into the underlying substrate or a layer of material formed over the substrate.Type: ApplicationFiled: August 7, 2001Publication date: December 12, 2002Inventors: James W. Blatchford, John Frackoviak, Roscoe T. Luce, Omkaram Nalamasu, Allen G. Timko
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Publication number: 20020187407Abstract: The invention provides optical projection lithography methods, photolithography photomasks, and optical photolithography mask blanks for use in optical photolithography systems utilizing deep ultraviolet light (DUV) wavelengths below 300 nm, such as DUV projection lithography systems utilizing wavelengths in the 248 nm region and the 193 nm region. The invention provides improved production of lithography patterns by inhibiting polarization mode dispersion of lithography light utilizing low birefringence mask blanks and photomasks.Type: ApplicationFiled: July 31, 2002Publication date: December 12, 2002Inventors: Richard S. Priestley, Daniel R. Sempolinski, Chunzhe C. Yu
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Patent number: 6489066Abstract: A buffer-layer to minimize the size of defects on a reticle substrate prior to deposition of a reflective coating on the substrate. The buffer-layer is formed by either a multilayer deposited on the substrate or by a plurality of sequentially deposited and annealed coatings deposited on the substrate. The plurality of sequentially deposited and annealed coating may comprise multilayer and single layer coatings. The multilayer deposited and annealed buffer layer coatings may be of the same or different material than the reflecting coating thereafter deposited on the buffer-layer.Type: GrantFiled: March 27, 2001Date of Patent: December 3, 2002Assignee: The Regents of the University of CaliforniaInventor: Paul B. Mirkanimi
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Patent number: 6487712Abstract: Disclosed is a method of manufacturing a mask for conductive wirings in a semiconductor device, wherein the conductive wirings are formed on a semiconductor substrate of the semiconductor device, comprising the steps of: (a) calculating data for the entire regions of the semiconductor substrate on which the conductive wirings are formed; (b) reading the size, shape and position of the conductive wiring patterns for the conductive wirings to generate data for conductive wirings, and storing the generated conductive wirings data; (c) extending the conductive wirings data by a predetermined size to generate data for the extended conductive wirings; (d) subtracting the extended conductive wirings data from the data for the entire regions of the semiconductor substrate to calculate a differential data between the extended conductive wirings data and the entire regions data, and to generate data for dummy conductive wiring pattern; (e) adding the conductive wirings data to the dummy conductive wiring pattern data tType: GrantFiled: October 24, 2000Date of Patent: November 26, 2002Assignee: Dongbu Electronics Co., Ltd.Inventor: Jae Kap Kim
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Patent number: 6484306Abstract: A method for performing scanned defect inspection of a collection of contiguous areas using a specified false-alarm-rate and capture-rate within an inspection system that has characteristic seek times between inspection locations. The multi-stage method involves setting an increased false-alarm-rate for a first stage of scanning, wherein subsequent stages of scanning inspect only the detected areas of probable defects at lowered values for the false-alarm-rate. For scanning inspection operations wherein the seek time and area uncertainty is favorable, the method can substantially increase inspection throughput.Type: GrantFiled: December 17, 1999Date of Patent: November 19, 2002Assignee: The Regents of the University of CaliforniaInventors: Jeffrey Bokor, Seongtae Jeong
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Patent number: 6482553Abstract: A method is disclosed for producing x-ray masks on graphite substrates inexpensively and rapidly. The method eliminates the need for an intermediate x-ray mask, instead using a less expensive intermediate UV lithography step. The absorber structures are electroplated directly onto the graphite. The capability to economically produce x-ray masks is expected to greatly enhance the commercial appeal of x-ray lithography in processes such as LIGA. The x-ray mask produced by this process comprises a graphite substrate that supports an absorber such as gold-on-nickel. The thickness of the absorber structures can be varied as needed to supply sufficient contrast for the particular application. A layer of a deep UV resist such as SU-8 is spin-coated directly onto a graphite substrate. The resist is then patterned with an UV mask using a UV radiation source.Type: GrantFiled: June 26, 2000Date of Patent: November 19, 2002Assignee: Board of Supervisors of Louisiana State University and Agricultural and Mechanical CollegeInventors: Jost S. Göttert, Philip J. Coane, Kevin W. Kelly
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Patent number: 6479195Abstract: The present invention discloses a reflective mask for Extreme Ultraviolet Lithography to produce tight CD control on a wafer and a process for fabricating such a mask. In one embodiment, the upper corners of the edges of the absorber layer are rounded or smooth. In another embodiment, the upper surface of the absorber layer is rough. In a further embodiment, an antireflective coating is disposed on the absorber layer.Type: GrantFiled: September 15, 2000Date of Patent: November 12, 2002Assignee: Intel CorporationInventors: Heinrich Kirchauer, Pei-Yang Yan
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Patent number: 6477225Abstract: The present invention describes a method for fabricating an x-ray mask tool which can achieve pattern features having lateral dimension of less than 1 micron. The process uses a thin photoresist and a standard lithographic mask to transfer an trace image pattern in the surface of a silicon wafer by exposing and developing the resist. The exposed portion of the silicon substrate is then anisotropically etched to provide an etched image of the trace image pattern consisting of a series of channels in the silicon having a high depth-to-width aspect ratio. These channels are then filled by depositing a metal such as gold to provide an inverse image of the trace image and thereby providing a robust x-ray mask tool.Type: GrantFiled: August 9, 2000Date of Patent: November 5, 2002Assignee: Sandia National LaboratoriesInventors: Alfredo M. Morales, Dawn M. Skala
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Patent number: 6468701Abstract: A stencil mask includes a mask pattern layer and a supporting layer underlying the mask pattern layer for supporting the mask pattern layer. The supporting layer is a multi-layered structure having layers that decrease in etching rate in a direction toward a top surface of the supporting layer.Type: GrantFiled: October 4, 2000Date of Patent: October 22, 2002Assignee: NEC CorporationInventor: Fumihiro Koba
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Patent number: 6463577Abstract: There are independently made data of a device pattern, an identification and scribe pattern including a scribe pattern surrounding the device pattern, identification patterns formed in a scribe region indicated by the scribe pattern and outer periphery of the scribe region, and an outer peripheral pattern formed outside the scribe region except the identification pattern. From the data, data for an exposure system or a mask inspection apparatus are produced. The outer peripheral pattern is divided into a plurality of patterns each is a unit of a exposure region.Type: GrantFiled: May 4, 2000Date of Patent: October 8, 2002Assignee: Fujitsu LimitedInventors: Taketoshi Omata, Mitsuo Sakurai, Shuji Osada
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Publication number: 20020142230Abstract: The present invention discloses an EUV mask having an improved absorber layer with a certain thickness that is formed from a metal and a nonmetal in which the ratio of the metal to the nonmetal changes through the thickness of the improved absorber layer and a method of forming such an EUV mask.Type: ApplicationFiled: March 30, 2001Publication date: October 3, 2002Inventors: Pei-Yang Yan, Guojing Zhang