Mask Inspection (e.g., Semiconductor Photomask) Patents (Class 382/144)
  • Patent number: 10754261
    Abstract: Metrology target designs on the reticle and on the wafer, and target design and processing methods are provided. Target designs comprise coarse pitched periodic structures having fine pitched sub-elements, which vary in sub-element CD and/or height, an orthogonal periodic structure, perpendicular to the measurement direction, with an orthogonal unresolved pitch among periodically recurring bars, which provide a calibration parameter for achieving well-printed targets. Orthogonal periodic structures may be designed on the reticle and be unresolved, or be applied in cut patterns on the process layer, with relatively low sensitivity to the cut layer overlay. Designed targets may be used for overlay metrology as well as for measuring process parameters such as scanner aberrations and pitch walk.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: August 25, 2020
    Assignee: KLA-Tencor Corporation
    Inventors: Yoel Feler, Vladimir Levinski
  • Patent number: 10752039
    Abstract: A document including a Directed Self-Assembly (DSA) pattern including a unique and randomized pattern embedded on the document, where the DSA is formed by using two different-length polymer chains.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: August 25, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Benjamin David Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo, Michael Rizzolo
  • Patent number: 10742890
    Abstract: An imaging apparatus includes an image sensor and a controller. The controller acquires an infrared image generated by the image sensor when infrared light is higher than a predetermined light amount. The controller acquires a normal image generated by the image sensor when the infrared light is lower than the predetermined light amount. The controller generates a synthesized image on the basis of the infrared image and the normal image. Thus, an image that includes colors and high luminance contrast may be generated in a dark environment without a plurality of infrared light sources.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: August 11, 2020
    Assignee: KYOCERA Corporation
    Inventor: Takatoshi Nakata
  • Patent number: 10733337
    Abstract: A method for the simulation of a photolithographic process for generating a wafer structure includes providing an aerial image of a region of a mask that includes the mask structure, prescribing a range of intensities, determining auxiliary or potential wafer structures for different threshold values within the range of intensities, determining the number of structure elements for each of the auxiliary or potential wafer structures, determining a stability range consisting of successive threshold values from the threshold values that were used for the determination of auxiliary or potential wafer structures, within the stability range the number of structure elements of the auxiliary or potential wafer structures remaining constant or lying within a prescribed range, and determining the wafer structure on the basis of the aerial image and a threshold value within the stability range. A microscope for carrying out the method is also provided.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: August 4, 2020
    Assignee: Carl Zeiss SMT GmbH
    Inventor: Hans Michael Solowan
  • Patent number: 10691864
    Abstract: Implementations of the disclosure provide a method of fabricating an integrated circuit (IC). The method includes receiving an IC design layout; performing optical proximity correction (OPC) process to the IC design layout to produce a corrected IC design layout; and verifying the corrected IC design layout using a machine learning algorithm. The post OPC verification includes using the machine learning algorithm to identify one or more features of the corrected IC design layout; comparing the one or more identified features to a database comprising a plurality of features; and verifying the corrected IC design layout based on labels in the database associated with the plurality of features.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: June 23, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Chun Wang, Cheng Kun Tsai, Wen-Chun Huang, Wei-Chen Chien, Chi-Ping Liu
  • Patent number: 10658327
    Abstract: Provided are a chip bonding apparatus and bonding method.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: May 19, 2020
    Assignee: SHANGHAI MICRO ELECTRONICS EQUIPMENT (GROUP) CO., LTD.
    Inventors: Tianming Wang, Xiaoyu Jiang, Hai Xia, Feibiao Chen
  • Patent number: 10656989
    Abstract: Trend estimation for application-agnostic statistical fault detection of multi-process applications in environments with data trend includes at least one of: a multi-process application runs on a host. Statistical events are collected and sent to a statistical fault detector. The statistical fault detector creates one or more distributions and compares recent statistical event data to historical statistical event data and uses deviation from historical norm for fault detection. Trend is estimated, and if needed, removed from event data prior to the creation of distributions. Trend is estimated using spectral techniques, filter banks and Maximum Entry Spectral Estimation, and dominant frequencies are estimated and utilized to adapt to the environment.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: May 19, 2020
    Assignee: OPEN INVENTION NETWORK LLC
    Inventor: Allan Havemose
  • Patent number: 10632023
    Abstract: A method for inspecting absorbent articles is provided. The inspection is performed using an inspection algorithm generated with a convolutional neural network having convolutional neural network parameters. The convolutional neural network parameters are generated by a training algorithm. Based on the inspection, characteristics of the absorbent articles, such as defects, can be identified. Absorbent articles having identified characteristics can be rejected, or other actions can be taken.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: April 28, 2020
    Assignee: The Procter & Gamble Company
    Inventors: Paul Anthony Kawka, Stephen Michael Varga, Aitzaz Ahmad, Paul Philip Thomas
  • Patent number: 10571406
    Abstract: One or more metrology objects and one or more metrology operations may be identified. A design-based representation of a first metrology object of the one or more metrology objects may be received. Furthermore, an image-based representation of the first metrology object of the one or more metrology objects may be received where the one or more metrology operations include a first metrology operation associated with the first metrology object that is to be performed on the image-based representation of the first metrology object. The design-based representation of the first metrology object may be mapped with the image-based representation of the first metrology object. The first metrology operation may be performed based on the mapping.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: February 25, 2020
    Assignee: Applied Materials Israel Ltd.
    Inventors: Ron Katzir, Imry Kissos, Lavi Shachar, Amit Batikoff, Shaul Cohen, Noam Zac
  • Patent number: 10571799
    Abstract: A method for optimizing a binary mask pattern includes determining, by a processor, an evaluation value based on a comparison between a design pattern and a substrate pattern simulated based on the binary mask pattern. The method also includes, based on the evaluation value, using, by the processor, a gradient-based optimization method to generate a first adjusted binary mask pattern. The method also includes determining, by the processor, a first updated evaluation value based on a comparison between the design pattern and a first updated substrate pattern simulated based on the first adjusted binary mask pattern. The method also includes, based on the first updated evaluation value, using, by the processor, a product of a Hessian matrix and an arbitrary vector to generate a second adjusted binary mask pattern. The method also includes simulating, by the processor, a second updated substrate pattern based on the second adjusted binary mask pattern.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: February 25, 2020
    Assignee: ASML US, LLC
    Inventors: Jiangwei Li, Ke Zhao, Yuan He
  • Patent number: 10565703
    Abstract: The image inspection device includes: a first extraction unit configured to repeatedly execute processing for moving a predetermined region by a predetermined distance on an inspection target image to extract an image of the predetermined region after movement as a first determination image until a predetermined first ratio of the inspection target image is included in a plurality of first determination images, and a second extraction unit configured to repeatedly execute processing for moving a predetermined region by a distance smaller than the predetermined distance on an image in the inspection target image including a first determination image where a determined degree satisfies a predetermined condition to extract an image of the predetermined region after movement as a second determination image until a predetermined second ratio of the image in the inspection target image including a first determination image is included in a plurality of second determination images.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: February 18, 2020
    Assignee: NEC Corporation
    Inventor: Hiroyuki Kobayashi
  • Patent number: 10560670
    Abstract: The present technology relates to an imaging apparatus, an imaging control method, and a program capable of obtaining a color image using infrared light without decreasing the frame rate. The imaging apparatus includes an imaging element including a first pixel and a second pixel, and a control unit that controls an exposure period of the imaging element and an emission period of the infrared light from the infrared light emission unit. The control unit controls to provide an exposure period of the first pixel and the second pixel in each of frame periods and provide a single exposure period being a period in which the first pixel alone is exposed, and controls so as to emit the infrared light within the single exposure period. The present technology is applicable to a surveillance camera, for example.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: February 11, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Yasushi Sato
  • Patent number: 10545401
    Abstract: In a phase shift mask blank comprising a transparent substrate and a phase shift film deposited thereon and having a phase shift of 150-200° with respect to sub-200 nm light, the phase shift film is composed of a silicon base material consisting of silicon, nitrogen and optionally oxygen, has a thickness of up to 70 nm, and provides a warpage change of up to 0.2 ?m in a central region of a surface of the substrate before and after the deposition of the phase shift film on the substrate.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: January 28, 2020
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Yukio Inazuki, Takuro Kosaka
  • Patent number: 10540771
    Abstract: An image segmentation method is disclosed that allows a user to select image component types, for example tissue types and or background, and have the method of the present invention segment the image according to the user's input utilizing the superpixel image feature data and spatial relationships.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: January 21, 2020
    Assignee: Ventana Medical Systems, Inc.
    Inventors: Christophe Chefd'hotel, Stanley Ho, Yao Nie
  • Patent number: 10534888
    Abstract: A computer implemented method, a system and a computer readable storage medium configured to conduct the following: determining a reliability parameter of an initial hybrid metallization to determine a determined reliability parameter, comparing the determined reliability parameter to a reliability limit and determining a reliability ratio, determining a performance parameter of the initial hybrid metallization to determine a determined performance parameter, comparing the determined performance parameter to a performance limit and determining a performance ratio, determining a reliability indice from the reliability ratio, determining a performance indice from the performance ratio, determining a reliability score from a combination of the determined reliability parameter and the reliability indice, determining a performance score from a combination of the determined performance parameter and the performance indice, comparing the reliability score to the performance score, selecting a first interconnect and
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: January 14, 2020
    Assignee: International Business Machines Corporation
    Inventors: Baozhen Li, Chih-Chao Yang, Theo Standaert
  • Patent number: 10495967
    Abstract: The present disclosure provides an integrated circuit (IC) method in accordance with some embodiments. The method includes building a mask model to simulate a mask image and a compound lithography computational model to simulate a wafer pattern; calibrating the mask model using a measured mask image; calibrating the compound lithography computational model using a measured wafer data and the calibrated mask model; and performing an optical proximity correction (OPC) process to an IC pattern using the calibrated compound computational model, thereby generating a mask pattern for mask fabrication.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: December 3, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsu-Ting Huang, Chih-Shiang Chou, Ru-Gun Liu
  • Patent number: 10474133
    Abstract: An inspection device includes a first processor, a second processor, and a server. The first processor detects first coordinates of first feature points from first images in a first image set. The second processor detects second coordinates of second feature points from second images in a second image set. The server generates reference coordinates based on the first coordinates and the second coordinates. The reference coordinates are transmitted to the first processor and the second processor. The first and second image sets correspond to scanned swaths on a wafer.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: November 12, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Janghee Lee, Yoo Jin Jeong, Sangbong Park, Byeonghwan Jeon
  • Patent number: 10445869
    Abstract: There is described an online inspection method and system having an illumination system that provides bright-field and dark-field illumination concurrently or sequentially, at varying intensities, in order to acquire images that may be read by an image processing device. The image processing device may obtain measurements of features in the images and evaluate acceptability of the features.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: October 15, 2019
    Assignee: BOMBARDIER INC.
    Inventor: Octavian Ioachim
  • Patent number: 10404868
    Abstract: Apparatus to detect a defect in a printed image and methods of detecting detects in a printed image are described. In some examples, a printing operation is initiated using image data to generate a printed image. The printed image is then scanned to generate a scanned image. A resolution of the scanned image is estimated, calculated or determined on the basis of a characteristic of the printing operation, and a reference image, having a resolution corresponding to the estimated, calculated or determined resolution, is generated from the image data. Whether defects are present in the printed image may be determined on the basis of a comparison of the reference image with the scanned image.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: September 3, 2019
    Assignee: HP Indigo B.V.
    Inventors: Alexander Spivakovsky, Oded Perry, Oren Haik, Avi Malki
  • Patent number: 10395362
    Abstract: Methods and systems for detecting defects in patterns formed on a specimen are provided. One system includes one or more components executed by one or more computer subsystems, and the component(s) include first and second learning based models. The first learning based model generates simulated contours for the patterns based on a design for the specimen, and the simulated contours are expected contours of a defect free version of the patterns in images of the specimen generated by an imaging subsystem. The second learning based model is configured for generating actual contours for the patterns in at least one acquired image of the patterns formed on the specimen. The computer subsystem(s) are configured for comparing the actual contours to the simulated contours and detecting defects in the patterns formed on the specimen based on results of the comparing.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: August 27, 2019
    Assignee: KLA-Tencor Corp.
    Inventors: Ajay Gupta, Mohan Mahadevan, Sankar Venkataraman, Hedong Yang, Laurent Karsenti, Yair Carmon, Noga Bullkich, Udy Danino
  • Patent number: 10395958
    Abstract: A method of operating a multi-column electron beam array for quality inspection of a semiconductor wafer involves dividing the whole wafer area collectively in equally divided areas allocated to each column of the array, and assigning each of the areas as a column working space having the same dimensions and orientations. The array of column working spaces are assigned to an array of column optical axes, wherein a field of view of each column is defined as a covered region in which critical wafer patterns can be scanned by one or more columns to take an image. The stage supporting the wafer is moved such that each column working space is fully covered by the field of view of each column completely. By utilizing arbitrary waveform generators in electron inspection columns, this method also can be extended to write independent arbitrary patterns in predetermined positions in each die on a wafer.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: August 27, 2019
    Inventor: Weiwei Xu
  • Patent number: 10373796
    Abstract: A method of inspecting a wafer may include: loading of a wafer onto a stage, the wafer having a plurality of dies thereon; positioning of the wafer such that a plurality of electron beam columns on the wafer respectively face a partial region of each of the plurality of dies on the wafer; scanning the respective partial regions of each of the plurality of dies by using the electron beam columns; and combining a plurality of partial images that are obtained by scanning the partial regions to provide a die image.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: August 6, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Souk Kim, Chung-sam Jun, Woo-seok Ko, Sang-kil Lee, Kwang-il Shin, Yu-sin Yang, Min-chul Yoon
  • Patent number: 10366486
    Abstract: A mounting device mounts components on a board, and performs processing of arranging discard components discarded based on a captured image on a discard loading section. A CPU of a management computer acquires an identification image in which it is possible to identify a discard component to be discarded and a captured image of the discard component, links the acquired identification image of the discard component and the captured image of the discard component, and creates a discard component arrangement image screen that includes an arrangement display area in which the identification images are arranged based on an order in which the discard components were arranged on discard loading section. The CPU of management computer then outputs the created discard component arrangement image screen.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: July 30, 2019
    Assignee: FUJI CORPORATION
    Inventors: Takeshi Kato, Hiroshi Oike, Hirotake Esaki
  • Patent number: 10360669
    Abstract: There are provided a system, computer software product and method of generating a training set for a classifier using a processor. The method comprises: receiving a training set comprising training defects each having assigned attribute values, the training defects externally classified into classes comprising first and second major classes and a minor class; training a classifier upon the training set; receiving results of automatic classification of the training defects; automatically identifying a first defect that was externally classified into the first major class and automatically classified into the second major class; automatically identifying by the processor a second defect from the multiplicity of training defects that was externally classified into the minor class and automatically classified to the first or second major classes; and correcting the training set to include the first defect into the second major class, or to include the second defect into the first or the second major class.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: July 23, 2019
    Assignee: APPLIED MATERIALS ISRAEL LTD.
    Inventors: Ohad Shaubi, Assaf Asbag, Idan Kaizerman
  • Patent number: 10338032
    Abstract: An assembly includes a sensor configured to obtain a data scan of a joint. A controller is operatively connected to the sensor. The controller includes a processor and tangible, non-transitory memory on which is recorded instructions for executing a method for automated quality assessment of the joint. Execution of the instructions by the processor causes the controller to: obtain the data scan of the joint (via the sensor) and generate a first image based on the data scan. The first image is divided into a plurality of pixels having respective numeric values. The controller is programmed to identify a region of interest as the plurality of pixels from the first image with a respective numeric value greater than a threshold value (I0). The controller is programmed to assess joint quality based on a porosity factor (PF) determined at least partially from the data scan.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: July 2, 2019
    Assignee: GM Global Technology Operations LLC.
    Inventors: Ingrid A. Rousseau, Selina X. Zhao, Hamid G. Kia
  • Patent number: 10318805
    Abstract: When the degree of matching between patterns decreases due to a pattern fluctuation or an appearance fluctuation that has occurred during manufacturing steps, a heavy work burden would be placed on an operator. A data processing unit of a pattern matching apparatus calculates a threshold for determination of matching between a first template image and a partial region of a search target image obtained by capturing an image of the surface of a sample, on the basis of a result of evaluation of a similarity between the search target image and a second template image, the second template image having been captured in a wider range than the first template image.
    Type: Grant
    Filed: March 3, 2013
    Date of Patent: June 11, 2019
    Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Hideki Nakayama, Masashi Sakamoto
  • Patent number: 10319087
    Abstract: A control system configured to use a database and a data storage area includes a control device for controlling a process executed on an object; and an image processing device arranged in association with the control device for taking an image of the object and processing image data acquired from taking the image of the object. The control device and the image processing device may work independently or collaboratively to send the database at least one of an attribute value or results information, and designation information in association with each other for the same object, the attribute value managed by the control device and corresponding to any attribute defined in the database, the results information representing a process result from the image processing device, and the designation information specifying a storage destination in the data storage area for the image data acquired from taking an image of the object.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: June 11, 2019
    Assignee: OMRON Corporation
    Inventors: Minoru Oka, Shinya Sawa
  • Patent number: 10262229
    Abstract: Described is a system for detecting multiple salient objects in an image using low power hardware. From consecutive pair of image frames of a set of input image frames, image channels are generated. The image channels are resized into multiple image scales that specify a relative size of a salient object in the image frames. A patch-based spectral transform is applied to overlapping image patches in the resized image channel, generating salient patches. Saliency patches are combined into a saliency map for each resized image channel, resulting in multiple saliency maps. The saliency maps are combined into an aggregate saliency map. An adaptive threshold is applied to the aggregate saliency map to determine which pixels in the aggregate saliency map correspond to a detected salient object region including a salient object. An object bounding box is generated for each salient object and output to a display.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: April 16, 2019
    Assignee: HRL Laboratories, LLC
    Inventors: Shankar R. Rao, Narayan Srinivasa
  • Patent number: 10254753
    Abstract: The present disclosure relates to a system for predicting abnormality occurrence using a PLC log data, the system including a controller configured to receive a data from a lower-level device connected to a PLC data log module and determine the data, and to store the data in an event storage when the data is a data related to abnormality occurrence, an analyzer configured to generate an abnormality analysis result by analyzing the data related to abnormality occurrence, and an analysis result storage configured to store the abnormality analysis result, wherein the controller compares the data transmitted from the lower-level device with the abnormality analysis result stored in the analysis result storage, and generates an abnormality occurrence prediction signal, when it is determined that the data transmitted from the lower-level device is similar to the abnormality analysis result.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: April 9, 2019
    Assignee: LSIS CO., LTD.
    Inventor: Seung Jong Kim
  • Patent number: 10254816
    Abstract: A control unit of a substrate processing apparatus has a storage medium that stores operation commands as a single macro. The operation commands include an operation command for shutdown of the substrate processing apparatus by which the substrate processing apparatus is automatically transferred from a normally-operating condition to a condition suitable for man power maintenance, and an operation command for startup of the substrate processing apparatus by which the substrate processing apparatus is automatically transferred to a condition suitable for normal operation after completion of the man power maintenance. The control unit makes a display unit display both the operation commands for shutdown and startup together on a single ejection screen of the display unit, and allows editing of the macro on the single edit screen by using the input unit.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: April 9, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Seiichiro Yuasa, Kunihiko Fujimoto
  • Patent number: 10241395
    Abstract: A pattern correction amount calculating apparatus includes: an accepting unit that accepts pattern information; a micro side group acquiring unit that acquires a micro side group, which is a group of continuous sides forming a contour of a pattern figure indicated by the pattern information, and is a group of micro sides that are each small enough to satisfy a predetermined condition; a virtual side acquiring unit that acquires a virtual side, which is a side that approximates micro sides contained in the micro side group; a virtual side correction amount calculating unit that calculates a virtual side correction amount, which is a correction amount for the virtual side; and a micro side correction amount calculating unit that calculates micro side correction amounts, which are correction amounts respectively for the micro sides contained in the micro side group corresponding to the virtual side, using the virtual side correction amount.
    Type: Grant
    Filed: July 3, 2015
    Date of Patent: March 26, 2019
    Assignee: Nippon Control System Corporation
    Inventor: Hiroyuki Tsunoe
  • Patent number: 10204416
    Abstract: Deskew for image review, such as SEM review, aligns inspection and review coordinate systems. Deskew can be automated using design files or inspection images. A controller that communicates with a review tool can align a file of the wafer, such as a design file or an inspection image, to an image of the wafer from the review tool; compare alignment sites of the file to alignment sites of the image from the review tool; and generate a deskew transform of coordinates of the alignment sites of the file and coordinates of alignment sites of the image from the review tool. The image of the wafer may not contain defects.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: February 12, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Arpit Jain, Arpit Yati, Thirupurasundari Jayaraman, Raghavan Konuru, Raj Kuppa, Hema Prasad, Saiyashwanth Momula, Arun Lobo
  • Patent number: 10169522
    Abstract: The present invention relates to a method for tuning lithography systems so as to allow different lithography systems to image different patterns utilizing a known process that does not require a trial and error process to be performed to optimize the process and lithography system settings for each individual lithography system. According to some aspects, the present invention relates to a method for a generic model-based matching and tuning which works for any pattern. Thus it eliminates the requirements for CD measurements or gauge selection. According to further aspects, the invention is also versatile in that it can be combined with certain conventional techniques to deliver excellent performance for certain important patterns while achieving universal pattern coverage at the same time.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: January 1, 2019
    Assignee: ASML Netherlands B.V.
    Inventors: Yu Cao, Hanying Feng, Jun Ye
  • Patent number: 10127648
    Abstract: A pattern inspection apparatus includes a stage to mount thereon a substrate with patterns formed thereon and be able to move two-dimensionally, plural detectors of a two-dimensional scale, whose height positions are mutually different and arranged at positions on the stage different from the substrate position, to perform measurement, the body of the two-dimensional scale arranged fixed to a position facing the plural detectors, a sensor to acquire an optical image of the pattern on the substrate, in a state where the stage with the substrate is moving in one direction on a surface for the two-dimensional movement, a calculation circuitry to calculate an image acquiring position of the optical image by using position information measured by the two-dimensional scale, and a comparison circuitry to compare, using a reference image corresponding to the image acquiring position of the optical image, the optical image with the reference image for each pixel.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: November 13, 2018
    Assignee: NuFlare Technology, Inc.
    Inventors: Hideki Nukada, Nobutaka Kikuiri
  • Patent number: 10113975
    Abstract: An appearance inspection device and an appearance inspection method, capable of teaching a line pattern having an arbitrary shape as a portion to be inspected, in relation to a captured image of an inspection object, by a simple teaching operation. The device has an image storing part, a teaching part, an inspecting part and an inspection factor storing part. The teaching part obtains an image of the inspection object in the teaching process, and teaches the position of an inspection point, the position and the angle of an inspection region relative to the inspection point, the inspection factor and a judgment condition. The teaching factor storing part stores a setting parameter and a teaching factor. The inspecting part executes inspection based on the teaching factor in the inspecting process.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: October 30, 2018
    Assignee: FANUC CORPORATION
    Inventor: Rui Kanou
  • Patent number: 10095941
    Abstract: Some of pixels in a general image sensor for image capturing are designated as vision pixels used for vision recognition. Optical information obtained only from the vision pixels is used to perform vision recognition in the vision recognition mode. Capturing image data is generated based on optical information obtained from all the pixels in the image data in the image-shooting mode. A digital signal converter that converts optical information obtained only from vision pixels into a digital signal is separately provided in addition to a digital signal converter that converts optical information of all pixels in the image sensor into a digital signal.
    Type: Grant
    Filed: October 29, 2012
    Date of Patent: October 9, 2018
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Hwa-Yong Kang, Young-Kwon Yoon, Young-Sam Yu, Eun-Soo Chang
  • Patent number: 10062155
    Abstract: Disclosed is a defect detection apparatus. The defect detection apparatus includes an angle extractor configured to extract a slope angle of a pattern from an original image in which a plurality of the patterns are formed at periodic intervals, a pattern period extractor configured to extract a pattern period at which the patterns are separated from each other, by using the slope angle, and an image shifter configured to shift the original image by the pattern period in a direction perpendicular to the slope angle to form the shifted image. The present invention shifts an image by using the slope angle and pattern period of the periodic pattern, thus easily extracting a defect of the original image.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: August 28, 2018
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Philippe Lavole
  • Patent number: 10043261
    Abstract: Methods and systems for generating simulated output for a specimen are provided. One method includes acquiring information for a specimen with one or more computer systems. The information includes at least one of an actual optical image of the specimen, an actual electron beam image of the specimen, and design data for the specimen. The method also includes inputting the information for the specimen into a learning based model. The learning based model is included in one or more components executed by the one or more computer systems. The learning based model is configured for mapping a triangular relationship between optical images, electron beam images, and design data, and the learning based model applies the triangular relationship to the input to thereby generate simulated images for the specimen.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: August 7, 2018
    Assignee: KLA-Tencor Corp.
    Inventors: Kris Bhaskar, Jing Zhang, Grace Hsiu-Ling Chen, Ashok Kulkarni, Laurent Karsenti
  • Patent number: 10036961
    Abstract: An optical proximity correction method includes loading a target layout for a mask, generating a correction density map based on manipulation of flare to correct global errors caused by exposing equipment, generating a flare map via convolution integration of the correction density map and a point spread function (PSF) regarding the flare, and correcting the target layout using the flare map and an OPC model.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: July 31, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-hoon Jang, Sang-hwa Lee
  • Patent number: 9984109
    Abstract: A system to manage clustering vertices of a streaming graph includes a memory storing a computer program, a vertex structure storing vertices of the graph, and a cluster structure storing clusters of the graph, and a processor. Each cluster structure comprises a plurality of edge structures represent edges of the graph and each edge structure comprises two of the vertices. The processor is configured to execute the program to cluster the vertices using the structures and a maximum cluster size that is constant.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: May 29, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gabriela Jacques da Silva, Kun-Lung Wu, Mindi Yuan
  • Patent number: 9984920
    Abstract: A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer semiconductor device design into an assist feature system and determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation. A fill for assist features is generated to provide dimensional consistency of device features by employing the overlapping regions to provide placement of the assist features. An updated device layout is stored in a memory device.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: May 29, 2018
    Assignee: International Business Machines Corporation
    Inventors: Hsueh-Chung Chen, Cheng Chi, Lin Hu, Kafai Lai, Chi-Chun Liu, Jed W. Pitera
  • Patent number: 9970873
    Abstract: A luminescent tag based defect detection system comprises a luminescent tag attachment assembly, an illumination source, one or more detectors, and a set of optical elements. The luminescent tag attachment assembly exposes a sample to one or more luminescent tag materials selectively attached to one or more defects on the sample. The illumination source generates illumination including one or more wavelengths corresponding to the one or more absorption spectra associated with the one or more luminescent tags. At least a portion of the set of optical elements directs illumination from the illumination source to the sample, and at least a portion of the set of optical elements directs illumination emitted from the one or more luminescent tag materials to the one or more detectors. A luminescent tag based defect detection system may also include a luminescent tag removal assembly to remove the luminescent tags after detection.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: May 15, 2018
    Assignee: KLA-Tencor Corporation
    Inventors: Donald Pettibone, Chuanyong Huang, Kurt Haller
  • Patent number: 9940704
    Abstract: A system and method to image a layer of a wafer based on a coordinate of a defect in a pre-layer of the wafer are disclosed. A design file for the current layer can be aligned to the wafer using an image of the current layer. A design file for a previous layer can be aligned to the design file for the current layer.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: April 10, 2018
    Assignee: KLA—Tencor Corporation
    Inventor: Arpit Yati
  • Patent number: 9916965
    Abstract: Hybrid inspectors are provided. One system includes computer subsystem(s) configured for receiving optical based output and electron beam based output generated for a specimen. The computer subsystem(s) include one or more virtual systems configured for performing one or more functions using at least some of the optical based output and the electron beam based output generated for the specimen. The system also includes one or more components executed by the computer subsystem(s), which include one or more models configured for performing one or more simulations for the specimen. The computer subsystem(s) are configured for detecting defects on the specimen based on at least two of the optical based output, the electron beam based output, results of the one or more functions, and results of the one or more simulations.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: March 13, 2018
    Assignee: KLA-Tencor Corp.
    Inventors: Kris Bhaskar, Grace Hsiu-Ling Chen, Keith Wells, Wayne McMillan, Jing Zhang, Scott Young, Brian Duffy
  • Patent number: 9886753
    Abstract: A method for controlling the functional output of a verification tool upon receipt of a circuit description comprises searching for a predetermined base pattern in the circuit description. The method further comprises searching for predetermined sub-patterns that are assigned to the base pattern, in the circuit description. The method further comprises the validation of each found sub-pattern based on a predetermined rule to minimize the set of reported errors that based on verification of the circuit description.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: February 6, 2018
    Assignee: Synopsys, Inc.
    Inventors: Mahantesh Narwade, Namit Gupta, Kaushik De, Rajarshi Mukherjee, Suman Nandan, Subhamoy Pal
  • Patent number: 9869712
    Abstract: A method for detecting defects of wafer by wafer sort is introduced. In the method, a wafer sort testing apparatus is used to obtain a DTL or ADART result, wherein a plurality of repaired sites in a wafer is highlighted according to the DTL or ADART result. A plurality of physical locations of the repaired sites is then output. An analysis equipment is used to match the physical locations with a graphic data system (GDS) design layout coordinate of the wafer so as to generate a data correlating with defects at the repaired sites.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: January 16, 2018
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Tuung Luoh, I-Jen Huang, Ling-Wuu Yang, Ta-Hone Yang, Kuang-Chao Chen
  • Patent number: 9846761
    Abstract: A layout of an integrated circuit design is provided and a plurality of multiple patterning decompositions is determined from the layout. Each decomposition of the plurality of multiple patterning decompositions includes patterns separated into masks. One or more files are generated that include sensitivities of pattern capacitances to changes in spacing between patterns due to mask shifts. Using the sensitivities and changes in spacing, respective worst-case performance values are determined for each decomposition. A mask set is selected based on the worst-case performance values.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: December 19, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Cheng Chou, Te-Yu Liu, Ke-Ying Su, Hsien-Hsin Sean Lee
  • Patent number: 9842186
    Abstract: Disclosed herein is a computer-implemented method for determining an overlapping process window (OPW) of an area of interest on a portion of a design layout for a device manufacturing process for imaging the portion onto a substrate, the method comprising: obtaining a plurality of features in the area of interest; obtaining a plurality of values of one or more processing parameters of the device manufacturing process; determining existence of defects, probability of the existence of defects, or both in imaging the plurality of features by the device manufacturing process under each of the plurality of values; and determining the OPW of the area of interest from the existence of defects, the probability of the existence of defects, or both.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: December 12, 2017
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Frank Gang Chen, Joseph Werner De Vocht, Yuelin Du, Wanyu Li, Yen-Wen Lu
  • Patent number: 9823886
    Abstract: To provide an electronic device that can restrict a delayed execution of a process whose existence is impossible to confirm for an overwrite erasure thread. An MFP includes a job execution part that executes a job and an overwrite erasure thread that performs overwrite erasures of obsolete files. The overwrite erasure thread performs the overwrite erasures intermittently even while the job is in execution if the obsolete files have a size more than a threshold value size. The job execution part performs the overwrite erasures while the job is in execution if the obsolete files have a size less than the threshold value size.
    Type: Grant
    Filed: December 17, 2016
    Date of Patent: November 21, 2017
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Yuya Maesono
  • Patent number: 9811623
    Abstract: A method for generating a pattern includes defining a footprint of a main pattern in each cell, arranging a first cell and a second cell which has an auxiliary pattern outside the footprint of the main pattern, side by side in such a manner that the auxiliary pattern outside the footprint of the second cell is present in the footprint of the main pattern of the first cell, and generating the pattern of the mask by removing a pattern element of the auxiliary pattern outside the footprint of the second cell in a portion where the pattern element of the auxiliary pattern outside the footprint of the second cell is close to or overlaps with the main pattern in the first cell of the first cell and the second cell arranged side by side.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: November 7, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hiroyuki Ishii, Ryo Nakayama, Tadashi Arai