Integrated Optical Circuit Patents (Class 385/14)
  • Patent number: 11451302
    Abstract: A transmitter optical subassembly may include an optical modulator for modulating output light from the light source. The optical modulator has a characteristic that a current depending on amount of optical absorption has a positive correlation with an applied voltage thereto. The transistor at the second terminal is connected in series to the optical modulator. A drive voltage applied to the optical modulator and the transistor is divided into a first voltage applied to the optical modulator and a second voltage applied to the transistor. A drive current flowing through the optical modulator and the transistor depends on the control signal input to the first terminal. The first voltage is based on the drive current and is subject to the characteristic of the optical modulator. The second voltage fluctuates in response to the first voltage.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: September 20, 2022
    Assignee: Lumentum Japan, Inc.
    Inventors: Yoshihiro Nakai, Atsushi Nakamura, Hideaki Asakura
  • Patent number: 11450983
    Abstract: According to an embodiment, a housing of a high-speed transmission connector fitted to a connector of a counterpart substrate via a frontage. The housing of the first aspect includes: a bottom plate forming a bottom of the frontage and being provided with at least one boss on a surface opposite to the frontage side; a pair of first side walls facing each other in a first direction with the frontage sandwiched therebetween; and a pair of second side walls facing each other in a second direction orthogonal to the first direction with the frontage sandwiched therebetween. The bottom plate is provided with first through holes for tolerance measurement having inner peripheral surfaces including side wall surfaces of the first side walls in the same planes and/or second through holes for tolerance measurement having inner peripheral surfaces including side wall surfaces of the second side walls in the same planes.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: September 20, 2022
    Assignee: YAMAICHI ELECTRONICS CO., LTD.
    Inventor: Takahiro Shimoyama
  • Patent number: 11450451
    Abstract: A circuit module includes an interposer, and the interposer includes an element body including a first surface, a first interposer terminal provided on the first surface of the element body, and connected to a first external element, a second interposer terminal provided on the first surface of the element body, and connected to a second external element, a first wiring provided in the element body, and electrically connecting the first interposer terminal and the circuit board with each other, a second wiring provided in the element body, and electrically connecting the second interposer terminal and the circuit board with each other, and a bypass wiring provided in the element body and/or on a surface of the element body, and electrically connecting the first interposer terminal and the second interposer terminal with each other.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: September 20, 2022
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Keito Yonemori, Hirokazu Yazaki, Takanori Tsuchiya
  • Patent number: 11443547
    Abstract: A contact image sensor having an illumination source; a first SBG array device; a transmission grating; a second SBG array device; a waveguiding layer including a multiplicity of waveguide cores separated by cladding material; an upper clad layer; and a platen. The sensor further includes: an input element for coupling light from the illumination source into the first SBG array; a coupling element for coupling light out of the cores into output optical paths coupled to a detector having at least one photosensitive element.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: September 13, 2022
    Assignee: DigiLens Inc.
    Inventors: Milan Momcilo Popovich, Jonathan David Waldern
  • Patent number: 11437552
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: September 6, 2022
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: David Clark, Curtis Zwenger
  • Patent number: 11438065
    Abstract: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses. The devices may be fabricated on semiconductor-on-insulator (SOI) wafers utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: September 6, 2022
    Assignee: Luxtera, Inc.
    Inventors: Attila Mekis, Peter DeDobbelaere, Kosei Yokoyama, Sherif Abdalla, Steffen Gloeckner, John Guckenberger, Thierry Pinguet, Gianlorenzo Masini, Daniel Kucharski
  • Patent number: 11429006
    Abstract: Disclosed is a silicon photonics-based optical transmission apparatus. The apparatus includes an optical modulator chip of a ground-signal-ground (GSG) electrode array including two phase shifters for differential driving, a sub-substrate including a metal electrode of a periodic pattern to connect two ground metal electrodes to each other at a GSG electrode connected to each of the two phase shifters, and a solder bump having a same periodic pattern as the metal electrode of the sub-substrate to connect the ground metal electrodes of the optical modulator chip and the metal electrode of the periodic pattern of the sub-substrate.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: August 30, 2022
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sanghwa Yoo, Heuk Park, Joon Ki Lee
  • Patent number: 11428882
    Abstract: A silicon interposer. The silicon interposer including: a silicon layer, including one or more optical waveguides each connectable to an optical fiber; an optically active component, configured to convert optical signals received from the optical fiber into electrical signals or to convert electrical signals into optical signals and provide them to the optical fiber; and one or more electrical interconnects, connected to the optically active component and connectable to a printed circuit board, a separate die, a separate substrate, or a wafer level package.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: August 30, 2022
    Assignee: Rockley Photonics Limited
    Inventors: Vivek Raghunathan, Aaron John Zilkie
  • Patent number: 11428870
    Abstract: A semiconductor structure including a semiconductor substrate, a first patterned dielectric layer, a grating coupler and a waveguide is provided. The semiconductor substrate includes an optical reflective layer. The first patterned dielectric layer is disposed on the semiconductor substrate and covers a portion of the optical reflective layer. The grating coupler and the waveguide are disposed on the first patterned dielectric layer, wherein the grating coupler and the waveguide are located over the optical reflective layer.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: August 30, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Patent number: 11430930
    Abstract: The present invention provides a display panel and a display device. The display panel divides a driving circuit of a driving circuit layer into a first portion, a second portion, and a connecting portion. The first portion and the second portion are on opposite sides of a substrate. A projection region of the second portion on the substrate is located in a projection region of the first portion on the substrate. Therefore, the second portion is located in a display region, a connecting region of external wires which cannot display is eliminated, and a bezel of the display panel is eliminated.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: August 30, 2022
    Inventor: Bei Jiang
  • Patent number: 11415752
    Abstract: An optical inspection circuit includes an optical circuit to be inspected formed on a substrate, an input optical waveguide optically connected to the optical circuit, and an output optical waveguide optically connected to the optical circuit. The input optical waveguide is connected with a grating coupler for input. The grating coupler is connected with the input optical waveguide via a spot size conversion unit. The output optical waveguide is optically connected with a photodiode.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: August 16, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Hiroshi Fukuda, Toru Miura, Yoshiho Maeda
  • Patent number: 11418257
    Abstract: An LED may include a third contact, for example to increase speed of operation of the LED. The LED with the third contact may be used in an optical communication system, for example a chip-to-chip optical interconnect.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: August 16, 2022
    Assignee: AVICENATECH CORP.
    Inventors: Bardia Pezeshki, Robert Kalman, Alex Tselikov
  • Patent number: 11415749
    Abstract: Optical apparatus and methods of manufacture thereof An optical apparatus (20) for evanescently coupling an optical signal across an (interface (30) is described. The optical apparatus (20) comprises a first substrate (22) and a second substrate (24). The optical signal is evanescently coupled between a first waveguide (26) formed by laser inscription of the first substrate (22) and a second waveguide (28) of the second substrate (22). The first waveguide (26) comprises a curved section (34) configured to provide evanescent coupling of the optical signal between the first and second waveguides (26, 28) via the interface (30).
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: August 16, 2022
    Assignee: OPTOSCRIBE LIMITED
    Inventors: Nicholas D. Psaila, Anthony Traynor, Rowan Pocock, Paul Mitchell, Graeme Brown, Mark Hesketh
  • Patent number: 11409139
    Abstract: A semiconductor device includes: a transistor layer including components of at least one transistor, a waveguide having a long axis extending in a first direction, and an alpha interconnection layer over the waveguide; a stack of metallization layers over the transistor layer, the stack including one or more beta interconnection layers interposed between corresponding pairs of neighboring ones of the metallization layers; and a heater in the alpha interconnection layer or in one of the one or more beta interconnection layers; and wherein, relative to a second direction substantially perpendicular to the first direction, the heater substantially overlaps at least a portion of the waveguide.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: August 9, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Feng-Wei Kuo, Chewn-Pu Jou, Huan-Neng Chen, Lan-Chou Cho
  • Patent number: 11409037
    Abstract: Structures and methods implement an enlarged waveguide. The structure may include a semiconductor-on-insulator (SOI) substrate including a semiconductor-on-insulator (SOI) layer over a buried insulator layer over a semiconductor substrate. An inter-level dielectric (ILD) layer is over the SOI substrate. A first waveguide has a lower surface extending at least partially into the buried insulator layer, which allows vertical enlargement of the waveguide, without increasing the thickness of the ILD layer or increasing the length of interconnects to other devices. The enlarged waveguide may include nitride, and can be implemented with other conventional silicon and nitride waveguides.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: August 9, 2022
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Yusheng Bian, Ryan W. Sporer, Karen A. Nummy
  • Patent number: 11409044
    Abstract: A polarization rotator structure includes: a first core structure formed at a first layer, extending from the first end to a second end, and a second core structure formed at a second layer that is at a different depth than the first layer and formed in proximity to the first core structure. The first core structure and the second core structure provide mode hybridization between at least two orthogonally polarized waveguide modes of the PRS. An optical splitter structure is optically coupled at a first end to the second end of the PRS, and optically coupled at a second end to at least two optical waveguides, and includes: a first core structure that is contiguous with at least one of the first or second core structures of the PRS, and a second core structure that is separate from both of the first and second core structures of the PRS.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: August 9, 2022
    Assignee: Analog Photonics LLC
    Inventors: Zhan Su, Erman Timurdogan, Michael Robert Watts
  • Patent number: 11409063
    Abstract: Waveguides of optically transparent interposers are adiabatically coupled to respective waveguides of photonic integrated circuits that are mounted to the optically transparent interposers. In particular, photonic integrated circuits can be mounted to an interposer that has both optical connections and electrical connections. The optical connections of the interposer can be adiabatically coupled to the photonic integrated circuit. The electrical connections can be connected to the photonic integrated circuit and to a host board that also supports an ASIC.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: August 9, 2022
    Assignee: SAMTEC, INC.
    Inventors: Marc Epitaux, John Coronati
  • Patent number: 11406007
    Abstract: A radio frequency (RF) energy transmission line transition for coupling RF energy between a pair of RF transmission line sections disposed on intersecting surfaces of a corresponding one of a pair of conductive members, a first one of the pair of conductive members having a wall with a jog therein for receiving an end portion of a second one of the pair of conductive members, the end portion of an electrically conductive strip of the first one of the pair of radio frequency transmission line sections being disposed on, and electrically connected to, an electrically conductive strip of a second one of the pair of radio frequency transmission line sections.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: August 2, 2022
    Assignee: RAYTHEON COMPANY
    Inventors: Christopher M. Laighton, Susan C. Trulli, Elicia K. Harper
  • Patent number: 11404850
    Abstract: In an example embodiment, a system includes a first grating-coupled laser (GCL) that includes a first laser cavity optically coupled to a first transmit grating coupler configured to redirect horizontally-propagating first light, received from the first laser cavity, vertically downward and out of the first GCL. The system also includes a second GCL that includes a second laser cavity optically coupled to a second transmit grating coupler configured to transmit second light vertically downward and out of the second GCL. The system also includes a photonic integrated circuit (PIC) that includes a first receive grating coupler optically coupled to a first waveguide and configured to receive the first light and couple the first light into the first waveguide. The PIC also includes a second receive grating coupler optically coupled to a second waveguide and configured to receive the second light and couple the second light into the second waveguide.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: August 2, 2022
    Assignee: II-VI DELAWARE, INC.
    Inventors: Shiyun Lin, Daniel Mahgerefteh
  • Patent number: 11397340
    Abstract: A heating electrode for lowering stress of a light waveguide and a VOA. The heating electrode is provided on an upper cladding layer (04) of a PLC waveguide. The heating electrode is formed by combining two or more sub-heating electrodes (13) arranged at internals. Adjacent sub-heating electrodes (13) are connected by means of conductive electrodes (14) having a conductive function. By dividing a complete elongated heating electrode into a plurality of sub-heating electrodes (13), the stress exerted to a waveguide core layer is lowered without affecting the heating efficiency, and thus the reliability of optical indexes of a device is effectively improved.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: July 26, 2022
    Inventors: Weidong Ma, Xiaohui Xu, Ding Li
  • Patent number: 11391888
    Abstract: Aspects described herein include a method comprising bonding a photonic wafer with an electronic wafer to form a wafer assembly, removing a substrate of the wafer assembly to expose a surface of the photonic wafer or of the electronic wafer, forming electrical connections between metal layers of the photonic wafer and metal layers of the electronic wafer, and adding an interposer wafer to the wafer assembly by bonding the interposer wafer with the wafer assembly at the exposed surface. The interposer wafer comprises through-vias that are electrically coupled with the metal layers of one or both of the photonic wafer and the electronic wafer. The method further comprises dicing the wafer assembly to form a plurality of dies. A respective edge coupler of each die is optically exposed at an interface formed by the dicing.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: July 19, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Sandeep Razdan, Vipulkumar K. Patel, Mark A. Webster, Matthew J. Traverso
  • Patent number: 11391892
    Abstract: Embodiments provide an optical coupling apparatus, an optical module, and a communications device. In those embodiments, the optical coupling apparatus includes: an optical fiber component, including a plurality of optical fibers and an optical fiber fixing block. The plurality of optical fibers are fixed to the optical fiber fixing block. A first end face is disposed on the optical fiber fixing block. At least some of the optical fibers include plug ends which protrude from the first end face. An optical write waveguide block, including a main body and a plurality of waveguides disposed in the main body. A second end face is disposed on the main body, coupling holes that are in a one-to-one correspondence with the plug ends are disposed on the second end face in a recessed manner, and the coupling holes are formed when ends of the waveguides are recessed from the second end face.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: July 19, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jun Liu, Zhen Dong, Lei Gao, Xiaolu Song
  • Patent number: 11391897
    Abstract: Aspects described herein include an apparatus comprising a substrate, an electronic integrated circuit (IC) disposed on the substrate, one or more optical ICs disposed on the substrate and communicatively coupled with the electronic IC, and a stiffener device attached to the substrate. The stiffener device comprises a stiffener ring that substantially circumscribes the one or more optical ICs. The stiffener device defines one or more features configured to receive a plurality of light-carrying media that optically couple with the one or more optical ICs and that extend to one or more lateral edges of the stiffener device.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: July 19, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Paul Ton, Aparna R. Prasad, Norbert Schlepple
  • Patent number: 11385403
    Abstract: An optical transmission device includes a semiconductor laser chip in which a semiconductor laser array having a plurality of distributed feedback semiconductor lasers formed on a first semiconductor substrate is formed, a semiconductor waveguide chip in which a semiconductor modulator array formed on a second semiconductor substrate and having the same number of semiconductor modulators as the semiconductor lasers is formed. In the optical transmission device, a waveguide and a waveguide are butt-joined such that a distance between an end face of the waveguide on a side to the semiconductor modulator array in each of the semiconductor lasers of the semiconductor laser array and an end face of the waveguide on a side to the semiconductor laser array in each of the semiconductor modulators of the semiconductor modulator array is 10 ?m or less.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: July 12, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Takeshi Yamatoya
  • Patent number: 11387626
    Abstract: A tunable laser that includes an array of parallel optical amplifiers is described. The laser may also include an intracavity N×M coupler that couples power between a cavity mirror and the array of parallel optical amplifiers. Phase adjusters in optical paths between the N×M coupler and the optical amplifiers can be used to adjust an amount of power output from M?1 ports of the N×M coupler. A tunable wavelength filter is incorporated in the laser cavity to select a lasing wavelength.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: July 12, 2022
    Assignee: Acacia Communications, Inc.
    Inventor: Christopher Doerr
  • Patent number: 11385406
    Abstract: One example LIDAR device comprises a substrate and a waveguide disposed on the substrate. A first section of the waveguide extends lengthwise on the substrate in a first direction. A second section of the waveguide extends lengthwise on the substrate in a second direction different than the first direction. A third section of the waveguide extends lengthwise on the substrate in a third direction different than the second direction. The second section extends lengthwise between the first section and the second section. The LIDAR device also comprises a light emitter configured to emit light. The waveguide is configured to guide the light inside the first section toward the second section, inside the second section toward the third section, and inside the third section away from the second section.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: July 12, 2022
    Assignee: Waymo LLC
    Inventors: James Dunphy, David Hutchison, Pierre-Yves Droz, Yeh-Jiun Tung
  • Patent number: 11378760
    Abstract: A connector assembly arrangement comprising, disposed on the faces of a circuit board in an electronic device, connector assemblies which, along with having a plug connector that incorporates a photoelectric conversion element capable of converting optical signals and electrical signals from one to the other and a receptacle connector with which said plug connector is mated, have the plug connector and the receptacle connector electrically connected through mutual contact between terminals; wherein the plug connector, from which a fiber optic cable for optical signal transmission that is connected to the photoelectric conversion element extends in one direction from said plug connector, also has terminals connected to the above-mentioned photoelectric conversion element; the fiber optic cable is a single fiber optic cable; and a plurality of connector assemblies are disposed on at least one of the two faces of the circuit board.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: July 5, 2022
    Assignee: Hirose Electric Co., Ltd.
    Inventors: Naruki Ishida, Masayuki Goto, Yoshiaki Sano
  • Patent number: 11381313
    Abstract: An integrated optical transceiver includes a transmitter unit and a receiver unit each provided on a surface region of a substrate member. The transmitter unit includes four laser devices configured to output four laser lights and a set of four power splitter devices coupled to the four laser lights to split each of the four laser lights to two replicated transmit paths. The receiver unit has two replicated receive paths each including a photodetector device and a transimpedance amplifier device coupled to the photodetector device. A planar light circuit block is mounted on the substrate member and includes a multiplexer device configured to couple the four laser lights of the transmitter unit and multiplex to one output light delivered to an optical output port and a demultiplexer device configured to receive an input light from an optical input port and demultiplex to four input optical signals for the receiver unit.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: July 5, 2022
    Assignee: MARVELL ASIA PTE LTD.
    Inventors: Ding Liang, Mark Patterson, Roberto Coccioli, Radhakrishnan L. Nagarajan
  • Patent number: 11378762
    Abstract: A method of transfer printing. The method comprising: providing a precursor photonic device, comprising a substrate and a bonding region, wherein the precursor photonic device includes one or more alignment marks located in or adjacent to the bonding region; providing a transfer die, said transfer die including one or more alignment marks; aligning the one or more alignment marks of the precursor photonic device with the one or more alignment marks of the transfer die; and bonding at least a part of the transfer die to the bonding region.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: July 5, 2022
    Assignee: Rockley Photonics Limited
    Inventors: Guomin Yu, Mohamad Dernaika, Ludovic Caro, Hua Yang, Aaron John Zilkie
  • Patent number: 11378751
    Abstract: By determining an alignment point for a photonic element in a substrate of a given material; applying, via a laser aligned with the photonic element according to the alignment point, an etching pattern to the photonic element to produce a patterned region and an un-patterned region in the photonic element, wherein applying the etching pattern alters a chemical bond in the given material for the patterned region of the photonic element that increases a reactivity of the given material to an etchant relative to a reactivity of the un-patterned region, and wherein the patterned region defines an engagement feature in the un-patterned region that is configured to engage with a mating feature on a Photonic Integrated Circuit (PIC); and removing the patterned region from the photonic element via the etchant, various systems and methods may make use of laser patterning in optical components to enable alignment of optics to chips.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: July 5, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar Patel, Matthew J. Traverso, Ashley J. Maker, Jock T. Bovington
  • Patent number: 11372271
    Abstract: According to embodiments of the present invention, an optical modulator is provided. The optical modulator includes a substrate, and a waveguiding arrangement on the substrate, the waveguiding arrangement having a waveguide, and at least one graphene layer arranged to interact with light propagating in the waveguiding arrangement, wherein the waveguide is designed such that the light interacting with the at least one graphene layer has a maximum intensity overlapping with the at least one graphene layer. According to further embodiments of the present invention, a method for forming the optical modulator, and a method for controlling the optical modulator are also provided.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: June 28, 2022
    Assignee: Nanyang Technological University
    Inventors: Xiaonan Hu, Guozhen Liang, Bo Meng, Qijie Wang
  • Patent number: 11373980
    Abstract: A semiconductor package includes a first semiconductor chip including a first surface and a second surface which face each other, an alignment pattern formed on the first surface, a first redistribution layer arranged on the first surface of the first semiconductor chip, a second redistribution layer arranged on the second surface of the first semiconductor chip, and electrically connected with the semiconductor chip, and a first dielectric layer including the alignment pattern between the first redistribution layer and the semiconductor chip, the alignment pattern overlapping the first surface of the first semiconductor chip.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: June 28, 2022
    Assignee: Samsung Electronics Co, Ltd.
    Inventors: Jong Youn Kim, Dong Kyu Kim, Jin-Woo Park, Min Jun Bae, Gwang Jae Jeon
  • Patent number: 11373954
    Abstract: A semiconductor package includes a redistribution layer, a semiconductor chip on the redistribution layer, and a molding layer covering a sidewall of the semiconductor chip and a top surface and a sidewall of the redistribution layer. The sidewall of the redistribution layer is inclined with respect to a bottom surface of the redistribution layer, and a sidewall of the molding layer is spaced apart from the sidewall of the redistribution layer.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: June 28, 2022
    Inventor: Jongyoun Kim
  • Patent number: 11373991
    Abstract: Methods of manufacturing light-emitting devices are described herein. A method includes obtaining a packaging substrate. The packaging substrate includes an embedded metal inlay, vias in the packaging substrate and contacts on a bottom surface of the packaging substrate, each electrically coupled to a respective one of the vias. The method also includes forming a hybridized device, attaching a bottom surface of the hybridized device to a top surface of the metal inlay, and wirebonding a top surface of the hybridized device to a stop surface of the packaging substrate using a plurality of conductive connectors.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: June 28, 2022
    Assignee: Lumileds LLC
    Inventors: Tze Yang Hin, Seng Huat Lau, Hideo Kageyama
  • Patent number: 11368227
    Abstract: An optic reference signal generator comprising a housing forming an enclosed space with one or more air flow openings. Within the housing is an optic signal generator driver configured to generate an optic signal generator drive signal. An optic signal generator generates an optic signal responsive to the optic signal generator drive signal. A polarity control unit adjusts polarization of the optic signal to create a polarization adjusted optic signal and a modulator bias generator and controller generates a modulation signal. A pattern signal input receives a pattern signal and a modulator receives the polarization adjusted optic signal, the pattern signal, and the modulation signal to generate a modulated output signal.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: June 21, 2022
    Assignee: MACOM Technology Solutions Holdings, Inc.
    Inventors: Richard Aque, Mitra Tayareh
  • Patent number: 11367997
    Abstract: A method for manufacturing a monolithically integrated semiconductor optical integrated element comprising a DFB laser, an EA modulator, and a SOA disposed in a light emitting direction, comprising the step of forming a semiconductor wafer on which the elements are two-dimensionally arrayed and aligned the optical axes; cleaving the semiconductor wafer along a plane orthogonal to the light emitting direction to form a semiconductor bar including a plurality of the elements arranged one-dimensionally along a direction orthogonal to the light emitting direction such that the elements adjacent to each other share an identical cleavage end face as a light emission surface; inspecting the semiconductor bar by driving the SOA and the DFB laser through a connection wiring part together; and separating out the semiconductor bar after the inspection to cut the connection wiring part connecting the electrode of the SOA and the DFB laser to isolate from each other.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: June 21, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Takahiko Shindo, Naoki Fujiwara, Kimikazu Sano, Hiroyuki Ishii, Hideaki Matsuzaki, Takashi Yamada, Kengo Horikoshi
  • Patent number: 11368322
    Abstract: The present invention relates to a simple data transmission protocol and a data receiving device (10, 10?, 10?, 10??) for a power over Ethernet system (100?) using the simple data transmission protocol. The device (10, 10?, 10?, 10??) comprises a port and a simple logic unit. The port is configured for receiving power and data transmitted to the device (10, 10?, 10?, 10??) via an Ethernet connection (16?). The simple logic unit is configured to decode data encoded in a characteristic of one or more data packets received at the port. The data can be encoded in data packet length, data packet duration, number of data packets in a predetermined interval, and/or sequence of data packets. The simple data transmission protocol can reduce power consumption as in contrast to the Ethernet protocol MAC does not need to be decoded for information transfer. Hence only simple logic functions are required.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: June 21, 2022
    Assignee: SIGNIFY HOLDING B.V.
    Inventors: Harald Josef Günther Radermacher, Matthias Wendt
  • Patent number: 11362735
    Abstract: Disclosed herein are techniques, methods, structures and apparatus that provide a silicon photonics multicarrier optical transceiver wherein both the transmitter and receiver are integrated on a single silicon chip and which generates a plurality of carriers through the effect of an on-chip modulator, amplifies the optical power of the carriers through the effect of an off-chip amplifier, and generates M orthogonal sets of carriers through the effect of an on-chip basis former.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: June 14, 2022
    Assignee: Acacia Communications, Inc.
    Inventor: Christopher Doerr
  • Patent number: 11353399
    Abstract: It is an object of this invention to provide an optical waveguide, an optical concentration measuring device, and a method for manufacturing an optical waveguide capable of achieving an improvement of evanescent wave exuding efficiency of propagating light and light extraction efficiency. A core layer provided in an optical waveguide has a first portion having a first film thickness, a second portion having a second film thickness different from the first film thickness, and a third portion connecting the first portion and the second portion. The third portion is formed so that the film thickness is gradually increased from the second portion having the smaller film thickness toward the first portion having the larger film thickness between the first portion and the second portion, and the maximum inclination angle is 10° or more and 45° or less.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: June 7, 2022
    Assignee: Asahi Kasel Microdevices Corporation
    Inventors: Toshiro Sakamoto, Takaaki Furuya
  • Patent number: 11353655
    Abstract: An integrated optical polarizer for generating linear polarizing light may be formed in a photonic integrated circuit (PIC) for applications that require stable output state of polarization. The integrated polarizer may be built by using the same materials already present in the PIC without use of other additional layers and claddings, and without other additional structural modification to the waveguide profile. The integrated polarizer comprises a plurality of bending waveguides of a pre-determined radius that are connected to each other in sequence. The bending waveguide has a high birefringence and a loose confinement to conduct one polarization mode and attenuate the other polarization mode. The polarization discrimination is controlled with the degree of the mode confinement, the bending radius, and the number of the bending waveguides that are connected in series.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: June 7, 2022
    Assignee: KVH INDUSTRIES, INC.
    Inventors: Liming Wang, Thomas D. Monte
  • Patent number: 11340404
    Abstract: A fiber array device configured to secure and align one or more optical fiber bundles as part of a main body using a fixing material. The fixing material is light cured or room temperature cured. Main body forms an angle from a first direction along a second direction, and a recess the optical bundles are laid within and in which the fixing material is applied. Each individual optical fiber is laid within a groove formed in a lid, the base portion or both the lid and the base portion. The fiber array device is secured to a printed circuit board to form a communication path between the optical fiber and electronics of the board.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: May 24, 2022
    Assignee: Senko Advanced Components, Inc.
    Inventors: Kazuyoshi Takano, Gang Xu, Tomoyuki Mamiya
  • Patent number: 11333907
    Abstract: A system including an optical engine. In some embodiments, the system includes an integrated circuit in a first-level package, and the system includes the optical engine, in the first-level package, and the optical engine includes an electro-optical chip.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: May 17, 2022
    Assignee: Rockley Photonics Limited
    Inventors: David Arlo Nelson, Vivek Raghuraman, David Erich Tetzlaff, Karlheinz Muth, Vivek Raghunathan
  • Patent number: 11336814
    Abstract: Integrated circuit devices are disclosed. The integrated circuit device includes a focus detection pixel and a lens. The focus detection pixel includes a photosensitive unit and a photo-insensitive unit in a substrate. The lens is disposed over the focus detection pixel, wherein the photosensitive unit and the photo-insensitive unit are disposed opposite to each other with respect to an optical axis of the lens, and a light beam passing through the lens is simultaneously incident into the photosensitive unit and the photo-insensitive unit.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: May 17, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zen-Fong Huang, Volume Chien
  • Patent number: 11337010
    Abstract: The present disclosure describes techniques for altering the epoxy wettability of a surface of a MEMS device. Particularly applicable to flip-chip bonding arrangements in which a top surface of a MEMS device is adhered to a package substrate. A barrier region is provided on a top surface of the MEMs device, laterally outside a region which forms, or overlies, the backplate and/or the cavity in the transducer substrate. The barrier region comprises a plurality of discontinuities, e.g. dimples, which inhibit the flow of epoxy.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: May 17, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Marek Sebastian Piechocinski, Roberto Brioschi, Rkia Achehboune
  • Patent number: 11328499
    Abstract: There is provided a 2-stage moving average filter for a navigation device including a delta regulator and an N-taps average circuit. The delta regulator is used as a first stage to receive motion delta at a varied frequency, and combine or split the received motion delta to output a regulated motion delta at a fixed frequency. The N-taps average circuit receives and averages N regulated motion delta and outputs the averaged motion delta at a fixed frequency.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: May 10, 2022
    Assignee: PIXART IMAGING INC.
    Inventors: Zi-Hao Tan, Kevin Len-Li Lim
  • Patent number: 11308308
    Abstract: A fingerprint recognition device, a recognition device and a display device are provided to include: a light guiding layer and a plurality of recognizer units, on a side of a light transmission substrate. Each recognizer unit includes: a first optical grating which is between the light guiding layer and the light transmission substrate and is configured to diffractively couple a fingerprint light ray having an incident angle within a preset angle range to the light guiding layer; a second optical grating on a side of the light guiding layer; and a detector module on a side of the second optical grating away from the light guiding layer. The second optical grating is configured to extract the fingerprint light ray in the light guiding layer to the detector module, and the detector module is configured to detect a light intensity of the fingerprint light ray.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: April 19, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiandong Meng, Wei Wang, Xiaochuan Chen, Haisheng Wang, Pinchao Gu, Jian Gao
  • Patent number: 11307533
    Abstract: Example embodiments relate to imaging devices for in-line holographic imaging of objects. One embodiment includes an imaging device for in-line holographic imaging of an object. The imaging device includes a set of light sources configured to output light in confined illumination cones. The imaging device also includes an image sensor that includes a set of light-detecting elements. The set of light sources are configured to output light such that the confined illumination cones are arranged side-by-side and illuminate a specific part of the object. The image sensor is arranged such that the light-detecting elements detect a plurality of interference patterns. Each interference pattern is formed by diffracted light from the object originating from a single light source and undiffracted light from the same single light source. At least a subset of the set of light-detecting elements is arranged to detect light relating to not more than one interference pattern.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: April 19, 2022
    Assignee: IMEC VZW
    Inventors: Abdulkadir Yurt, Richard Stahl, Murali Jayapala, Geert Vanmeerbeeck
  • Patent number: 11295994
    Abstract: A system may include a wafer that includes ICs and defines cavities. Each cavity may be formed in a BEOL layer of the wafer and proximate a different IC. The system may also include an interposer that includes a transparent layer configured to permit optical signals to pass through. The interposer may also include at least one waveguide located proximate the transparent layer. The at least one waveguide may be configured to adiabatically couple at least one optical signal out of the multiple ICs. Further, the interposer may include a redirecting element optically coupled to the at least one the waveguide. The redirecting element may be located proximate the transparent layer and may be configured to receive the at least one optical signal from the at least one waveguide. The redirecting element may also be configured to vertically redirect the at least one optical signal towards the transparent layer.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: April 5, 2022
    Assignee: II-VI DELAWARE, INC.
    Inventors: Shiyun Lin, Daniel Mahgerefteh, Bryan Park, Jin-Hyoung Lee
  • Patent number: 11294119
    Abstract: Embodiments include a multimode interference (MMI) device with offset facets. The MMI device includes a first set of facets positioned on opposite edges of the MMI device with an optical path between the set of facets. The MMI device also includes a second set of facets positioned on opposite edges of the MMI device, where the second set of facets are offset from the first set of facets, where a second optical path passes through the MMI device between the second set of facets.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: April 5, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Roman Bruck, Attila Mekis
  • Patent number: RE49163
    Abstract: An example integrated circuit (IC) system includes a package substrate having a programmable integrated circuit (IC) and a companion IC mounted thereon, the programmable IC including a programmable fabric and the companion IC including application circuitry. The IC system further includes a system-in-package (SiP) bridge including a first SiP IO circuit disposed in the programmable IC, a second SiP IO circuit disposed in the companion IC, and conductive interconnect on the package substrate electrically coupling the first SiP IO circuit and the second SiP IO circuit. The IC System further includes first aggregation and first dispersal circuits in the programmable IC coupled between the programmable fabric and the first SiP IO circuit. The IC system further includes second aggregation and second dispersal circuits in the companion IC coupled between the application circuitry and the second SiP IO circuit.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: August 9, 2022
    Assignee: XILINX, INC.
    Inventors: Alireza S. Kaviani, Pongstorn Maidee, Ivo Bolsens