Integrated Optical Circuit Patents (Class 385/14)
  • Patent number: 12204150
    Abstract: An assembly of two fiber optic ferrules allows for the mating of a CWDM fiber optic ferrule with a non-CWDM fiber optic ferrule. The CWDM fiber optic ferrule has optical fibers that carry optical beams with at least two different wavelengths, which the non-CWDM ferrule has optical fibers that carry only one wavelength. The CWDM fiber optic ferrule and the non-CWDM fiber optic ferrule have optical fibers that are inserted along parallel axes. The non-CWDM fiber optic ferrule has a lens pitch that matches the CWDM ferrule.
    Type: Grant
    Filed: December 26, 2023
    Date of Patent: January 21, 2025
    Assignee: US Conec Ltd.
    Inventors: Mitchell Cloud, Darrell R. Childers, D J Hastings
  • Patent number: 12197002
    Abstract: Disclosed are a heterogeneously integrated optical modulator and a manufacturing method thereof. The modulator includes a substrate having a trench, an input waveguide disposed at one side of the trench, an output waveguide disposed at the other side of the trench, a first Mach-Zehnder interferometer including first branch waveguides disposed between the input waveguide and the output waveguide and a heater disposed on one of the first branch waveguides, and second Mach-Zehnder interferometers connected to each of the first branch waveguides.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: January 14, 2025
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young-Tak Han, Seoktae Kim, Sang Ho Park, Yongsoon Baek, Jang Uk Shin, Seok Jun Yun, Seo Young Lee
  • Patent number: 12191257
    Abstract: A circuit package is described that includes a photonic interposer, a second interposer, and a die partially overlapping and connected to both the photonic interposer and the second interposer.
    Type: Grant
    Filed: January 8, 2024
    Date of Patent: January 7, 2025
    Assignee: CELESTIAL AI INC.
    Inventor: Ankur Aggarwal
  • Patent number: 12189183
    Abstract: A structure includes a polarization device such as a polarization splitter, a polarization combiner or a polarization splitter rotator including a waveguide having a light absorber at an end section with an at least hook shape, e.g., it can be hooked or spiral shape. The structure also includes another waveguide adjacent the stated waveguide. The hook or spiral shape acts as a light absorber that reduces undesired optical noise such as excessive light insertion loss and/or light scattering. The hook or spiral shape may also be used on supplemental waveguides used to further filter and/or refine an optical signal in one of the waveguides of the polarization device, e.g., downstream of an output section of the polarization splitter and/or rotator.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: January 7, 2025
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yusheng Bian, Won Suk Lee, Andreas D. Stricker
  • Patent number: 12181724
    Abstract: Disclosed are apparatus and methods for optical interconnections that include the integration of a photonics die (pDie) and an electronic die (eDie) with a socket layer, waveguides and fiber connectors to enable high bandwidth communications. In one embodiment, an exemplary optical interconnect device includes an electronic die coupled to a photonics die and integrated with a substrate, a socket, a board, a pair of micro-lenses and a mirror coupled to a waveguide, which can be embedded in the board. In another embodiment, the waveguide is embedded in a socket layer and coupled to a fiber connector. In these embodiments, the exemplary optical interface device can be coupled one more other optical interconnect devices via a waveguide array and/or a fiber array.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: December 31, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Stefan Rusu, Wei-Wei Song, Mohammed Rabiul Islam, Chih-Tsung Shih
  • Patent number: 12174422
    Abstract: A second core includes a first portion, a second portion, and a bending portion. In the first portion, a wave-guiding direction is a first direction parallel to a plane of a first substrate. In the second portion, a wave-guiding direction is a second direction that is at a predetermined angle with respect to the plane of the first substrate. For example, in the second portion, the wave-guiding direction is the second direction that is at substantially 90 degrees with respect to the plane of the first substrate. The bending portion connects the first portion and the second portion. A relative refractive index difference between the second core and a cladding of the second optical waveguide preferably has a value such that the propagation loss in the bending portion is equal to or smaller than 0.1 dB.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: December 24, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Makoto Abe, Atsushi Aratake
  • Patent number: 12174421
    Abstract: A structure for, and method of, forming a first optoelectronic circuitry that generates an optical signal, a second optoelectronic circuitry that receives an optical signal, and a loopback waveguide that connects the output from the first optoelectronic circuitry to the second optoelectronic circuitry on an interposer substrate are described. The connected circuits, together comprising a photonic integrated circuit, are electrically tested using electrical signals that are provided via probing contact pads on the PIC die. Electrical activation of the optoelectrical sending devices and the subsequent detection and measurement of the optical signals in the receiving devices, in embodiments, provides information on the operability or functionality of the PIC on the die at the wafer level, prior to die separation or singulation, using the electrical and optical components of the PIC circuit.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: December 24, 2024
    Assignee: POET Technologies, Inc.
    Inventors: Suresh Venkatesan, Yee Loy Lam
  • Patent number: 12174440
    Abstract: An interconnect package integrates a photonic die, an electronic die, and a switch ASIC into one package. At least some of the components in the electronic die, such as, for example, the serializer/deserializer circuits, transceivers, clocking circuitry, and/or control circuitry are integrated into the switch ASIC to produce an integrated switch ASIC. The photonic die is attached and electrically connected to the integrated switch ASIC.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: December 24, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Rabiul Islam, Stefan Rusu, Nick Samra
  • Patent number: 12176958
    Abstract: Provided is a device which includes a method for the coherent detection of an optical signal, including the following steps of providing a vertically illuminable photodiode; producing an optical reference signal; radiating the optical signal and the reference signal into the photodiode in such a way that the two signals at least partially interfere with each other. Radiating the optical signal into the photodiode is effected via a first side of the photodiode, and radiating the reference signal into the photodiode is effected via a second side of the photodiode, or, vice versa, the reference signal is radiated into the photodiode via the first side of the photodiode and the optical signal is radiated into the photodiode via the second side.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: December 24, 2024
    Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Inventors: Patrick Runge, Francsico Soares, Pascal Rustige, Jan Krause
  • Patent number: 12171089
    Abstract: A light-source apparatus includes a light-source chip, a case, first and second electrically-conductive parts, a substrate, an electromagnetic shield plate, an electrically-conductive layer and an electrically-conductive unit. The light-source chip is received in the case. Each of the first and second electrically-conductive parts is a part of the case. The case is mounted to the substrate. The electromagnetic shield plate covers at least part of the substrate. The electrically-conductive layer is formed on the substrate and electrically connected with both the second electrically-conductive part and the electromagnetic shield plate. The electrically-conductive unit is provided to electrically connect the first electrically-conductive part and the electromagnetic shield plate.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: December 17, 2024
    Assignee: DENSO CORPORATION
    Inventor: Kosuke Niimura
  • Patent number: 12164150
    Abstract: In part, in one aspect, the disclosure relates to a method for passivating a waveguide of an optical circuit. The method includes etching a suspended waveguide in the optical circuit; the suspended waveguide having a top surface, a bottom surface, and side surfaces; and covering the top surface and side surfaces of the suspended waveguide with a passivation coating having a thickness that ranges from between about 10 nm to about 20 nm. In one embodiment, the method further includes removing one or more coatings from a portion of the optical circuit. The disclosure also relates to various passivated optical silicon circuit embodiments.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: December 10, 2024
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Li Chen, Long Chen, Christopher Doerr
  • Patent number: 12164148
    Abstract: A structure for, and method of, forming a first optoelectronic circuitry that generates an optical signal, a second optoelectronic circuitry that receives an optical signal, and a loopback waveguide that connects the output from the first optoelectronic circuitry to the second optoelectronic circuitry on an interposer substrate are described. The connected circuits, together comprising a photonic integrated circuit, are electrically tested using electrical signals that are provided via probing contact pads on the PIC die. Electrical activation of the optoelectrical sending devices and the subsequent detection and measurement of the optical signals in the receiving devices, in embodiments, provides information on the operability or functionality of the PIC on the die at the wafer level, prior to die separation or singulation, using the electrical and optical components of the PIC circuit.
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: December 10, 2024
    Assignee: POET Technologies, Inc.
    Inventors: Suresh Venkatesan, Yee Loy Lam
  • Patent number: 12153253
    Abstract: An optical device includes a waveguide configured to guide light, a taper integrated with the waveguide on a substrate configured for optical coupling, and an attenuator to degrade unwanted optical signal from the taper. The attenuator extends along one side of the taper, and includes one of a conductive structure, a doped structure and a refractive structure.
    Type: Grant
    Filed: July 21, 2023
    Date of Patent: November 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chewn-Pu Jou, Huan-Neng Chen, Lan-Chou Cho, Feng Wei Kuo
  • Patent number: 12149051
    Abstract: In an example embodiment, a system includes a first grating-coupled laser (GCL) that includes a first laser cavity optically coupled to a first transmit grating coupler configured to redirect horizontally-propagating first light, received from the first laser cavity, vertically downward and out of the first GCL. The system also includes a second GCL that includes a second laser cavity optically coupled to a second transmit grating coupler configured to transmit second light vertically downward and out of the second GCL. The system also includes a photonic integrated circuit (PIC) that includes a first receive grating coupler optically coupled to a first waveguide and configured to receive the first light and couple the first light into the first waveguide. The PIC also includes a second receive grating coupler optically coupled to a second waveguide and configured to receive the second light and couple the second light into the second waveguide.
    Type: Grant
    Filed: July 19, 2023
    Date of Patent: November 19, 2024
    Assignee: II-VI DELAWARE, INC.
    Inventors: Shiyun Lin, Daniel Mahgerefteh
  • Patent number: 12140825
    Abstract: An optical communication device is configured to include: a laser diode that outputs light; an EA modulator including a cathode and an anode, to modulate the light output from the laser diode on the basis of a high-frequency signal applied between the cathode and the anode; a resistor connected between the cathode and the anode; and a pattern line connected in series with the resistor and having an inductance component, in which each of the laser diode and the EA modulator is formed on a front surface of the high-frequency line substrate or a back surface of the high-frequency line substrate, and the pattern line is formed on a side face of the high-frequency line substrate.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: November 12, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Nobuo Ohata
  • Patent number: 12136797
    Abstract: The upper surface of the semiconductor substrate has a slope descending from the projection in the second direction at an angle of 0-12° to a horizontal plane. The mesa stripe structure has an inclined surface with a slope ascending from the upper surface of the semiconductor substrate at an angle of 45-55° to the horizontal plane, the mesa stripe structure having an upright surface rising from the inclined surface at an angle of 85-95° to the horizontal plane. The buried layer is made from semiconductor with ruthenium doped therein and is in contact with the inclined surface and the upright surface. The inclined surface is as high as 80% or less of height from the upper surface of the semiconductor substrate to a lower surface of the quantum well layer and is as high as 0.3 ?m or more.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: November 5, 2024
    Assignee: Lumentum Operations LLC
    Inventors: Takafumi Taniguchi, Shigenori Hayakawa, Yasushi Sakuma
  • Patent number: 12128729
    Abstract: An optical transceiver includes a silicon photonics substrate and multiple devices. The devices are configured to process optical signals propagating to and from the optical transceiver, and to perform at least one of an optical-to-electrical conversion of received optical signals to incoming electric signals and an electrical-to-optical conversion of outgoing electric signals to transmitted optical signals. The devices are each fabricated to include respectively a package substrate configured according to one of multiple different package substrate mounting technologies. Each package substrate among the multiple devices is mounted on the silicon photonics substrate according to mounting requirements of the respective package substrate mounting technology of that package substrate. At least two of the package substrates are mounted according to the mounting requirements of different package substrate mounting technologies.
    Type: Grant
    Filed: October 13, 2023
    Date of Patent: October 29, 2024
    Assignee: Marvell Asia Pte Ltd
    Inventors: Ding Liang, Mark Patterson, Roberto Coccioli, Radhakrishnan L. Nagarajan
  • Patent number: 12113081
    Abstract: The package structure having packaged components within includes a circuit board, multiple packaged light detecting components mounted on the circuit board, a sealing cap being light transmittable, multiple light filtering films mounted on the sealing cap, and a supporting annular wall. The two opposite ends of the supporting annular wall are adhesively bonded to the surfaces of the circuit board and the sealing cap, such that the projection on the circuit board of the light filtering films corresponds the packaged light detecting components. Since the light filtering films have different filtering frequency bands, each packaged light detecting component detects light of different frequency bands in one incident light beam. The package method is simple and stable, effectively lowering the manufacture cost of the light detecting module.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: October 8, 2024
    Assignee: TAIWAN REDEYE BIOMEDICAL INC.
    Inventors: Shuo-Ting Yan, Chen-Chung Chang, Tsung-Jui Lin
  • Patent number: 12111207
    Abstract: Embodiments are directed to optical measurement systems that utilize multiple emitters to emit light during a measurement, as well as methods of performing measurements using these optical measurement systems. The optical measurement systems may include a light generation assembly that is configured to generate light via a light source unit, and a photonic integrated circuit that includes a launch group having a plurality of emitters. Each of these emitters is optically coupled to the light generation assembly to receive light generated from the light generation assembly, and may emit this light from a surface of the photonic integrated circuit. The optical measurement system may perform a measurement in which the light generation assembly generates light and each of the plurality of emitters simultaneously emit light received from the light generation assembly.
    Type: Grant
    Filed: August 16, 2023
    Date of Patent: October 8, 2024
    Assignee: APPLE INC.
    Inventors: Matthew A Terrel, David S Gere, Alexander F Sugarbaker, Thomas C Greening, Jason S Pelc, Mark A. Arbore
  • Patent number: 12107391
    Abstract: A semiconductor optical element has a mesa structure in which an active layer is embedded, and comprises a straight propagating section and a spot size converter section being such that a light confinement in the active layer is weaker than that of the straight propagating section, wherein in a same plane parallel to a layer surface of the active layer, an average value of a width of the mesa structure of the straight propagating section is smaller than a value of the width of the mesa structure at the emission facet of the spot size converter section, and at a top part of the mesa structure, an electrode is formed so that an electric current is injected in the active layer across the entire length of the straight propagating section and the spot size converter section.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: October 1, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventor: Ayumi Fuchida
  • Patent number: 12099245
    Abstract: Embodiments disclosed herein include optical packages. In an embodiment, an optical package comprises a package substrate, where the package substrate comprises a recessed edge. In an embodiment, a compute die is on the package substrate, and an optics die on the package substrate and overhanging the recessed edge of the package substrate. In an embodiment, an integrated heat spreader (IHS) is over the compute die and the optics die. In an embodiment, a lid covers the recess in the package substrate.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: September 24, 2024
    Assignee: Intel Corporation
    Inventors: Asako Toda, Chia-Pin Chiu, Xiaoqian Li, Yiqun Bai
  • Patent number: 12100926
    Abstract: An embodiment of the present invention provides a photodetector chip, including a substrate, a semiconductor optical amplification section, and a photodetection section. The substrate includes a surface, the photodetection section and the semiconductor optical amplification section are arranged on the substrate, and the photodetection section is located in an optical signal output direction of the semiconductor optical amplification section. The semiconductor optical amplification section amplifies and filters an input optical signal to output an amplified and filtered optical signal to the photodetection section. The photodetection section is configured to convert the amplified and filtered optical signal into an electrical signal. The semiconductor optical amplification section includes a grating, the grating includes a first grating and a second grating that are cascaded, and the first grating is a slanted grating.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: September 24, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yuanbing Cheng, Heng Wang, Jing Dai, Yinghua Dong
  • Patent number: 12092874
    Abstract: A silicon photonic package and a method of fabricating the package are disclosed. The silicon photonic package includes an optical waveguide structure, a heat dissipation structure, a plastic encapsulation layer, first and second structures. The optical waveguide structure is a right trapezoidal structure, and a surface where a non-right angle leg thereof is a totally reflecting surface capable of totally reflecting an optical signal that enters the optical waveguide structure from a surface where a right angle leg is disposed in a direction parallel to bases to a plane where a front face of the plastic encapsulation layer is disposed. The heat dissipation structure and the optical waveguide structure are spaced apart from each other and both embedded in the plastic encapsulation layer. The optical waveguide structure of the present invention allows a great reduction in loss of an optical signal incurred by its propagation in the optical waveguide structure.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: September 17, 2024
    Assignee: OIP TECHNOLOGY PTE LTD.
    Inventor: Yonggang Jin
  • Patent number: 12092871
    Abstract: A device has a plurality of waveguide structures including two active (one of which comprises two sub-layers), two passive, and three intermediate waveguide structures on a common substrate. At least partial butt coupling between active and intermediate waveguide structures, and tapering in the intermediate and/or passive waveguide structures at each junction therebetween facilitates efficient optical mode transformations as optical signals travel through the device, either from a first sub-layer of the first active waveguide structure through the other sub-layer, then sequentially though a first intermediate waveguide structure, a passive waveguide structure, a second intermediate waveguide structure, a second active waveguide structure, a third intermediate structure, and a second passive waveguide structure; or in reverse from the second passive waveguide structure back through to the first sub-layer of the first active waveguide structure.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: September 17, 2024
    Assignee: NEXUS PHOTONICS LLC
    Inventors: Aditya Malik, Hyun Dai Park, Tin Komljenovic
  • Patent number: 12092867
    Abstract: Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.
    Type: Grant
    Filed: December 1, 2023
    Date of Patent: September 17, 2024
    Assignee: Lightmatter, Inc.
    Inventors: Nicholas C. Harris, Carl Ramey, Michael Gould, Thomas Graham, Darius Bunandar, Ryan Braid, Mykhailo Tymchenko
  • Patent number: 12092884
    Abstract: An optical transceiver includes housing, connector coupler and internal optical connector. Opening of housing is located on a side of housing and connected to accommodation space of housing. Connector coupler includes positioning frame and at least one elastic holding arm. Elastic holding arm protrudes from positioning frame and forms holding space. Positioning frame is located between at least a part of elastic holding arm and opening. Positioning frame is disposed in accommodation space. Positioning recess is located on a side of positioning frame close to opening and connected to holding space. At least a part of internal optical connector is located in holding space to be held in position by elastic holding arm. Positioning recess is configured to position external optical connector so as to allow internal optical connector to be plugged with and optically coupled to external optical connector.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: September 17, 2024
    Assignee: Global Technology Inc.
    Inventors: Gaofei Yao, Qilin Hong, Yi Lin, PengBin Lin
  • Patent number: 12092873
    Abstract: An optical fiber coupler includes a plurality of optical fibers parallel to each other in a first direction, an optical fiber array block (FAB) configured to maintain a constant center-to-center distance between the plurality of optical fibers, and an optical waveguide block including a plurality of optical waveguides coupled to the plurality of optical fibers, respectively, and configured to transfer optical signals transmitted through the plurality of optical fibers connected to the optical FAB in a second direction in which a photonics chip is placed and which is different from the first direction.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: September 17, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sae-Kyoung Kang, Joon Young Huh, Joon Ki Lee
  • Patent number: 12089330
    Abstract: A wiring substrate includes an insulating layer, a conductor layer formed on surface of the insulating layer and including a conductor pad, a covering layer covering a portion of the insulating layer, an optical waveguide positioned on the surface of the insulating layer and including core part, and a conductor post including plating metal and formed on the conductor pad such that the post is penetrating through the covering layer and connected to a component. The insulating layer has component region covered by the component when the component is connected, the core part has side surface extending in direction along the surface of the insulating layer, the side surface has an exposed portion exposed in the component region and facing the opposite direction with respect to the insulating layer, and distance between the exposed portion and the surface of the insulating layer is greater than thickness of the covering layer.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: September 10, 2024
    Assignee: IBIDEN CO., LTD.
    Inventor: Masatoshi Kunieda
  • Patent number: 12078484
    Abstract: A sensing component of a gyroscope and an opto-MEMS gyroscope comprising said sensing component are provided, the sensing component comprising, a frame; a proof mass configured to be displaced in response to a Coriolis force applied to the sensing component; and a photonic crystal cavity comprising, a first photonic crystal coupled to the proof mass; and a second photonic crystal coupled to the frame; wherein the first and second photonic crystals each comprises an array of holes formed thereon; wherein the photonic crystal cavity is configured to generate an optical output in response to the Coriolis force, and wherein the sensing component is configured to measure the Coriolis force based on changes in the optical output.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: September 3, 2024
    Assignee: ANYON TECHNOLOGIES PTE. LTD.
    Inventors: Hongbo Zhang, Hengjiang Ren, Jie Luo
  • Patent number: 12080651
    Abstract: Various three-dimensional devices that can be formed within the bulk of a semiconductor by photo-controlled selective etching are described herein. With more particularity, semiconductor devices that incorporate three-dimensional electrical vias, waveguides, or fluidic channels that are disposed within a semiconductor are described herein. In an exemplary embodiment, a three-dimensional interposer chip includes an electrical via, a waveguide, and a fluidic channel, wherein the via, the waveguide, and the fluidic channel are disposed within the body of a semiconductor element rather than being deposited on a surface. The three-dimensional interposer is usable to make electrical, optical, or fluidic connections between two or more devices.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: September 3, 2024
    Assignee: NIELSON SCIENTIFIC, LLC
    Inventor: Gregory Nolan Nielson
  • Patent number: 12067456
    Abstract: A system for entanglement-enhanced machine learning with quantum data acquisition includes a first variational circuit that generates a plurality of entangled probe light fields that interacts with a sample and is then processed by a second variational quantum circuit to produce at least one detection light field, a detector is used to measure a property of the at least one detection light field, and the first and second variational quantum circuits are optimized though machine learning. A method for entanglement-enhanced machine learning with quantum data acquisition includes optimizing a setting of a first and second variational quantum circuits, which includes probing a training-set with a plurality of entangled probe light fields generated by the first variational quantum circuit, and measuring a phase property of at least one detection light fields generated by the second variational quantum circuit from the plurality of entangled probe light fields after interaction with the training-set.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: August 20, 2024
    Assignee: Arizona Board of Regents on Behalf of the University of Arizona
    Inventors: Quntao Zhuang, Zheshen Zhang
  • Patent number: 12069888
    Abstract: An organic light emitting display substrate includes: a base substrate; organic light emitting diodes disposed on the base substrate, with each organic light emitting diode including a first electrode layer, an organic light emitting layer and a second electrode layer, and the first electrode layer and the second electrode layer forming an optical resonant cavity; and a nanoparticle layer on a side of the organic light emitting diodes away from the base substrate and includes nanoparticle patterns, each nanoparticle pattern is disposed on a side of a second electrode layer of a corresponding one of the plurality of organic light emitting diodes away from an organic light emitting layer and at least partially covers the second electrode layer. Resonance mode of the nanoparticle pattern is coupled with a resonance mode of an optical resonant cavity of the corresponding organic light emitting diode to form a Fano resonance.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: August 20, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Feng Wang, Ziyu Zhang
  • Patent number: 12066671
    Abstract: A semiconductor device includes a plurality of intermediate waveguides. The plurality of intermediate waveguides are vertically disposed on top of one another, and vertically adjacent ones of the plurality of intermediate waveguides are laterally offset from each other. When viewed from the top, each of the plurality of intermediate waveguides essentially consists of a first portion and a second portion, the first portion has a first varying width that increases from a first end of the corresponding intermediate waveguide to a middle of the corresponding intermediate waveguide, and the second portion has a second varying width that decreases from the middle of the corresponding intermediate waveguide to a second end of the corresponding intermediate waveguide.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: August 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Tse Tang, Chewn-Pu Jou, Chih-Wei Tseng, Hsing-Kuo Hsia, Ming Yang Chung
  • Patent number: 12055772
    Abstract: An optical interconnect for optically coupling at least a first optical integrated circuit and a second optical integrated circuit. The optical interconnect comprises at least two layers of optically transparent material. There is a first optical waveguide arranged along a surface of a first one of the at least two layers of optically transparent material. There is further a first non-guided optical path extending from the first optical waveguide through the at least two layers of optically transparent material. A first reflective element is arranged to receive light from at least one of the first non-guided optical path and the first optical waveguide and direct the light to the other of the first non-guided optical path and the first optical waveguide. At least one lens is arranged at a boundary between two of the at least two layers of optically transparent material. The at least one lens is arranged to receive and focus light travelling along the first non-guided optical path.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: August 6, 2024
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Francesco Testa, Marco Romagnoli, Luigi Tallone
  • Patent number: 12055777
    Abstract: A multichip package may include at least a package substrate, a main die mounted on the package substrate, a transceiver die mounted on the package substrate, and an optical engine die mounted on the package substrate. The main die may communicate with the transceiver die via a first high-bandwidth interconnect bridge embedded in the package substrate. The transceiver die may communicate with the optical engine die via a second high-bandwidth interconnect bridge embedded in the package substrate. The transceiver die has physical-layer circuits that directly drive the optical engine. An optical cable can be connected directly to the optical engine of the multichip package.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: August 6, 2024
    Assignee: Intel Corporation
    Inventors: Peng Li, Joel Martinez, Jon Long
  • Patent number: 12055773
    Abstract: An alignment optical circuit includes: a plurality of grating couplers that are formed on a substrate and arranged on a line; a plurality of optical waveguides that are connected to the plurality of grating couplers, respectively. Further, the alignment optical circuit includes an optical sensor that is formed on the substrate and measures optical intensity at a first light-receiving spot and a second light-receiving spot on a line along an arrangement direction of the plurality of grating couplers.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: August 6, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Toru Miura, Yoshiho Maeda, Hiroshi Fukuda
  • Patent number: 12044857
    Abstract: A hybrid reflective/refractive HMD includes a structural frame, refractive optical lens elements, and optics housings coupled to the structural frame and positioned in front of a user's first and second eyes. Light-emitting visual sources and reflective optical surfaces are contained in the optics housings. Visual content is transmitted from light-emitting visual sources to the reflective optical surfaces. The visual content is reflected within the reflective optical surfaces at least four times without passing through a refractive optical lens element. The visual content is transmitted to the user's first eye or the user's second eye. Simultaneous with the transmission of the visual content to the user's first eye or the user's second eye, a real-world view of the outside surrounding environment is transmitted to the user's first eye or the user's second eye. The visual content is overlaid onto the real-world view of the outside surrounding environment.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: July 23, 2024
    Inventor: Douglas Peter Magyari
  • Patent number: 12044892
    Abstract: A semiconductor package includes a first interposer having a first substrate, a first redistribution structure over a first side of the first substrate, and a first waveguide over the first redistribution structure and proximate to a first side of the first interposer, where the first redistribution structure is between the first substrate and the first waveguide. The semiconductor package further includes a photonic package attached to the first side of the first interposer, where the photonic package includes: an electronic die, and a photonic die having a plurality of dielectric layers and a second waveguide in one of the plurality of dielectric layers, where a first side of the photonic die is attached to the electronic die, and an opposing second side of the photonic die is attached to the first side of the first interposer, where the second waveguide is proximate to the second side of the photonic die.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: July 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Hua Yu, Hsing-Kuo Hsia
  • Patent number: 12040321
    Abstract: An optical device includes an optical component and an electrical component. The optical component has a sensing surface and a backside surface opposite to the sensing surface. The electrical component is disposed adjacent to the backside surface of the optical component and configured to support the optical component. A portion of the backside surface of the optical component is exposed from the electrical component.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: July 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hsiang-Cheng Tsai, Ying-Chung Chen
  • Patent number: 12038616
    Abstract: A photonic system includes a light source and a photonic structure. The photonic structure includes an optical transmission structure and an optical absorption structure. The optical transmission structure is configured to transmit light associated with a first wavelength range. The optical absorption structure is configured to absorb light associated with a second wavelength range. The light source is configured to provide a light beam with a wavelength that is within the second wavelength range to the optical absorption structure. The optical absorption structure is configured to generate and provide heat to the optical transmission structure when the light beam falls incident on the optical absorption structure.
    Type: Grant
    Filed: July 14, 2023
    Date of Patent: July 16, 2024
    Assignee: VIAVI Solutions Inc.
    Inventor: William D. Houck
  • Patent number: 12032268
    Abstract: An optical modulator in which an optical signal is input from one side of a package, includes in the package, a chip that optically modulates the optical signal and in which an input waveguide and an output waveguide of the optical signal are led to mutually different destinations each being one end of the chip facing the one side of the package and a side surface of the chip orthogonal to the one end of the chip; an input optical system coupled to the input waveguide of the chip; and an output optical system coupled to the output waveguide of the chip.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: July 9, 2024
    Assignee: FUJITSU OPTICAL COMPONENTS LIMITED
    Inventors: Shinji Maruyama, Shuntaro Makino, Yoshimitsu Sakai, Yoshinobu Kubota
  • Patent number: 12025833
    Abstract: Provided is an optical waveguide element that prevents leaked light generated at a forking section from entering a downstream optical waveguide such as another forking section, thereby affording minimal degradation of optical characteristics. The optical waveguide is characterized in that: at least one of two fork waveguides (20a, 20b) forking from a first forking section (20) comprises a second forking section (21, 22); slab waveguides (3c-1 to 3c-3) are formed between the two fork waveguides; and between the first forking section and the second forking section, slits (41, 42) are formed that partition the slab waveguides into a first slab waveguide area (3c-1) close to the first forking section and second slab waveguide areas (3c-2, 3c-3) close to the second forking section(s).
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: July 2, 2024
    Assignee: SUMITOMO OSAKA CEMENT CO., LTD.
    Inventors: Yu Kataoka, Norikazu Miyazaki
  • Patent number: 12007602
    Abstract: In an integrated optical device, squeezed light is used internally to effectively increase an optical modulation effect. One exemplary device operates by squeezing the light at the input, then sending it through an electro-optic stage where its phase picks up the signal of interest, and finally anti-squeezing it to obtain a displaced coherent state. Thus the displacement is amplified by the level of squeezing that is achieved inside the device and it is thereby less sensitive to loss. Since this device behaves simply as an electro-optic modulator, albeit one with an exponentially enhanced sensitivity, no extra considerations are needed to integrate the modulator into a system. Such devices can be operated as modulators or as sensors, and can make use of optical phase shift effects other than the electro-optic effect.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: June 11, 2024
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Amir H. Safavi-Naeini, Timothy Patrick McKenna, Hubert S. Stokowski
  • Patent number: 12001120
    Abstract: An optical device including a plurality of electrodes, an electro-optic component, an optical grating, and a buried back reflector is described. The electro-optic component includes at least one optical material exhibiting an electro-optic effect. The optical grating is optically coupled with the electro-optic component. In some embodiments, the optical grating includes a vertical optical grating coupler. The buried back reflector is optically coupled with the optical grating. The buried back reflector is configured to increase a coupling efficiency of the optical grating to an out-of-plane optical mode and configured to reduce a performance perturbation to the plurality of electrodes. The buried back reflector may include a metal layer having a thickness of at least thirty nanometers and not more than five hundred nanometers.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: June 4, 2024
    Assignee: HyperLight Corporation
    Inventors: Mian Zhang, Kevin Luke, Prashanta Kharel, Christian Reimer, Lingyan He
  • Patent number: 11994426
    Abstract: A photon counting device includes unit cells, a bias current source coupled to the unit cells, and a waveguide coupled to the unit cells. Each unit cell includes photodetector(s). Each photodetector includes superconducting component(s) and a transistor. The transistor includes a superconducting gate that is coupled in parallel with the photodetector(s), and a channel that is electrically isolated from the superconducting gate. For each unit cell, a photodetector is optically coupled to the waveguide. A superconducting component is configured to transition from the superconducting state to the non-superconducting state in response to a photon being incident upon the superconducting component while the superconducting component receives at least a portion of bias current output from the bias current source.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: May 28, 2024
    Assignee: PSIQUANTUM CORP.
    Inventors: Faraz Najafi, Eric Dudley
  • Patent number: 11977256
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor package comprising optically coupled integrated circuit (IC) chips. A first IC chip and a second IC chip overlie a substrate at a center of the substrate. A photonic chip overlies the first and second IC chips and is electrically coupled to the second IC chip. A laser device chip overlies the substrate, adjacent to the photonic chip and the second IC chip, at a periphery of the substrate. The photonic chip is configured to modulate a laser beam from the laser device chip in accordance with an electrical signal from the second IC chip and to provide the modulated laser beam to the first IC chip. This facilitates optical communication between the first IC chip to the second IC chip. Various embodiments of the present disclosure are further directed towards simultaneously aligning and bonding constituents of the semiconductor package.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Hau-Yan Lu, Wei-Kang Liu, Yingkit Felix Tsui
  • Patent number: 11971592
    Abstract: The present disclosure provides a method for stacking a plurality of optical fibre ribbons in an optical fibre cable. The method includes a step of arranging a plurality of optical fibre ribbon stacks in a hexagonal arrangement in the optical fibre cable. The method may further include stacking the plurality of optical fibre ribbons to form an optical fibre ribbon stack such that the optical fibre ribbon stack may have a parallelogram shape. Each optical fibre ribbon is placed at an offset from adjacent optical fibre ribbon. The optical fibre ribbon stack may have a stack height. In addition, each optical fibre ribbon of the plurality of optical fibre ribbons may have a ribbon height. The hexagonal arrangement may have the packaging density greater than 80%.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: April 30, 2024
    Inventors: Badri Gomatam, Manish Sinha
  • Patent number: 11971757
    Abstract: In embodiments, an electronic device may include a housing, a display panel, and an optical sensor module. The display panel is disposed in an inner space of the housing and is at least partially visible from an outside through the housing, the display including a display area, a first non-display area disposed adjacent to at least a peripheral portion of the display area, and a second non-display area disposed adjacent to at least a peripheral portion of the first non-display area. The optical sensor module is disposed in the inner space at least partially overlapping the display panel, and includes a flexible printed circuit board (FPCB), a light emitting structure disposed on the FPCB at least partially overlapping the first non-display area when the display panel is viewed from above, and a light receiving structure disposed on the FPCB at least partially overlapping the display area when the display panel is viewed from above.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: April 30, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jongah Kim, Jeongho Cho, Heewoong Yoon, Donghan Lee
  • Patent number: 11963291
    Abstract: A packaging assembly and methodology provide a PCB substrate with one or more waveguide apertures and a conductive pattern which includes a plurality of landing pads that are disposed around peripheral edges of each waveguide aperture and that are connected to one another by trace lines so that, upon attachment and reflow of solder balls to the plurality of landing pads, the solder balls reflow along the trace lines to form a fully closed solder waveguide shielding wall disposed around peripheral edges of the first waveguide aperture.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: April 16, 2024
    Assignee: NXP B.V.
    Inventors: Leo van Gemert, Michael B. Vincent
  • Patent number: 11960131
    Abstract: Described herein is an integrated photonics device including a light emitter, integrated edge outcoupler(s), optics, and a detector array. The device can include a hermetically sealed enclosure. The hermetic seal can reduce the amount of moisture and/or contamination that may affect the measurement, analysis, and/or the function of the individual components within the sealed enclosure. Additionally or alternatively, the hermetic seal can be used to protect the components within the enclosure from environmental contamination induced during the manufacturing, packaging, and/or shipping process. The outcoupler(s) can be formed by creating one or more pockets in the layers of a die. Outcoupler material can be formed in the pocket and, optionally, subsequent layers can be deposited on top. The edge of the die can be polished until a targeted polish plane is achieved. Once the outcoupler is formed, the die can be flipped over and other components can be formed.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: April 16, 2024
    Inventors: Michael J. Bishop, Vijay M. Iyer, Jason S. Pelc, Mario J. Costello