Integrated Optical Circuit Patents (Class 385/14)
  • Patent number: 11914201
    Abstract: A multi-chip photonic assembly includes first and second photonic integrated circuits having first and second waveguides vertically stacked such that first vertical dimensions of the first and second waveguides occupy different horizontal planes in the stack. At least one of the first and second waveguides has a region that has a second vertical dimension that is larger than the first vertical dimension and either horizontally overlaps the other waveguide and/or vertically contacts the other waveguide. Light moving through one of the waveguides from the first vertical dimension to the other vertical dimension changes modes vertically so that the light moves from one waveguide to the other.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: February 27, 2024
    Assignee: Apple Inc.
    Inventors: Jeremy D. Witmer, Alfredo Bismuto
  • Patent number: 11914264
    Abstract: Photonic ring modulators with high tuning efficiency and small footprint can be formed in a hybrid material platform from a silicon bus waveguide vertically coupled to an optically active compound semiconductor (e.g., III-V) ring resonator. The performance of the modulator, e.g., in terms of the tuning efficiency and the maximum insertion loss, may be optimized by suitable levels of an applied bias voltage and a heater power of a heater optionally included in the ring modulator. The disclosed hybrid photonic ring modulators may be used, e.g., in photonic transceiver circuits with high lane count.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: February 27, 2024
    Assignee: OpenLight Photonics, Inc.
    Inventors: John Parker, Jonathan Edgar Roth, Gregory Alan Fish
  • Patent number: 11906802
    Abstract: An apparatus includes a substrate that includes one or more routing layers, and an optical module coupled to the substrate. The optical module includes a photonic integrated circuit (PIC) and electronic integrated circuit (EIC), wherein the photonic integrated circuit is at least partially embedded within the substrate. The apparatus further includes a fiber optic coupler coupled to at least one of the substrate or PIC, wherein the PIC is configured to transmit or receive an optical signal via the fiber optic coupler.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: February 20, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Mayank Mayukh, Sam Zhao, Sam Karikalan, Reza Sharifi, Liming Tsau, Arun Ramakrishnan, Dharmendra Saraswat
  • Patent number: 11899254
    Abstract: A photonic integrated circuit including an InP-based substrate that is provided with a first InP-based optical waveguide and a neighboring second InP-based optical waveguide, a dielectric planarization layer that is arranged at least between the first optical waveguide and the second optical waveguide. At least between the first optical waveguide and the neighboring second optical waveguide, the dielectric planarization layer is provided with a recess that is arranged to reduce or prevent optical interaction between the first optical waveguide and the second optical waveguide via the dielectric planarization layer. At the location of the recess, the dielectric planarization layer has a first sidewall that is arranged sloped towards the first optical waveguide, and a second sidewall that is arranged sloped towards the second optical waveguide. An opto-electronic system including said PIC.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: February 13, 2024
    Assignee: EFFECT PHOTONICS B.V.
    Inventor: Tsjerk Hans Hoekstra
  • Patent number: 11894312
    Abstract: A package includes an interposer structure free of any active devices. The interposer structure includes an interconnect device; a dielectric film surrounding the interconnect device; and first metallization pattern bonded to the interconnect device. The package further includes a first device die bonded to an opposing side of the first metallization pattern as the interconnect device and a second device die bonded to a same side of the first metallization pattern as the first device die. The interconnect device electrically connects the first device die to the second device die.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yu Chen, Chun-Chih Chuang, Kuan-Lin Ho, Yu-Min Liang, Jiun Yi Wu
  • Patent number: 11892678
    Abstract: A photonic device includes a silicon layer, wherein the silicon layer extends from a waveguide region of the photonic device to a device region of the photonic device, and the silicon layer includes a waveguide portion in the waveguide region. The photonic device further includes a cladding layer over the waveguide portion, wherein the device region is free of the cladding layer. The photonic device further includes a low refractive index layer in direct contact with the cladding layer, wherein the low refractive index layer comprises silicon oxide, silicon carbide, silicon oxynitride, silicon carbon oxynitride, aluminum oxide or hafnium oxide. The photonic device further includes an interconnect structure over the low refractive index layer.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Ying Wu, Yuehying Lee, Sui-Ying Hsu, Chen-Hao Huang, Chien-Chang Lee, Chia-Ping Lai
  • Patent number: 11886004
    Abstract: Provided is a planar lightwave circuit in which stress on a substrate is reduced to decrease the curve of the substrate. The planar lightwave circuit is formed by layering a glass film on the substrate. When the optical axis direction from an input waveguide toward an output waveguide is in the longitudinal direction of the substrate, a plurality of grooves are formed in a line in the transverse direction of the substrate.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: January 30, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Junji Sakamoto, Toshikazu Hashimoto
  • Patent number: 11874495
    Abstract: A monolithic InP-based PIC having a first photonic assembly that has a first optical splitter-combiner unit having a first end part that is optically connected with a first optical waveguide and a second end part that is optically connected with a first main photonic circuit and a first auxiliary photonic circuit. The first auxiliary photonic circuit has a first laser unit, and a first SOA. The first SOA is configurable to be in a first operational state in which the first SOA allows optical communication between the first laser unit and the first optical splitter-combiner unit, or a second operational state in which the first SOA prevents optical communication between the first laser unit and the first optical splitter-combiner unit. An opto-electronic system including the PIC.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: January 16, 2024
    Assignee: EFFECT PHOTONICS B.V.
    Inventors: Tim Koene, Niall Patrick Kelly
  • Patent number: 11874497
    Abstract: A photonic chip and a preparation method thereof are provided. The chip includes a lithium niobate film modulator array, a first optical coupling array, and a silica waveguide wavelength-division multiplexer, and the lithium niobate film modulator array includes one or more lithium niobate film modulators and is used to modulate an optical signal; the first optical coupling array includes one or more first optical coupling structures, and the first optical coupling structure has one end connected to a corresponding lithium niobate thin film modulator and the other end connected to the silica waveguide wavelength-division multiplexer so as to transmit the modulated optical signal to the silica waveguide wavelength-division multiplexer; and the silica waveguide wavelength-division multiplexer is used to perform wavelength-division multiplexing on the modulated optical signal.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: January 16, 2024
    Assignee: INSTITUTE OF SEMICONDUCTORS, CHINESE ACADEMY OF SCIENCES
    Inventors: Lin Yang, Shanglin Yang, Lei Zhang
  • Patent number: 11860412
    Abstract: Embodiments include a photonic device with a compensation structure. The photonic device includes a waveguide with a refractive index which changes according to the thermo-optic effect as a temperature of the photonic device fluctuates. The compensation structure is positioned on the photonic device to counteract or otherwise alter the thermo-optic effect on the refractive index of the waveguide in order to prevent malfunctions of the photonic device.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: January 2, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Subal Sahni, Kamal V. Karimanal, Gianlorenzo Masini, Attila Mekis, Roman Bruck
  • Patent number: 11841562
    Abstract: Electro-optic modulation of multiple phase modulator waveguides with a single electrode is made possible by determining places of equal electric field strength. Substrate extensions support edges of a wide hot electrode and ground electrodes equally spaced from the wide hot electrodes. Waveguides are positioned in the extensions separated from the electrodes by buffer layers. A wide microstrip hot electrode on a buffer layer, wider substrate and ground has multiple waveguides in the substrate below the buffer layer. A thinned substrate has a microstrip hot electrode and spaced coplanar grounds with multiple waveguides located on both sides. Decreasing substrate thickness flattens the electric field strength between the electrodes and allows multiple waveguides located between the central hot and outer ground electrodes. Adjacent waveguides with different asymmetric waveguide index portion staged along their length eliminate cross talk.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: December 12, 2023
    Assignee: EOSPACE INC.
    Inventors: David Emil Moilanen, Suwat Thaniyavarn, Walter Charczenko
  • Patent number: 11841533
    Abstract: Disclosed is a structure including a first waveguide core with a first end portion and a second waveguide core with a second end portion, which overlays and is physically separated from the first end portion. The structure includes a coupler configured for interlayer waveguide coupling. Specifically, the coupler includes an additional waveguide core stacked vertically between and physically separated from the first end portion and the second end portion. Optionally, the coupler includes multiple additional waveguide cores. The shapes of the various waveguide cores are configured in order to achieve mode matching so that optical signals pass between the first end portion of the first waveguide core and the second end portion of the second waveguide core through each additional waveguide core in sequence. Also disclosed is a structure including a crossing array implemented using couplers.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: December 12, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventor: Yusheng Bian
  • Patent number: 11841598
    Abstract: A optical modulator with reduced with a reduced amount of ripple is provided. A Mach-Zehnder optical modulator includes a phase modulation unit including optical waveguides having a PN junction structure and traveling wave electrodes, and a dummy phase modulation unit including portions of the traveling wave electrodes, the portions being obtained by forming the respective traveling wave electrodes longer than the phase modulation unit in the light propagation direction of the phase modulation unit, and optical waveguides having the same PN junction structure as that of the optical waveguides of the phase modulation unit and not connected to the optical waveguides of the phase modulation unit.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: December 12, 2023
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Masayuki Takahashi, Ken Tsuzuki, Toshihiro Ito, Kiyofumi Kikuchi
  • Patent number: 11841563
    Abstract: The present disclosure relates to electro-optic modulators that include caps for optical confinement. One example embodiment includes an electro-optic modulator. The electro-optic modulator includes a first cladding layer. The electro-optic modulator also includes a second cladding layer. In addition, the electro-optic modulator includes a first waveguide. The first waveguide is at least partially encapsulated between the first cladding layer and the second cladding layer. Further, the electro-optic modulator includes a thin-film lithium niobate layer adjacent to the second cladding layer. The thin-film lithium niobate layer is on an opposite side of the second cladding layer from the first waveguide. Additionally, the electro-optic modulator includes a first cap positioned on an opposite side of the thin-film lithium niobate layer from the second cladding layer. The first cap enhances optical confinement within the thin-film lithium niobate layer.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: December 12, 2023
    Assignee: IMEC USA NANOELECTRONICS DESIGN CENTER, Inc.
    Inventors: Swapnajit Chakravarty, Reza Safian
  • Patent number: 11835781
    Abstract: A cable assembly may include a first end and a second end. The first end may include a first breakout including a plurality of transmissive conduits implementing a plurality of communications channels and a second breakout including a plurality of conduits implementing a plurality of communications channels. The second end may include a third breakout including a plurality of conduits implementing a plurality of communications channels and a fourth breakout including a plurality of conduits implementing a plurality of communications channels. Communication channels of the first breakout, second breakout, third breakout, and fourth breakout may be arranged such that the first breakout shares a first communications channel with the third breakout, the first breakout shares a second communications channel with the fourth breakout, the second breakout shares a third communications channel with the third breakout, and the second breakout shares a fourth communications channel with the fourth breakout.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: December 5, 2023
    Assignee: Dell Products L.P.
    Inventors: David Piehler, Per Fremrot
  • Patent number: 11837620
    Abstract: A photo receiver includes a photo detector including a semiconductor substrate having a first main surface and a second main surface and a metal pattern layer provided on the second main surface; and a carrier including a supporting substrate having a third main surface facing the second main surface and a solder pattern layer provided on the third main surface. The solder pattern layer is bonded to the metal pattern layer. The first main surface is provided with a variable optical attenuator, an optical 90-degree hybrid device, and a plurality of photodiodes optically coupled to the variable optical attenuator via the optical 90-degree hybrid device. The solder pattern layer and the metal pattern layer are located in a peripheral area surrounding a central area where the variable optical attenuator and the optical 90-degree hybrid device are located when viewed in the normal direction of the first main surface.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: December 5, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki Yagi, Takuya Okimoto, Munetaka Kurokawa
  • Patent number: 11835765
    Abstract: A structure of a silicon photonics device for LIDAR includes a first insulating structure and a second insulating structure disposed above one or more etched silicon structures overlying a substrate member. A metal layer is disposed above the first insulating structure without a prior deposition of a diffusion barrier and adhesion layer. A thin insulating structure is disposed above the second insulating structure. A first configuration of the metal layer, the first insulating structure and the one or more etched silicon structures forms a free-space coupler. A second configuration of the thin insulating structure above the second insulating structure forms an edge coupler.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: December 5, 2023
    Assignee: Aurora Operations, Inc.
    Inventors: Sen Lin, Andrew Steil Michaels
  • Patent number: 11836102
    Abstract: Matrix multiplication process is segregated between two separate dies—a memory die and a compute die to achieve low latency and high bandwidth artificial intelligence (AI) processor. The blocked matrix-multiplication scheme maps computations across multiple processor elements (PE) or matrix-multiplication units. The AI architecture for inference and training includes one or more PEs, where each PE includes memory (e.g., ferroelectric (FE) memory, FE-RAM, SRAM, DRAM, MRAM, etc.) to store weights and input/output I/O data. Each PE also includes a ring or mesh interconnect network to couple the PEs for fast access of information.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: December 5, 2023
    Assignee: KEPLER COMPUTING INC.
    Inventors: Amrita Mathuriya, Rajeev Kumar Dokania, Ananda Samajdar, Sasikanth Manipatruni
  • Patent number: 11831124
    Abstract: The disclosure belongs to the technical field of photoelectric emission in semiconductors, and discloses an electro-absorption modulated laser chip and a fabrication method thereof, which can solve the problems of signal distortion caused by optical crosstalk between components in an existing electro-absorption modulated laser (EML) integrated with a semiconductor optical amplifier (SOA), and failure in longer-distance transmission.
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: November 28, 2023
    Assignee: Yuanjie Semiconductor Technology Co., Ltd.
    Inventors: Mahui Li, Yenting Pan, Yao Mu, Yuchen Shi, Haichao Zhang
  • Patent number: 11828983
    Abstract: Structures for a cavity included in a photonics chip and methods of fabricating a structure for a cavity included in a photonics chip. The structure includes a substrate, a back-end-of-line stack having interlayer dielectric layers on the substrate, and a cavity penetrating through the back-end-of-line stack and into the substrate. The cavity includes first sidewalls and second sidewalls, and the second sidewalls have an alternating arrangement with the first sidewalls to define non-right-angle corners.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: November 28, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Ian Melville, Nicholas Polomoff, Thomas Houghton, Koushik Ramachandran, Pallabi Das
  • Patent number: 11822120
    Abstract: Structures including an optical component and methods of fabricating a structure including an optical component. The structure includes a waveguide core and a back-end-of-line stack including a first metallization level, a second metallization level, and a heat sink having a metal feature in the second metallization level. The heat sink is positioned adjacent to a section of the waveguide core. The first metallization level including a dielectric layer positioned between the metal feature and the section of the waveguide core.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: November 21, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Hemant Dixit, Yusheng Bian, Theodore Letavic
  • Patent number: 11824327
    Abstract: A photonic integrated circuit (PIC) assembly comprising a semiconductor optical amplifier (SOA) array and a U-turn chip. The SOA array includes an input SOA and a plurality of SOAs. The input SOA and the plurality of SOAs are arranged parallel to one another. The U-turn chip includes an optical splitter and a waveguide assembly. The optical splitter is configured to receive amplified input light propagating in a first direction from the input SOA, and divide the amplified light into beams. The waveguide assembly guides the beams to a corresponding SOA of the plurality of SOAs, and adjusts a direction of prorogation of each of the guided beams to be substantially parallel to a second direction that is substantially opposite the first direction.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: November 21, 2023
    Assignee: OURS TECHNOLOGY, LLC
    Inventors: Andrew Steil Michaels, Lei Wang, Sen Lin
  • Patent number: 11822122
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to waveguide structures with metamaterial structures and methods of manufacture. The structure includes: at least one waveguide structure; and metamaterial structures separated from the at least one waveguide structure by an insulator material, the metamaterial structures being structured to decouple the at least one waveguide structure to simultaneously reduce insertion loss and crosstalk of the at least one waveguide structure.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: November 21, 2023
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob, Steven M. Shank
  • Patent number: 11824029
    Abstract: A semiconductor package structure includes a first semiconductor die having an active surface and a passive surface opposite to the active surface, a conductive element leveled with the first semiconductor die, a first redistribution layer (RDL) being closer to the passive surface than to the active surface, a second RDL being closer to the active surface than to the passive surface, and a second semiconductor die over the second RDL and electrically coupled to the first semiconductor die through the second RDL. A first conductive path is established among the first RDL, the conductive element, the second RDL, and the active surface of the first semiconductor die.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: November 21, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi-Han Chen, Hung-Yi Lin
  • Patent number: 11815725
    Abstract: An example photonic integrated circuit includes a transmitter circuit with a optical communication path to an optical coupler configured to couple with an optical fiber. The optical communication path has a propagation direction away from the transmitter circuit and towards the optical coupler. A counter-propagating tap diverts light sent by a light source backward against the propagation direction of the optical communication path. A photodiode receives the diverted light and measures its power level. The photodiode generates a feedback signal for the optical coupler and provides the feedback signal to the optical coupler. The optical coupler receives the feedback signal and adjusts a coupling alignment of the optical communication path to the optical fiber based on the feedback signal, which indicates the measured power level of the diverted counter-propagating light.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: November 14, 2023
    Assignee: OpenLight Photonics, Inc.
    Inventors: Brandon W. Buckley, Brian Robert Koch, John Garcia, Jared Bauters, Sudharsanan Srinivasan, Anand Ramaswamy
  • Patent number: 11808979
    Abstract: A method of fabricating a device coupon including a waveguide which is suitable for use in a micro-transfer printing process. The method comprises the steps, on a wafer, of: depositing a lower cladding layer on an uppermost surface of the wafer; providing a silicon nitride guiding layer on an uppermost surface of the lower cladding; depositing an upper cladding over at least an uppermost surface of the silicon nitride guiding layer; providing a tether over the coupon, and etching away a region of the uppermost layer of the wafer located between the lower cladding layer and a substrate of the wafer, thereby leaving the lower cladding layer, silicon nitride guiding layer, and upper cladding layer suspended above the wafer via the tether.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: November 7, 2023
    Assignee: Rockley Photonics Limited
    Inventors: Guomin Yu, Aaron John Zilkie
  • Patent number: 11803016
    Abstract: Structures for an edge coupler and methods of fabricating such structures. The structure includes a substrate, a waveguide core, and a metamaterial layer positioned in a vertical direction between the substrate and the waveguide core. The metamaterial layer includes a plurality of elements separated by a plurality of gaps and a dielectric material in the plurality of gaps.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: October 31, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventor: Yusheng Bian
  • Patent number: 11796351
    Abstract: Some embodiments of the disclosure provide a demodulation system for obtaining phase change parameters by a fiber-optic Fabry Perot sensor. In an embodiment, the demodulation system includes a transmitting module, a fiber-optic Fabry Perot sensor, a light splitting module, a filter module, a receiving module, and a processing module. The transmitting module transmits a beam with a predetermined wavelength range. The fiber-optic Fabry Perot sensor receives the beam and forms a reflected light beam. The light splitting module is arranged between the transmitting module and the fiber-optic Fabry Perot sensor. The filter module obtains the first light beam, the second light beam, and the third light beam. The filter module has a broadband filter. The receiving module receives the first light beam, the second light beam, and the third light beam and converts them into the first signal, the second signal, and the third signal.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: October 24, 2023
    Assignee: North University of China
    Inventors: Pinggang Jia, Jijun Xiong, Qianyu Ren, Jia Liu, Guowen An, Wenyi Liu
  • Patent number: 11789207
    Abstract: A device for attaching at least one optical fiber to a chip includes at least one nanowaveguide disposed on a substrate of a chip to be attached to an at least one off-chip fiber respectively. At least one oxide taper mode converter is disposed around a nanowaveguide end and in optical communication with and modally coupled to each of the at least one nanowaveguide respectively, and adapted such that each corresponding fiber of at least one off-chip fiber corresponds to a cleaved fiber end each cleaved fiber end to be fused to each oxide taper mode converter respectively to optically couple and mode match each cleaved fiber end to each of the nanowaveguide ends of each of the at least one nanowaveguide via the oxide taper mode converter by a modal coupling. A method for attaching at least one optical fiber to a chip is also described.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: October 17, 2023
    Assignee: University of Rochester
    Inventors: Jaime Cardenas, Juniyali Nauriyal
  • Patent number: 11789296
    Abstract: An optical modulator includes a dielectric layer and a waveguide. The waveguide is disposed on the dielectric layer. The waveguide includes an electrical coupling portion, a slab portion, and an optical coupling portion. The slab portion is directly in contact with both of the electrical coupling portion and the optical coupling portion. The slab portion has a first sub-portion and a second sub-portion connected to the first sub-portion. A top surface of the electrical coupling portion, a top surface of the first sub-portion, and a top surface of the second sub-portion are located at different level heights.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: October 17, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Lan-Chou Cho, Chewn-Pu Jou, Feng-Wei Kuo, Huan-Neng Chen, Min-Hsiang Hsu
  • Patent number: 11783218
    Abstract: An apparatus for facilitating electromagnetic wave resonator tuning is disclosed, including first, second, and third spaced apart resonator portions, the second portion disposed between the first and third to form an electromagnetic wave resonator having a resonant frequency, wherein the first and second portions define a first volume therebetween and the second and third define a second volume therebetween, a first actuator coupled to the first portion, the second, or both, the first actuator configured to adjust a width of the first volume, and a second actuator coupled to the second portion, the third, or both, the second actuator configured to adjust a width of the second volume, wherein the actuators are configured to decrease the widths of the first and second volumes or increase the widths of the first and second volumes to adjust the resonant frequency of the resonator. Other apparatuses, methods, and systems are also disclosed.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: October 10, 2023
    Assignee: THE UNIVERSITY OF BRITISH COLUMBIA
    Inventors: Lukas Chrostowski, Jeff Young, Jingda Wu, Xiruo Yan, Chang Ge
  • Patent number: 11774688
    Abstract: A photonic component having a photonically integrated chip and a fibre mounting, wherein the fibre mounting has: at least one groove, into which an optical fibre is placed, and at least one mirror surface, which reflects radiation from the fibre in the direction of the photonically integrated chip and/or reflects radiation from the photonically integrated chip in the direction of the fibre. A chip stack comprising at least two chips is arranged between the photonically integrated chip and the fibre mounting, the chip stack has at least two through holes and in each case a guide pin, which positions the chip stack and the fibre mounting relative to one another, passes through the at least two through holes of the chip stack.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: October 3, 2023
    Assignee: SICOYA GMBH
    Inventors: Stefan Meister, Moritz Grehn, Sven Otte, Sebastian Höll
  • Patent number: 11762155
    Abstract: Embodiments herein describe an optical system that includes a photonic integrated circuit (PIC) bonded to a package containing an electrical integrated circuit (EIC). However, this bond can prevent an edge coupler from optically aligning an optical fiber to an edge of the PIC in order to transfer optical signals. To provide room for the edge coupler, the PIC is arranged to overhang the package containing the EIC so that the package does not interfere with the ability of the edge coupler to align with the side or edge of the PIC. In this manner, an optical fiber can be optically aligned (e.g., butt coupled) to the edge of the PIC rather than having to use a grating coupler or some other less efficient optical coupling in order to transfer optical signals between the PIC and the optical fiber.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: September 19, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Matthew J. Traverso, Sandeep Razdan, Aparna R. Prasad
  • Patent number: 11764318
    Abstract: A Semiconductor device includes an insulating layer, an optical waveguide, a first dummy semiconductor film, a second semiconductor film and a third semiconductor film. The optical waveguide is formed on the insulating layer. The first dummy semiconductor film is formed on the insulating layer and is spaced apart from the optical waveguide. The first dummy semiconductor film is formed on the first semiconductor film. The second semiconductor film is integrally formed with the optical waveguide as a single member on the insulating layer. The third semiconductor film is formed on the second semiconductor film. A material of the first dummy semiconductor film is different from a material of the optical waveguide. In plan view, a distance between the optical waveguide and the first dummy semiconductor film in a first direction perpendicular to an extending direction of the optical waveguide is greater than a thickness of the insulating layer.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: September 19, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shotaro Kudo, Shinichi Watanuki, Takashi Ogura
  • Patent number: 11754794
    Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a waveguide on a first side of the substrate. The semiconductor device further includes a photodetector (PD) on a second side of the substrate, opposite the first side of the substrate. The semiconductor device further includes an optical through via (OTV) optically connecting the PD with the waveguide, wherein the OTV extends through the substrate from the first side of the substrate to the second side of the substrate.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: September 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Hao Chen, Chung-Ming Weng, Tsung-Yuan Yu, Hui Yu Lee, Hung-Yi Kuo, Jui-Feng Kuan, Chien-Te Wu
  • Patent number: 11757534
    Abstract: Disclosed is a self-coherent receiver based on single delay interferometer, comprising a first beam splitter, a first circulator, a second circulator, a double path bidirectional multiplexing delay interferometer, a first balanced detector, a second balanced detector and an electrical signal processing module.
    Type: Grant
    Filed: May 17, 2023
    Date of Patent: September 12, 2023
    Assignee: BEIJING ZHONGKE GUOGUANG QUANTUM TECH. CO., LTD.
    Inventors: Yibo Zhao, Dong Wang, Dongsheng Chen
  • Patent number: 11749968
    Abstract: In an example embodiment, a system includes a first grating-coupled laser (GCL) that includes a first laser cavity optically coupled to a first transmit grating coupler configured to redirect horizontally-propagating first light, received from the first laser cavity, vertically downward and out of the first GCL. The system also includes a second GCL that includes a second laser cavity optically coupled to a second transmit grating coupler configured to transmit second light vertically downward and out of the second GCL. The system also includes a photonic integrated circuit (PIC) that includes a first receive grating coupler optically coupled to a first waveguide and configured to receive the first light and couple the first light into the first waveguide. The PIC also includes a second receive grating coupler optically coupled to a second waveguide and configured to receive the second light and couple the second light into the second waveguide.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: September 5, 2023
    Assignee: II-VI DELAWARE, INC.
    Inventors: Shiyun Lin, Daniel Mahgerefteh
  • Patent number: 11747560
    Abstract: Disclosed is a photonic integrated circuit (PIC) structure including: a first waveguide with a first main body and a first end portion, which is tapered; and a second waveguide with a second main body and a second end portion, which has two branch waveguides that are positioned adjacent to opposing sides, respectively, of the first end portion of the first waveguide and that branch out from the second main body, thereby forming a V, U or similar shape. The arrangement of the two branch waveguides of the second end portion of the second waveguide relative to the tapered first end portion of the first waveguide allows for mode matching conditions to be met at multiple locations at the interface between the waveguides, thereby creating multiple signal paths between the waveguides and effectively reducing the light signal power density along any one path to prevent or at least minimize any power-induced damage.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: September 5, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yusheng Bian, Roderick A. Augur
  • Patent number: 11735844
    Abstract: An interconnect system includes various anti-backout latches that are movable between an engaged position and a disengaged position. When in the engaged position, the anti-backout latches can be configured to prevent an interconnect module, such as an optical transceiver, from becoming unmated from a host module. When in the disengaged position, the anti-backout latches permit the interconnect module to become unmated from a host module. Securement members are also disclosed that secure a heat sink to a module housing of the interconnect module.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: August 22, 2023
    Assignee: SAMTEC, INC.
    Inventors: Liam Parkes, Eric Zbinden, Keith Guetig, Jignesh H. Shah, Jean Karlo Williams Barnett, Chadrick Paul Faith, R. Brad Bettman
  • Patent number: 11733434
    Abstract: The present invention relates to an optical component and a transparent sealing member. An optical component has: at least one optical element; and a package that houses therein the optical element. The package has: a mounting board on which the optical element is mounted; a transparent sealing member bonded on the mounting board; a recessed section surrounding the optical element mounted on the mounting board; and a refractive index matching agent applied to the inside of the recessed section. The package has at least one groove in communication with the outside from the recessed section.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: August 22, 2023
    Assignee: NGK INSULATORS, LTD.
    Inventors: Yoshio Kikuchi, Makoto Iwai
  • Patent number: 11714329
    Abstract: An optical coupler includes a first waveguide including a first multi-mode waveguide section having a cross-section characterized by a first height and a first width that is greater than the first height and a second waveguide including a second multi-mode waveguide section having a cross-section characterized by a second height and a second width that is greater than the second height. The first multi-mode waveguide section is positioned adjacent to the second multi-mode waveguide section at least partially above or below the second multi-mode waveguide so that light entering the first multi-mode waveguide section is coupled from the first multi-mode waveguide section to the second multi-mode waveguide section. Methods for coupling light between waveguides with the optical coupler and optical devices that include the optical coupler are also described.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: August 1, 2023
    Assignee: PSIQUANTUM CORP.
    Inventor: Mark Thompson
  • Patent number: 11709325
    Abstract: A method for aligning the projection of a first light source with an in-coupler of a waveguide, the method including supplying a secondary light source through an optical path of the waveguide to exit at the in-coupler of the waveguide as an exit light; determining the concentricity of the exit light with respect to the first light source; and improving the concentricity of the exit light with respect to the first light source by adjusting the positioning of the first light source such that the exit light becomes concentric with the projection of the first light source.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: July 25, 2023
    Assignee: MLOptic Corp.
    Inventors: Jiang He, Wei Zhou, Wei Wang
  • Patent number: 11705529
    Abstract: Structures for a photodetector and methods of fabricating a structure for a photodetector. The structure includes a first waveguide core having a first taper, a semiconductor layer having a sidewall adjacent to the first taper, and a second waveguide core having a second taper that is positioned to overlap with the first taper and a curved section. The second taper is longitudinally positioned between the sidewall of the semiconductor layer and the curved section. The curved section terminates the second waveguide core.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: July 18, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yusheng Bian, Asif Chowdhury
  • Patent number: 11693169
    Abstract: Embodiments are disclosed for providing a silicon photonics collimator for wafer level assembly. An example apparatus includes a silicon photonics (SiP) device and a micro-optical passive element. The SiP device comprises a set of optical waveguides. The micro-optical passive element is mounted on an edge of a cavity etched into a silicon surface of the SiP device. Furthermore, the micro-optical passive element is configured to direct optical signals between the set of optical waveguides and an external optical element.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: July 4, 2023
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Avner Badihi, Henning Lysdal
  • Patent number: 11686906
    Abstract: Alignment aid structures and the method of formation of these structures on an interposer comprised of a planar waveguide layer and a base structure, facilitate the alignment of the optical axes of optical and optoelectrical devices formed from and mounted to the interposer. Alignment aids formed from a common hard mask on the planar waveguide layer of the interposer structure include vertical and lateral alignment structures and fiducials. Optical losses for signals propagating in interposer-based photonic integrated circuits are reduced with effective alignment structures and methods.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: June 27, 2023
    Inventor: Suresh Venkatesan
  • Patent number: 11688995
    Abstract: A grating emitter method and system for modulating the polarization of an optical beam, such as one for transmission through free-space or use in an atomic clock.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: June 27, 2023
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Steven J. Spector, Steven J. Byrnes, Robert Lutwak
  • Patent number: 11680163
    Abstract: Provided is a resin composition for optical waveguide cores, the resin composition including liquid epoxy resin, and solid epoxy resin, in which a coefficient of variation calculated from a weighted average value of a refractive index of the liquid epoxy resin and a refractive index of the solid epoxy resin is 2.10% or less.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: June 20, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Junko Kurizoe, Naoyuki Kondou, Toru Nakashiba, Shingo Maeda
  • Patent number: 11668886
    Abstract: Embodiments herein describe optical assemblies that use a spacer element to attach and align a laser to a waveguide in a photonic chip. Once aligned, the laser can transfer optical signals into the photonic chip which can then perform an optical function such as modulation, filtering, amplification, and the like. In one embodiment, the spacer element is a separate part (e.g., a glass or semiconductor block) that is attached between the photonic chip and a submount on which the laser is mounted. The spacer establishes a separation distance between the photonic chip and the submount which in turn aligns the laser with the waveguide in the photonic chip. In another embodiment, rather than the spacer element being a separate part, the spacer element may be integrated into the submount.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: June 6, 2023
    Assignee: Cisco Technology, Inc.
    Inventor: Jock T. Bovington
  • Patent number: 11668875
    Abstract: Periscope assemblies are provided which have a light path that travels in a first plane along the first waveguide, a second plane along the second waveguide that is parallel to the first plane, and along a third plane along the third waveguide that intersects the first plane and the second plane. In some examples the periscope assembly includes first and second carriers comprising respective first and second waveguides and defining respective first and second cavities in which a third carrier comprising a third waveguide is disposed and optionally includes an optical component. In some examples, the cavities are defined in one or more carriers on a mating surface, on a side opposite to the mating surface, or on a side perpendicular to a mating surface.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: June 6, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Ashley J. M. Erickson, Matthew J. Traverso
  • Patent number: 11662525
    Abstract: An optical system includes a light module, an optical element on a first grating coupler, and a second grating coupler. The light module emits three beams from different positions. The optical element is below the light module and is configured to change incident angles of the three beams and to focus the three beams at the same region of the first grating coupler. The first grating coupler is below the optical element and is configured to couple the three beams into a light-guide substrate. The light-guide substrate is connected to the first grating coupler and is configured to transmit the three beams. The second grating coupler is connected to the light-guide substrate and is configured to enable the three beams departing from the light-guide substrate after the three beams have traveled the same optical path.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: May 30, 2023
    Assignee: VisEra Technologies Company Ltd.
    Inventors: Hsin-Yi Hsieh, Chin-Chuan Hsieh