Integrated Optical Circuit Patents (Class 385/14)
  • Patent number: 11137432
    Abstract: In a general aspect, a receiver is disclosed for sensing radio frequency (RF) electromagnetic radiation. The receiver includes a dielectric body having an array of cavities ordered periodically to define a photonic crystal structure in the dielectric body. The dielectric body also has a region in the array of cavities that defines a defect in the photonic crystal structure. An elongated slot through the region extends from a slot opening in a surface of the dielectric body at least partially through the dielectric body. The receiver also includes a vapor or a source of the vapor in the elongated slot as well as an optical window covering the elongated slot. The optical window has a window surface bonded to the surface of the dielectric body to form a seal about the slot opening.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: October 5, 2021
    Assignee: Quantum Valley Ideas Laboratories
    Inventors: Hadi Amarloo, Jaime Ramirez-Serrano, James P. Shaffer
  • Patent number: 11131545
    Abstract: An integrated photonics optical gyroscope fabricated on a silicon nitride (SiN) waveguide platform comprises a first portion with silicon nitride (SiN) waveguides that constitute a rotation sensing element; and, a second portion with additional silicon nitride (SiN) waveguide-based optical components that constitute a front-end chip to launch light into and receive light from the rotation sensing element. The two portions can be stacked together to have a multi-layer configuration vertically coupled with each other. External elements (e.g., laser, detectors, phase shifter) may be made of different material platform than SiN and can be hybridly integrated to the SiN waveguide platform.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: September 28, 2021
    Assignee: Anello Photonics, Inc.
    Inventor: Mario Paniccia
  • Patent number: 11133643
    Abstract: A laser apparatus includes: a cooling capacity control means which controls the cooling capacity of a heat receiving/cooling unit; a surrounding member which surrounds a dew condensation prevention target unit including a heat generating unit and which reaches a surrounding member equilibrium temperature higher than the maximum dew point temperature within a housing as the temperature of the heat generating unit is increased; and a temperature detection means which detects the temperature of the surrounding member, a control unit compares, while a current output command is being output to a laser power supply unit, a surrounding member temperature with a switching temperature previously set lower than the surrounding member equilibrium temperature and when the surrounding member temperature is lower than the switching temperature, the control unit controls the cooling capacity control means such that the cooling capacity of the heat receiving/cooling unit is a low level whereas when the surrounding member tem
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: September 28, 2021
    Assignee: FANUC CORPORATION
    Inventors: Hiroshi Takigawa, Yuji Nishikawa, Hiroyuki Yoshida, Tadashi Kurosawa, Atsushi Mori, Toshiyasu Shiomi, Michinori Maeda, Akihiko Nishio
  • Patent number: 11133870
    Abstract: Fiber optic connectors are provided that include a substrate having a groove therein, an optical fiber that is at least partly in the groove, an optical mode field converter or other focusing reflector that is positioned to receive an optical signal that is output from the optical fiber and a housing that surrounds the substrate and the optical fiber.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: September 28, 2021
    Assignee: CommScope, Inc. of North Carolina
    Inventor: Abhijit Sengupta
  • Patent number: 11119273
    Abstract: An arrayed waveguide grating. The arrayed waveguide grating (145) includes two star couplers (130, 150) and an array of waveguides (215, 225) connecting the star couplers. The array of waveguides of the arrayed waveguide grating may have a T-shaped geometry making possible an arrayed waveguide grating with an arbitrarily large free spectral range in a compact form factor. Different materials may be used in the optical paths to reduce the temperature dependence of the characteristics of the arrayed waveguide grating.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: September 14, 2021
    Assignee: Rockley Photonics Limited
    Inventor: Andrea Trita
  • Patent number: 11114488
    Abstract: The present invention relates generally to sensing devices. In an embodiment, the present invention provides a SPAD pixel that includes a first region and a second region. An absorption region is configured within the first region. A first reflector array is configured within the second region and below the absorption region. A second reflector array is configured within the second region and below the first reflector array. The SPAD pixel also includes isolation structures configured within the first region.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: September 7, 2021
    Assignee: Shenzhen Adaps Photonics Technology Co. LTD.
    Inventors: Ching-Jui Lu, Ching-Ying Lu, Shuang Li
  • Patent number: 11114308
    Abstract: An interconnection layer carrying structure for transferring an interconnection layer onto a substrate is disclosed. The interconnection layer carrying structure includes a support substrate, a release layer on the support substrate; and an interconnection layer on the release layer. The interconnection layer includes an organic insulating material and a set of pads embedded in the organic insulating material. The set of the pads is configured to face towards the support substrate. The support substrate has a base part where the interconnection layer is formed and an extended part extending outside the base part.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: September 7, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Keishi Okamoto, Akihiro Horibe, Hiroyuki Mori
  • Patent number: 11114383
    Abstract: Semiconductor devices having optical routing layers, and associated systems and methods, are disclosed herein. In one embodiment, a method of manufacturing a semiconductor device includes forming conductive pads on a first side of a substrate and electrically coupled to conductive material of vias extending partially through the substrate. The method further includes removing material from a second side of the substrate so that the conductive material of the vias projects beyond the second side of the substrate to define projecting portions of the conductive material. The method also includes forming an optical routing layer on the second side of the substrate and at least partially around the projecting portions of the conductive material.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: September 7, 2021
    Assignee: Micron Technology, Inc.
    Inventor: John F. Kaeding
  • Patent number: 11105899
    Abstract: A laser array includes a plurality of laser diodes arranged and electrically connected to one another on a surface of a non-native substrate. Respective laser diodes of the plurality of laser diodes have different orientations relative to one another on the surface of the non-native substrate. The respective laser diodes are configured to provide coherent light emission in different directions, and the laser array is configured to emit an incoherent output beam comprising the coherent light emission from the respective laser diodes. The output beam may include incoherent light having a non-uniform intensity distribution over a field of view of the laser array. Related devices and fabrication methods are also discussed.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: August 31, 2021
    Assignee: Sense Photonics, Inc.
    Inventors: Scott Burroughs, Brent Fisher, James Carter, Russell Kanjorski
  • Patent number: 11099325
    Abstract: The present invention provides a polymer optical waveguide containing: a core; and a cladding having a refractive index lower than that of the core, provided around the core, in which the polymer optical waveguide has a core-coupling section where at least a part of the cladding is not present along a light propagation direction of the polymer optical waveguide and an application type removal film A provided so as to come into contact with the core of the core-coupling section.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: August 24, 2021
    Assignee: AGC Inc.
    Inventors: Shotaro Takenobu, Toshihisa Okada, Satoko Noma, Kenta Kobayashi, Keisuke Hanashima, Seiki Ohara
  • Patent number: 11101620
    Abstract: Structures for response shaping in frequency and time domain, include an optical response shaper and/or a modulator device with multiple injection. The device comprises a resonator having an enclosed geometric structure, for example a ring or racetrack structure, at least two injecting optical waveguides approaching the resonator to define at least two coupling regions between the resonator and the injecting waveguides, and may define at least two Free Spectral Range states. One or both of the coupling regions has a coupling coefficient selected for a predetermined frequency or time response, and the coupling coefficient or other device parameters may be variable, in some case in real time to render the response programmably variable.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: August 24, 2021
    Assignee: Ramot at Tel-Aviv University Ltd.
    Inventors: Roei Aviram Cohen, Ofer Amrani, Shlomo Ruschin
  • Patent number: 11099341
    Abstract: An active optical cable may include a multicore optical fiber, a connector housing, a mateable electrical connector, an array of optoelectronic converter devices in the connector housing, and an optical waveguide structure. The optical waveguide structure is configured to couple optical signals between the fiber cores and the optoelectronic converter devices in the connector housing.
    Type: Grant
    Filed: May 3, 2020
    Date of Patent: August 24, 2021
    Assignee: OFS Fitel, LLC
    Inventors: Kelvin B Bradley, Eric J Leichter, Gregory A Sandels
  • Patent number: 11102426
    Abstract: An apparatus includes a first light source to produce a first reference light, a first pair of arrayed waveguide gratings (AWGs) to demultiplex a first optical signal and the first reference light, respectively, into multiple first signal beams and multiple first reference beams. A first heterodyne optical detector can mix the multiple first signal beams and the multiple first reference beams to generate first quadrature optical signals. A first pair of photo-detectors can convert the first quadrature optical signals to first in-phase (I) and quadrature (Q) electrical signals. The apparatus is implemented as a photonic integrated circuit (PIC) incorporating the first pair of AWGs, the first heterodyne optical detector and the first pair of photo-detectors.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: August 24, 2021
    Assignee: Lockheed Martin Corporation
    Inventors: Richard Lee Kendrick, Alan Lee Duncan
  • Patent number: 11092825
    Abstract: An optoelectronic device and a method of manufacturing the same. The device comprising: a multi-layered optically active stack; an input waveguide, arranged to guide light into the stack; an output waveguide, arranged to guide light out of the stack; and anti-reflective coatings, located between both the input waveguide and the stack and the stack and the output waveguide; wherein the input waveguide and output waveguide are formed of silicon nitride.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: August 17, 2021
    Assignee: Rockley Photonics Limited
    Inventors: Guomin Yu, Aaron Zilkie
  • Patent number: 11094849
    Abstract: A light emitting diode display includes a driving substrate, a plurality of micro light-emitting devices, a first common electrode, and a second common electrode. The micro light-emitting devices are arranged on the driving substrate. Each of the micro light-emitting devices includes an epitaxial structure, a first type electrode, and a second type electrode. The first common electrode is disposed on the driving substrate and located between the second type electrodes of the micro light-emitting devices, wherein the first common electrode exposes at least a portion of an upper surface of each of the second type electrodes. The second common electrode is located between the second type electrodes of the micro light-emitting devices and electrically connected to the first common electrode, wherein the second common electrode does not directly contact the micro light-emitting devices.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: August 17, 2021
    Assignee: PlayNitride Inc.
    Inventors: Chih-Ling Wu, Yi-Min Su
  • Patent number: 11086059
    Abstract: An image light guide for conveying a virtual image has a waveguide that conveys image-bearing light, formed as a flat plate having an in-coupling diffractive optic with a first grating vector diffracting an image-bearing light beam into the waveguide and directing diffracted light. An out-coupling diffractive optic is formed as a plurality of overlapping diffraction gratings including a first grating pattern having first grating vector k1 and a second grating pattern having a second grating vector k2 for expanding and ejecting the expanded image bearing beams from the waveguide into an expanded eyebox within which the virtual image can be seen.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: August 10, 2021
    Assignee: Vuzix Corporation
    Inventors: Robert J. Schultz, Paul J. Travers
  • Patent number: 11079547
    Abstract: An optical device. In some embodiments, the optical device includes a first interface; a second interface; a first plurality of waveguides, at the first interface; a second plurality of waveguides, at the second interface; and a free propagation region. A first waveguide of the first plurality of waveguides has a width at least 20% greater than a second waveguide of the first plurality of waveguides.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: August 3, 2021
    Assignee: Rockley Photonics Limited
    Inventors: Andrea Trita, Thomas Pierre Schrans
  • Patent number: 11079542
    Abstract: Systems and methods for an integrated photon source and detector of entangled photons are provided. In certain embodiments, a system includes a first waveguide layer comprising a photon producing waveguide configured to provide two photons propagating in orthogonal modes of a single waveguide. The system also includes a second waveguide layer comprising a photon conditioning waveguide network, the second waveguide layer formed on the first waveguide layer, the second waveguide layer having a different index of refraction.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: August 3, 2021
    Assignee: Honeywell International Inc.
    Inventors: Chad Fertig, Matthew Wade Puckett, Steven Tin
  • Patent number: 11067761
    Abstract: An optical receptacle has: a first optical surface, a first transmission part, a light separation part, a second optical surface and a third optical surface. The light separation part has a reflection part and a second transmission part. The first transmission part and two or more of a plurality of second transmission parts are present within an optical effectiveness region, where the optical effectiveness region is a region from a central axis to the radius of the larger of the first optical surface and the second optical surface, and the central axis is the optical axis of the light that impinges on the first optical surface and is emitted at the second optical surface.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: July 20, 2021
    Assignee: Enplas Corporation
    Inventors: Ayano Kon, Shimpei Morioka
  • Patent number: 11071199
    Abstract: An optical printed circuit board and its fabrication method. The optical printed circuit board includes an electrical conductor arranged for conducting electric signal, an optical waveguide arranged for transmitting optical signal, and an optical waveguide coupling interface arranged at an end of the optical waveguide. The optical waveguide coupling interface is arranged for engagement with an external optical device to optically couple the external optical device with the optical waveguide. The optical waveguide coupling interface includes a first engagement mechanism with a socket defining a space for receiving with a corresponding plug on the external optical device or a plug arranged to be received in a corresponding socket on the external optical device.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: July 20, 2021
    Assignee: City University of Hong Kong
    Inventors: Kin Seng Chiang, Kar Pong Lor, Wei Jin, Hau Ping Chan
  • Patent number: 11058285
    Abstract: An optical signal transmission module is provided, in which a lens surface for condensing light emitted from an LD configured to convert an electrical signal to an optical signal and emit light of the optical signal is integrally formed on an end portion of an optical fiber, a mounting substrate for the LD to be mounted is configured with a specially-shaped substrate, and a fixing portion (a fixing hole portion) for the optical fiber to be fixed is integrally formed on the mounting substrate, at a position where the light emitted from the LD (the light of the optical signal) can be incident on the lens surface.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: July 13, 2021
    Assignee: OLYMPUS CORPORATION
    Inventors: Hideaki Kinouchi, Yasuhiro Miyazaki, Tsutomu Urakawa
  • Patent number: 11056341
    Abstract: A method of manufacturing an optical semiconductor element includes: stacking a plurality of compound semiconductor layers on a first substrate containing a compound semiconductor; dividing the first substrate into small pieces; forming terraces, grooves, walls, and a first mesa for a waveguide on a second substrate containing silicon; jointing at least one small piece to the second substrate after the forming; wet-etching the first substrate so as to expose the compound semiconductor layers after the jointing; and forming a second mesa opposite to the first mesa from the compound semiconductor layers; wherein the grooves are formed on both sides of the first mesa, the terraces are formed on both sides of the first mesa and the grooves, and the walls are arranged in an extending direction of each groove.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: July 6, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takehiko Kikuchi, Morihiro Seki, Nobuhiko Nishiyama
  • Patent number: 11049037
    Abstract: In some aspects, the present disclosure relates to a quantum logic device which, in one embodiment, includes: at least two two-level emitters (TLEs); and a waveguide in a photonic crystal, the waveguide being coupled to the TLEs and configured for two propagating modes, the two propagating modes consisting of a left-traveling mode and a right-traveling mode, and wherein the TLEs and waveguide are configured such that a traveling photon interacting with a TLE of the TLEs is scattered into either the left-traveling mode or right-traveling mode.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: June 29, 2021
    Assignee: Board of Trustees of the University of Arkansas
    Inventors: Julio Gea-Banacloche, William Konyk
  • Patent number: 11041999
    Abstract: An optical interconnect circuit for transmitting data between two or more electronic chips. In an example embodiment, the optical interconnect circuit comprises two or more photonic chips, each of which is vertically stacked with the corresponding electronic chip such that compact optical modulators and/or photodetectors of the photonic chip are in close proximity to the data sources/sinks of the corresponding electronic chip. Multi-core optical fibers and vertical coupling structures are used to provide multiple optical connections between different photonic chips. Advantageously, the provided capability to place optical modulators close to the data sources and to place photodetectors close to the data sinks can be used to reduce the amount of required electrical wiring. Optical-waveguide connections to the multi-core fibers can be used to allow for high density of optical conduits without spatially constraining the placement of data sources and/or data sinks on the electronic chips.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: June 22, 2021
    Assignee: Nokia Solutions and Networks OY
    Inventors: Peter Winzer, David Neilson, Po Dong
  • Patent number: 11037892
    Abstract: Waveguides disposed in either an interposer layer or directly in the semiconductor package substrate may be used to transfer signals between semiconductor dies coupled to the semiconductor package. For example, inter-semiconductor die communications using mm-wave carrier signals launched into waveguides specifically tuned to optimize transmission parameters of such signals. The use of such high frequencies beneficially provides for reliable transmission of modulated high data rate signals with lower losses than conductive traces and less cross-talk. The use of mm-wave waveguides provides higher data transfer rates per bump for bump-limited dies as well as beneficially providing improved signal integrity even at such higher data transfer rates. Such mm-wave waveguides may be built directly into semiconductor package layers or may be incorporated into one or more interposed layers that are physically and communicably coupled between the semiconductor dies and the semiconductor package substrate.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: June 15, 2021
    Assignee: Intel Corporation
    Inventors: Vijay K. Nair, Sasha N. Oster, Johanna M. Swan, Telesphor Kamgaing, Georgios C. Dogiamis, Adel A. Elsherbini
  • Patent number: 11036002
    Abstract: Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: June 15, 2021
    Assignee: Lightmatter, Inc.
    Inventors: Nicholas C. Harris, Carl Ramey, Michael Gould, Thomas Graham, Darius Bunandar, Ryan Braid, Mykhailo Tymchenko
  • Patent number: 11031750
    Abstract: A light source device includes: a plurality of laser sources; a plurality of collimating parts, each configured to collimate the light beam emitted from a corresponding one of the laser sources; a combining grating configured to diffract, at an identical diffraction angle, light beams that have passed through the collimating parts and are incident on the combining grating at different incident angles, to combine the diffracted light beams; and a plurality of plane transmission gratings, wherein each of the plane transmission gratings is disposed in an optical path between a corresponding one of the collimating parts and the combining grating, and wherein each of the plane transmission gratings is adjustable so as to allow selection of a wavelength of the light beam incident on the combining grating.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: June 8, 2021
    Assignee: NICHIA CORPORATION
    Inventors: Norihiro Dejima, Masaki Omori
  • Patent number: 11029475
    Abstract: The present disclosure provides a frame lid assembly, which may be used in assembling an optical platform to provide isolated thermal conduction paths for various elements thereof. The frame lid assembly includes a first frame lid, including: a foot, disposed in a first plane; a roof, disposed in a second plane parallel to the first plane, the roof defining a port as a first through-hole that is perpendicular to the second plane; a wall, disposed obliquely to the first plane, separating the roof from the foot, the wall defining a slot as a second through-hole that is parallel to the first plane; a second frame lid connected to the first frame lid and thermally isolated from the first frame lid, the second frame lid including: a cap, connected to the roof via a thermal insulator; and a plug, extending perpendicularly from the cap through the port.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: June 8, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Aparna R. Prasad, Sandeep Razdan
  • Patent number: 11024617
    Abstract: Memory devices having optical I/O interfaces are described herein. In one embodiment, a memory device includes a plurality of memories coupled to a substrate, each memory including one or more photon integrated (PIC) chips for converting electrical signals to/from optical signals. The memory device can further include a plurality of optical fibers, wherein individual ones of the memories are optically coupled to at least one of the optical fibers. The memories can receive/transmit the optical signals over the optical fibers and can be electrically coupled to a power supply/ground via the substrate.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: June 1, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Omar J. Bchir
  • Patent number: 11022755
    Abstract: An edge coupler having an optical bench with a mirror array. Each mirror bends, reflects and/or reshapes incident light. The edge coupler is optically coupled to the optical elements in a PIC chip which direct light to the edge of the PIC chip. The edge coupler provides a demountable, passively aligned coupling between an optical fiber array and the PIC chip. The edge coupler may be a free space edge coupler without any optical element between the mirror array and the optical elements of the PIC chip, or may include grooves each receiving a section of optical fiber with its longitudinal axis along the first light path and terminating substantially at or extending beyond the edge of the edge coupler. The optical fiber array may include an optical fiber connector terminating and supporting the ends of the optical fibers in optical alignment with the mirror array of the edge coupler.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: June 1, 2021
    Assignee: CUDOQUANTA FLORIDA, INC.
    Inventors: Yang Chen, Robert Ryan Vallance
  • Patent number: 11022724
    Abstract: Systems, methods, and devices disclosed herein relate to optical assemblies for spatial multiplexing, multi-zone illumination, and optical assemblies. In embodiments, light source arrays are aligned with one or more micro-lens assemblies to generate a specific field of illumination. In embodiments, surface-emitting light sources may be light-emitting diodes and/or surface-emitting lasers. The micro-lens array may be aligned with the light source arrays, on-axis or off-axis to a principal axis of corresponding lenses such that the light sources may be expanded to a desired divergence and field of illumination. In embodiments, multiple light sources may be combined to increase power output for a specific area of the field of illumination, and light sources may be driven independently depending on intended illumination.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: June 1, 2021
    Assignee: Lumentum Operations LLC
    Inventors: Richard F. Carson, Preethi Dacha, Mial E. Warren
  • Patent number: 11016244
    Abstract: An optical waveguide member connector kit includes an optical waveguide member including an optical waveguide and a connector having an accommodation space that is capable of accommodating the optical waveguide member. When the optical waveguide member is accommodated in the accommodation space, the connector has an opening portion reaching the optical waveguide member from the outside of the connector and when the optical waveguide member is accommodated in the accommodation space, at least one of the optical waveguide member and the connector includes a groove communicating with the opening portion facing at least the other side of the optical waveguide member and the connector.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: May 25, 2021
    Assignee: NITTO DENKO CORPORATION
    Inventors: Naoto Konegawa, Yuichi Tsujita
  • Patent number: 11018473
    Abstract: Embodiments provide for selective-area growth of III-V materials for integration with silicon photonics. The resulting platform includes a substrate; an insulator, extending a first distance from the substrate, including a passive optical component at a second distance from the substrate less than the first distance, and defining a pit extending to the substrate; and a III-V component, extending from the substrate within in the pit defined in the insulator, the III-V component including a gain medium included at the second distance from the substrate and optically coupled with the passive optical component. The pit may define an Optical Coupling Interface between the III-V component and the passive optical component, or a slit defined between the III-V component and the passive optical component may define the Optical Coupling Interface.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 25, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Dominic F. Siriani, Jock T. Bovington, Vipulkumar K. Patel
  • Patent number: 11011886
    Abstract: A package structure of a directly modulated laser in a photonics module includes a thermoelectric cooler including multiple conductor traces formed in a cool surface. The package structure further includes a directly modulated laser (DML) chip having a first electrode being attached with the cool surface and a second electrode at a distance away from the cool surface. Additionally, the package structure includes an interposer having a plurality of through-holes formed between a first surface to a second surface. The first surface is mounted to the cool surface such that each through-hole is aligned with one of the multiple conductor traces and the second surface being leveled with the second electrode. Moreover, the package structure includes a driver disposed on the second surface of the interposer with at least a galvanically coupled output port coupled directly to the second electrode of the DML chip.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: May 18, 2021
    Assignee: INPHI CORPORATION
    Inventors: Frank Gelhausen, Ahmed Sanaa Ahmed Awny, Edward Pillai, Ulrich Schacht, Oliver Piepenstock
  • Patent number: 11012248
    Abstract: A power over Ethernet (PoE)-based redundant power management method manages a redundant power supply electrically connectable to plural network devices through plural twisted pairs respectively, so as to transmit first electricity and digital information to each network device. The redundant power supply receives a power demand message from, and is informed of the electric power needed by, each network device electrically connected to the redundant power supply. In response to determining the second electricity each such network device has been receiving is interrupted, the redundant power supply outputs to each such network device the corresponding first electricity equal to the electric power needed by the network device through a corresponding Ethernet port. In response to receiving a power-off request message from any such network device, the redundant power supply stops outputting to that network device the corresponding first electricity.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: May 18, 2021
    Assignee: D-Link Corporation
    Inventors: Shou-Shan Chen, Yi-Jen Chiang, Jen-Hua Yeh
  • Patent number: 11005570
    Abstract: Provided are a coherent optical receiver and a fabrication method thereof, the coherent optical receiver including a substrate, signal and local input waveguides extending in a first direction parallel to a top surface of the substrate and configured to receive an optical signal, a first optical circuit element including a first optical waveguide connected to the signal input waveguide and a trench provided in one side of the first optical waveguide in parallel to the first direction, a second optical circuit element including a second optical waveguide connected to the first optical waveguide, a slit crossing the second optical waveguide, and a wavelength plate inserted to the slit, and third optical circuit elements connected to the second optical circuit element, wherein the first to third optical circuit elements are monolithically integrated in the substrate.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: May 11, 2021
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seo Young Lee, Young-Tak Han, Jong-Hoi Kim
  • Patent number: 11002925
    Abstract: A waveguide coupler includes a first waveguide and a second waveguide. The waveguide coupler also includes a connecting waveguide disposed between the first waveguide and the second waveguide. The connecting waveguide includes a first material having a first index of refraction and a second material having a second index of refraction higher than the first index of refraction.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: May 11, 2021
    Assignee: Skorpios Technologies, Inc.
    Inventors: Amit Mizrahi, Timothy Creazzo, Elton Marchena, Derek Van Orden, Stephen B. Krasulick
  • Patent number: 11002924
    Abstract: An exemplary embodiment of the invention relates to an optical connector comprising a wave-guiding element and a lens device configured to transmit radiation between the wave-guiding element and at least one optical port of the connector, wherein the lens device comprises a first outer surface and a second outer surface opposite the first outer surface, wherein the first outer surface is connected to the wave-guiding element and forms at least one lens, and wherein a section of the second outer surface opposite said at least one lens forms said at least one optical port of the connector.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: May 11, 2021
    Assignee: SICOYA GMBH
    Inventors: Moritz Grehn, Marco Vitali, Sebastian Höll, Andreas Hakansson
  • Patent number: 11005075
    Abstract: An apparatus for light diffraction and an organic light emitting diode (OLED) incorporating the light diffraction apparatus is disclosed. An apparatus for light diffraction may comprise an optional planarization layer, a transparent substrate, a waveguide layer. The planarization layer may have a refractive index of ns. The transparent substrate may have a refractive index of ng. The waveguide layer may have a refractive index nw distributed over of the transparent substrate. The waveguide layer may comprise a binding matrix, at least one nanoparticle. The waveguide layer may be interposed between the transparent substrate and the optional planarization layer.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: May 11, 2021
    Assignee: CORNING INCORPORATED
    Inventors: David Eugene Baker, Li Liu, Pamela Arlene Maurey, Robert Adam Modavis, Daniel Aloysius Nolan, Wageesha Senaratne
  • Patent number: 11002909
    Abstract: An optical integrated device includes a substrate a passive waveguide region and an active region. The active region and the passive waveguide region include a first mesa structure having an upper cladding portion formed of a same material as the upper cladding layer. The passive waveguide region includes a second spot size converter having the first mesa structure, a second mesa structure having a first core portion, a lower cladding portion, and a second core portion that are formed of same materials as the first core layer, the lower cladding layer, and the second core layer, respectively. The second mesa structure has a width wider than a width of the first mesa structure, and the width of the first mesa structure continuously changes along a longitudinal direction in which light is guided through the second core portion, the width being along a direction perpendicular to the longitudinal direction.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: May 11, 2021
    Assignee: FURUKAWA ELECTRIC CO,. LTD.
    Inventors: Yusuke Saito, Tatsuro Kurobe, Tatsuya Kimoto, Shinichi Kamiya
  • Patent number: 10996398
    Abstract: Structures for a polarization splitter and methods of fabricating a structure for a polarization splitter. First and second waveguide cores of the polarization splitter are located adjacent to each other in a coupling region. A third waveguide core is located over the second waveguide core in the coupling region. The third waveguide core is composed of a material having a variable refractive index.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: May 4, 2021
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Yusheng Bian, Ajey Poovannummoottil Jacob
  • Patent number: 10996412
    Abstract: A carrier substrate includes a first network of electrical connections and recess. An electronic chip is mounted to the carrier substrate within the recess. The electronic chip includes an integrated guide of optical waves and a second network of electrical connections. A end section of an elongate optical cable is mounted on one side of the electronic chip with a longitudinal guide of optical waves optically coupled to the integrated guide of optical waves. Electrical connection elements are interposed between a face of the electronic chip and a bottom wall of the recess, such that first connect pads of the first electrical connection network are connected to second connect pads of the second electrical connection network through the electrical connection elements.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: May 4, 2021
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Florian Perminjat, Romain Coffy, Jean-Michel Riviere
  • Patent number: 10989885
    Abstract: A semiconductor module includes a photonic integrated circuit and a receptacle. The photonic integrated circuit includes a substrate, a waveguide disposed on the substrate, and a recess in the substrate and having a first width. The receptacle is bonded to a top surface of the substrate and aligning with the recess. The receptacle and the recess jointly form a cavity, and the receptacle has a second width greater than the first width. A method for manufacturing the semiconductor module is also disclosed.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: April 27, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Mei-Ju Lu, Chi-Han Chen, Zong-Yu Yang, Pei-Jung Yang
  • Patent number: 10989937
    Abstract: An integrated differential Electro-Absorption Modulator (EAM) device. The device includes a substrate, an electrical driver, and two EAM modules. The electrical driver circuit is configured overlying the substrate member and has one output electrically coupled to the first EAM module and the other output electrically coupled to the second EAM module. The first and second EAM modules have a first and a second output, respectively. A beam splitter can be configured to split an optical input into two optical outputs, each of which can be optically coupled to the optical inputs of the first and second EAM modules.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: April 27, 2021
    Assignee: INPHI CORPORATION
    Inventor: Radhakrishnan L. Nagarajan
  • Patent number: 10983278
    Abstract: An apparatus comprises a substrate having a plateau region and a trench region, a metal layer over the plateau region, a semiconductor component over the trench region, wherein a gap is between the plateau region and the semiconductor component, an adhesion promoter layer over the plateau region, the semiconductor component and the gap, a dielectric layer over the adhesion promoter layer and a bonding interface formed between the adhesion promoter layer and the dielectric layer, wherein the bonding interface comprises a chemical structure comprising a first dielectric material of the adhesion promoter layer and a second dielectric material of the dielectric layer.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: April 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hao Tseng, Ying-Hao Kuo, Kai-Fang Cheng, Hai-Ching Chen, Tien-I Bao
  • Patent number: 10985084
    Abstract: Integrated circuits, wafer level integrated III-V device and CMOS driver device packages, and methods for fabricating products with integrated III-V devices and silicon-based driver devices are provided. In an embodiment, an integrated circuit includes a semiconductor substrate, a plurality of transistors overlying the semiconductor substrate, and an interlayer dielectric layer overlying the plurality of transistors with a metallization layer disposed within the interlayer dielectric layer. The plurality of transistors and the metallization layer form a gate driver circuit. The integrated circuit further includes a plurality of vias disposed through the interlayer dielectric layer, a gate driver electrode coupled to the gate driver circuit, a III-V device electrode overlying and coupled to the gate driver electrode, and a III-V device overlying and coupled to the III-V device electrode.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: April 20, 2021
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventor: Donald Ray Disney
  • Patent number: 10983369
    Abstract: A silicon modulator where the doping profile varies along the lateral and/or longitudinal position in the transition zones to achieve improved performance in terms of either optical attenuation or contact access resistance or both. A silicon-based modulator includes a waveguide core that is a PN junction region; a first transition zone that is a P-side region adjacent to the waveguide core and a first electrode; and a second transition zone that is an N-side region adjacent to the waveguide core on an opposite side as the first transition region and a second electrode; wherein a thickness of each of the first transition zone and the second transition zone is variable in any of a lateral direction, a longitudinal direction, and both the lateral direction and the longitudinal direction, each of the lateral direction and the longitudinal direction are relative to the waveguide core.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: April 20, 2021
    Assignee: Ciena Corporation
    Inventors: Alexandre Delisle-Simard, Yves Painchaud
  • Patent number: 10976491
    Abstract: In one embodiment an optoelectronic system can include a photonics interposer having a substrate and a functional interposer structure formed on the substrate, a plurality of through vias carrying electrical signals extending through the substrate and the functional interposer structure, and a plurality of wires carrying signals to different areas of the functional interposer structure. The system can further include one or more photonics device integrally formed in the functional interposer structure, and one or more prefabricated component attached to the functional interposer structure.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: April 13, 2021
    Assignees: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK, THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK, ANALOG PHOTONICS, LLC, ARIZONA BOARD OF REGENTS ON BEHALF OF THE UNIVERSITY OF ARIZONA
    Inventors: Douglas Coolbaugh, Michael Watts, Michal Lipson, Keren Bergman, Thomas Koch, Jeremiah Hebding, Daniel Pascual, Douglas La Tulipe
  • Patent number: 10969543
    Abstract: A semiconductor integrated optical device includes a waveguide mesa having a first multilayer including a first core layer, a second multilayer including a second core layer, and a butt joint interface between the first core layer and the second core layer; a support having first to third regions; and a buried semiconductor region provided on the support. The first multilayer has a first mesa width on the first region. The second multilayer has a second mesa width on the second region. On the third region, the second multilayer has a waveguide portion having a third mesa width smaller than the first and the second mesa widths. The second core layer has a waveguide core thickness on the second region. In the waveguide portion, the second core layer has a core portion having a thickness different from the waveguide core thickness at a position away from the butt-joint interface.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: April 6, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takuo Hiratani
  • Patent number: 10956623
    Abstract: The present invention relates to a method to fabricate a tamper respondent assembly. The tamper respondent assembly includes an electronic component and an enclosure fully enclosing the electronic component. The method includes printing, by a 3-dimensional printer, a printed circuit board that forms a bottom part of the enclosure and includes a first set of embedded detection lines for detecting tampering events and signal lines for transferring signals between the electronic component and an external device. The electronic component is assembled on the printed circuit board, and a cover part of the enclosure is printed on the printed circuit board. The cover part includes a second set of embedded detection lines. Sensing circuitry can be provided for sensing the conductance of the first set of embedded detection lines and the second set of embedded detection lines to detect tampering events.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: March 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Silvio Dragone, Michael Fisher, William Santiago Fernandez, Ryan Elsasser, James Busby, John R. Dangler, William L. Brodsky, David C. Long, Stefano S. Oggioni