Silicon Or Semiconductor Material Containing Coating Patents (Class 427/588)
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Patent number: 6737123Abstract: A silicon-based film is formed superimposing a direct-current potential on the high-frequency power to set the potential of the high-frequency power feed section to a potential which is lower by V1 than the ground potential; the V1 satisfying |V2|≦|V1|≦50×|V2|, where V2 is the potential difference from the ground potential, produced in the electrode in the state the plasma has taken place under the same conditions except that the direct-current potential is not superposed on the high-frequency power and the electrode is brought into a non-grounded state. This can provide a silicon-based film having superior characteristics at a high film formation rate, and a semiconductor device making use of this silicon-based film, having superior adherence, environmental resistance, and can enjoy a short tact time at the time of manufacture.Type: GrantFiled: June 12, 2002Date of Patent: May 18, 2004Assignee: Canon Kabushiki KaishaInventors: Takaharu Kondo, Masafumi Sano, Akira Sakai, Tadashi Sawayama, Ryo Hayashi, Shuichiro Sugiyama, Hiroyuki Ozaki, Yoshinori Sugiura
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Patent number: 6706336Abstract: A silicon-based film of excellent photoelectric characteristics can be obtained by introducing a source gas containing silicon halide and hydrogen into the interior of a vacuum vessel, at least a part of the interior being covered with a silicon-containing solid, generating plasma in the space of the interior of the vacuum vessel, and forming a silicon-based film on a substrate provided in the interior of the vacuum vessel.Type: GrantFiled: January 28, 2002Date of Patent: March 16, 2004Assignee: Canon Kabushiki KaishaInventors: Takaharu Kondo, Masafumi Sano, Koichi Matsuda, Makoto Higashikawa
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Patent number: 6660874Abstract: Disclosed are methods of preparing trialkyl Group VA metal compounds in high yield and high purity. Such trialkyl Group VA metal compounds are substantially free of oxygenated impurities, ethereal solvents and metallic impurities.Type: GrantFiled: April 6, 2002Date of Patent: December 9, 2003Assignee: Shipley Company, L.L.C.Inventors: Deodatta V. Shenai-Khatkhate, Michael B. Power, Artashes Amamchyan
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Publication number: 20030203126Abstract: The present invention relates to an organometal complex and a chemical vapor deposition (CVD) or atomic layer deposition (ALD) method for preparing a metal silicate thin layer using same. The inventive method can easily prepare the metal silicate thin layer having a desired composition which can be effectively used as a gate insulating layer for various semiconductor devices.Type: ApplicationFiled: April 25, 2003Publication date: October 30, 2003Inventors: Shi-Woo Rhee, Sang-Woo Kang, Won-Hee Nam
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Patent number: 6638839Abstract: A thin film deposition method uses a vacuum confinement cup that employs a dense hot filament and multiple gas inlets. At least one reactant gas is introduced into the confinement cup both near and spaced apart from the heated filament. An electrode inside the confinement cup is used to generate plasma for film deposition. The method is used to deposit advanced thin films (such as silicon based thin films) at a high quality and at a high deposition rate.Type: GrantFiled: July 25, 2002Date of Patent: October 28, 2003Assignee: The University of ToledoInventors: Xunming Deng, Henry S. Povolny
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Patent number: 6596343Abstract: A method for processing semiconductor substrates by reacting hydroxyl radicals with a precursor to cause the precursor to decompose and form a film which deposits on a substrate. Hydroxyl radicals, which are produced in a hydroxyl-ion producing apparatus outside of a chemical vapor deposition reactor, are mixed with a precursor to form a hydroxyl ions-precursor mixture. The hydroxyl ions-precursor mixture is introduced into the chemical vapor deposition reactor.Type: GrantFiled: April 21, 2000Date of Patent: July 22, 2003Assignee: Applied Materials, Inc.Inventors: Himanshu Pokharna, Shankar Chandran, Srinivas D. Nemani, Chen-an Chen, Francimar Campana, Ellie Yieh, Li-Qun Xia
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Patent number: 6589868Abstract: Embodiments of the present invention include a method of depositing an improved seasoning film. In one embodiment the method includes, prior to performing a substrate processing operation, forming a layer of silicon over an interior surface of the substrate processing chamber as opposed to a layer of silicon oxide. In certain embodiments, the layer of silicon comprises at least 70% atomic silicon, is deposited from a high density silane (SinH2n+2) process gas and/or is deposited from a plasma having a density of at least 1×1011 ions/cm3.Type: GrantFiled: February 8, 2001Date of Patent: July 8, 2003Assignee: Applied Materials, Inc.Inventor: Kent Rossman
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Publication number: 20030106581Abstract: A silicon structure having little solar light beam reflection, which is suitable for a solar battery. On the entire surface of a quartz substrate, Mo is deposited at a thickness of approximately 1 &mgr;m to form a lower electrode. On the entire surface of the lower electrode, a p type silicon structure having a thickness of 30 to 40 &mgr;m comprising an aggregate of a plurality of columnar silicon members mainly comprising silicon and having random orientations is formed via a film mainly comprising silicon, using Si2Cl6 mixed with BCl3. On the surface of the p type silicon structure, P is diffused by a thermal diffusion method using POCl3 to form an n type region at the periphery of the columnar silicon members. On the entire surface of the p type silicon structure, a transparent electrode comprising indium-tin oxide having a thickness of 30 to 40 &mgr;m is formed, and an upper electrode comprising Al having a thickness of approximately 1 &mgr;m is formed on the transparent electrode.Type: ApplicationFiled: December 17, 2002Publication date: June 12, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Munehiro Shibuya, Masatoshi Kitagawa, Yuuji Mukai, Akihisa Yoshida
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Patent number: 6558741Abstract: Within a chamber in a vacuum atmosphere, SiO is deposited on a glass substrate so as to form a first layer as a protective film, Al is deposited on the first layer so as to form a second layer as an aluminum reflective film, MgF2 is deposited on the second layer so as to form a third layer as a transparent protective film, and CeO2 is deposited on the third layer so as to form a fourth layer as a transparent protective film. Then, while O2 gas is introduced into the chamber, SiO2 is deposited on the fourth layer so as to form a fifth layer as a transparent protective film.Type: GrantFiled: May 17, 2001Date of Patent: May 6, 2003Assignee: Fuji Photo Optical Co., Ltd.Inventors: Kunio Kurobe, Susumu Aihara
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Patent number: 6531654Abstract: In a semiconductor thin-film formation process comprising feeding a semiconductor thin-film material gas into a discharge space, and applying a high-frequency power thereto to cause plasma to take place and decompose the material gas to form an amorphous semiconductor thin film on a desired substrate, the high-frequency power is applied changing its power density continuously or stepwise from a high power density to a low power density and thereafter again changing the power density continuously or stepwise from a low power density to a high power density, to form a semiconductor thin film made different in film quality in the direction of layer thickness while retaining the same conductivity type. This process enable formation of high-quality semiconductor thin films by plasma CVD.Type: GrantFiled: May 22, 2001Date of Patent: March 11, 2003Assignee: Canon Kabushiki KaishaInventors: Shuichiro Sugiyama, Masahiro Kanai, Takahiro Yajima
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Patent number: 6521826Abstract: An n-type polysilicon thin film, an intrinsic polysilicon thin film and a p-type polysilicon thin film are formed on a transparent conductive film of a glass substrate by the plasma enhanced CVD method at a plasma excitation frequency of 81.36 MHz so as to obtain a photoelectric conversion layer. The n-type polysilicon thin film and the intrinsic polysilicon thin film are then formed so that the crystallization ratio of the n-doped layer located on the incident light side becomes equal to or greater than the crystallization ratio of the intrinsic layer. Thus, a thin film solar cell having an appropriate structure of a junction interface between the n-layer and the intrinsic layer is obtained.Type: GrantFiled: November 29, 2000Date of Patent: February 18, 2003Assignee: Sharp Kabushiki KaishaInventor: Kenji Wada
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Patent number: 6517913Abstract: An apparatus for converting PFC gases exhausted from semiconductor processing equipment to less harmful, non-PFC gases. One embodiment of the apparatus includes a silicon filter and a plasma generation system. The plasma generation system forms a plasma from the effluent PFC gases. Constituents from the plasma react with silicon and/or oxygen in the filter and convert the effluent PFC gases to less harmful, non-PFC gaseous products and byproducts. Another embodiment includes a plasma generation system and a particle trapping and collection system. The particle trapping and collection system traps silicon containing residue from deposition processes that produces such residue, and the plasma generation system forms a plasma from the effluent PFC gases. Constituents from the plasma react with the collected residue to convert the effluent PFC gases to less harmful, non-PFC gaseous products and byproducts.Type: GrantFiled: August 3, 2000Date of Patent: February 11, 2003Assignee: Applied Materials, Inc.Inventors: David Cheung, Sebastien Raoux, Judy H. Huang, William N. Taylor, Jr., Mark Fodor, Kevin Fairbairn
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Publication number: 20020192396Abstract: A method of forming a film structure (e.g., film stack) comprising titanium (Ti) and titanium nitride (TiN) films is disclosed. In one aspect of the invention, a titanium silicide (TiSix) layer is formed on a Ti film, followed by deposition of a TiN film on the TiSix layer. The TiSix layer protects the underlying Ti film from chemical attack by TiCl4-based chemistry during subsequent TiN layer deposition. In another aspect of the invention, a cap layer of TiN is deposited between the Ti and TiN layers of a Ti/TiN film structure. The TiN cap layer inhibits chlorine migration from the overlying TiN layer into an underlying contact region, such as, for example, the source or drain of a transistor.Type: ApplicationFiled: May 11, 2000Publication date: December 19, 2002Inventors: Shulin Wang, Mei Chang, Ramanujapuram A. Srinivas, Avgerinos Gelatos
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Patent number: 6488995Abstract: Disclosed herein is a method of forming a microcrystalline silicon film by using a raw gas containing at least a silicon compound by a high-frequency plasma CVD method, wherein the formation of the film is conducted in such a manner that the residence time, &tgr; (ms) of the raw gas in a film deposition chamber, which is defined as &tgr; (ms)=78.9×V×P/M, in which V is a volume (cm3) of the deposition chamber, P is a deposition pressure (Torr), and M is a total flow rate (sccm) of the raw gas, satisfies &tgr;<40. The method permits the formation of a good-quality microcrystalline silicon film at low cost.Type: GrantFiled: February 16, 1999Date of Patent: December 3, 2002Assignee: Canon Kabushiki KaishaInventors: Tomonori Nishimoto, Masafumi Sano
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Patent number: 6485618Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process includes a first step of highly ionized sputter deposition of copper, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and electroplating copper into the hole to complete the metallization.Type: GrantFiled: July 30, 2001Date of Patent: November 26, 2002Assignee: Applied Materials, Inc.Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Sankaram Athreya, Wei D. Wang, Ashok K. Sinha
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Publication number: 20020166581Abstract: A silicon-based film of excellent photoelectric characteristics can be obtained by introducing a source gas containing silicon halide and hydrogen into the interior of a vacuum vessel, at least a part of the interior being covered with a silicon-containing solid, generating plasma in the space of the interior of the vacuum vessel, and forming a silicon-based film on a substrate provided in the interior of the vacuum vessel.Type: ApplicationFiled: January 28, 2002Publication date: November 14, 2002Inventors: Takaharu Kondo, Masafumi Sano, Koichi Matsuda, Makoto Higashikawa
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Publication number: 20020150682Abstract: A method of formation of a damascene FSG film with good adhesion to silicon nitride in an HDP-CVD system. Silane (SiH4), silicon tetrafluoride (SiF4), oxygen (O2) and argon (Ar) are used as the reactant gases. SiH4, SiF4, and O2 react to form the FSG. Ar is introduced to promote gas dissociation. All four gases are used for depositing most of the FSG film. SiH4 is not used during deposition of the interfacial part of the FSG film. The interfacial part of the FSG film refers either to the topmost portion, if silicon nitride is to be deposited on top of the FSG or the bottom portion if the FSG is to be deposited on top of silicon nitride. Using SiH4 with the SiF4 tends to mitigate the destructive effects of SiF4 throughout most of the deposition. By removing the SiH4 from the deposition of the interfacial part of the FSG film less hydrogen is incorporated into the film in the interfacial region and adhesion to overlying or underlying silicon nitride is improved.Type: ApplicationFiled: April 10, 2002Publication date: October 17, 2002Applicant: Applied Materials, Inc.Inventors: Hichem M'Saad, Dana Tribula, Manoj Vellaikal, Farhad Moghadam, Sameer Desai
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Patent number: 6465044Abstract: This invention relates to a method of depositing silicon oxide films on the surface of semiconductor substrates, and more particularly to depositing such films by chemical vapor deposition using alkylsiloxane oligomers precursors with ozone.Type: GrantFiled: April 4, 2000Date of Patent: October 15, 2002Assignee: Silicon Valley Group, Thermal Systems LLPInventors: Sanjeev Jain, Zheng Yuan
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Patent number: 6451391Abstract: In a laser ablation method comprising the steps of irradiating a laser beam to target material 107, and depositing ejected species from the target material on a faced substrate 109 to form a thin film, an ambient gas is introduced into reaction chamber 101 under a constant certain pressure when the laser ablation is performed, using a target material with almost or the same composition as that of a thin film to be obtained. It is thereby possible to obtain a thin film with the same composition as that of the target material readily, without requiring an introduction of O2 gas and a substrate heating. As a result, it is not necessary to limit materials for a substrate, and it is possible to adjust the adaptability of an anaerobic process.Type: GrantFiled: September 9, 1999Date of Patent: September 17, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yuka Yamada, Takehito Yoshida, Nobuyasu Suzuki, Toshiharu Makino
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Patent number: 6420644Abstract: A solar battery having a board with a surface with a plurality of spherical segments projecting from the board surface. A primary electrode layer is provided on the board surface and the plurality of spherical segments. A semiconductor layer is provided on the primary electrode layer and has P-N connecting members. A secondary electrode layer on the semiconductor layer is made up of a translucent material.Type: GrantFiled: November 27, 2000Date of Patent: July 16, 2002Assignee: Mitsui High-tec, Inc.Inventors: Atsushi Fukui, Keisuke Kimoto
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Patent number: 6379510Abstract: A method of making a micro-mirror light beam switch having a thin flexible movable support member for supporting a thin central reflective mirror surface thereon and for supporting a plurality of thin unimorph piezoelectric cantilevered mirror actuators mechanically coupled between a fixed substrate and movable hinging portions of the thin movable support member. The method employs thin film deposition techniques and photolithography for readily forming the extremely thin switch, whereby the components thereof are substantially co-planar for precisely controlled, multi-axial micro-mirror motion and low voltage operation necessary for the rapid switching of optical traffic from fiber to fiber in the next-generation optical networks.Type: GrantFiled: November 16, 2000Date of Patent: April 30, 2002Inventors: Jonathan S. Kane, Gareth A. Hughes
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Patent number: 6362021Abstract: A polycrystalline film of silicon including silicon grains having an aspect ratio, d/t, of more than 1:1, wherein “d” is the grain diameter and “t” is the grain thickness. The polycrystalline film of silicon can be used to form an electronic device, such as a monolithically integrated solar cell having ohmic contacts formed on opposed surfaces or on the same surface of the film. A plurality of solar cells can be monolithically integrated to provide a solar cell module that includes an electrically insulating substrate and at least two solar cells disposed on the substrate in physical isolation from one another. Methods for manufacturing the film, solar cell and solar cell module are also disclosed. The simplified structure and method allow for substantial cost reduction on a mass-production scale, at least in part due to the high aspect ratio silicon grains in the film.Type: GrantFiled: February 2, 2001Date of Patent: March 26, 2002Assignee: AstroPower, Inc.Inventors: David H. Ford, Allen M. Barnett, Robert B. Hall, James A. Rand
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Publication number: 20020033191Abstract: In a process for forming a silicon-type thin film by high-frequency plasma chemical vapor deposition, silicon fluoride and hydrogen are contained in a material gas and oxygen atoms are incorporated in the material gas in a concentration of from 0.1 ppm to 0.5 ppm based on that of silicon atoms. By this process, photovoltaic devices having a good photoelectric conversion efficiency and superior adherence and environmental resistance can be formed at a cost made greatly lower than ever.Type: ApplicationFiled: May 30, 2001Publication date: March 21, 2002Inventors: Takaharu Kondo, Koichi Matsuda
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Patent number: 6335288Abstract: A method and apparatus are disclosed for depositing a dielectric film in a gap having an aspect ratio at least as large as 6:1. By cycling the gas chemistry of a high-density-plasma chemical-vapor-deposition system between deposition and etching conditions, the gap may be substantially 100% filled. Such filling is achieved by adjusting the flow rates of the precursor gases such that the deposition to sputtering ratio during the deposition phases is within certain predetermined limits.Type: GrantFiled: August 24, 2000Date of Patent: January 1, 2002Assignee: Applied Materials, Inc.Inventors: Michael Kwan, Eric Liu
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Patent number: 6274008Abstract: A target and magnetron for a plasma sputter reactor. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process includes a first step of highly ionized sputter deposition of copper, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and electroplating copper into the hole to complete the metallization.Type: GrantFiled: October 2, 2000Date of Patent: August 14, 2001Assignee: Applied Materials, Inc.Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Sankaram Athreya, Wei D. Wang, Ashok K. Sinha
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Patent number: 6214706Abstract: A hot wire chemical vapor deposition method and apparatus for fabricating high quality amorphous, micro-crystalline, and poly-crystalline thin film silicon, or related materials, devices and large area modules is described. A silane gas impinges upon a hot graphite rod assembly whereas the gas is broken up into its individual constituents, these constituents then depositing on an inert substrate member. The distance between the hot graphite rod assembly and the substrate member is adjustable. A shutter is provided to shield the substrate member as the hot graphite rod assembly is heating up. The hot graphite rod assembly contains a plurality of mutually parallel and coplanar rods that are parallel to the plane of the substrate member, and the hot graphite rod assembly and/or the substrate is oscillated in a direction generally normal to the direction in which the rods extend.Type: GrantFiled: August 3, 1999Date of Patent: April 10, 2001Assignee: MV Systems, Inc.Inventors: Arun Madan, Scott Morrison, Jianping Xi
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Patent number: 6207574Abstract: A dynamic random access memory (DRAM) cell storage node and a fabricating method thereof are provided. A storage contact plug 118 is formed in a first insulating layer 104 on a semiconductor substrate. A second insulating layer 110, a material layer 112, and a third insulating layer 114 are sequentially formed on the first insulating layer. The material layer prevents etchant of the third insulating layer from attacking the second insulating layer. The third insulating layer, the material layer, and the second insulating layer are sequentially etched to form an opening exposing the storage contact plug and a portion of the surface of the first insulating layer. The opening is filled with a conductive layer to form a storage node 116. The third insulating layer is etched until the top surface of the material layer is exposed, and the material layer is etched until the top surface of the second insulating layer is exposed.Type: GrantFiled: July 13, 1999Date of Patent: March 27, 2001Assignee: Samsung Electronics Co., Ltd.Inventor: Kang-Yoon Lee
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Patent number: 6187691Abstract: A thin film is formed on a substrate in a film-forming apparatus which has upper and lower electrodes between which radio-frequency power is applied in a processing chamber, and a heater is used to heat the lower electrode on which the substrate is loaded. In one lot, at least one substrate is processed. The electrode is heated at the end of a stand-by period between lots and before starting the film-forming process.Type: GrantFiled: May 15, 2000Date of Patent: February 13, 2001Assignee: ASM Japan K.K.Inventors: Hideaki Fukuda, Hiroki Arai, Yu Yoshizaki
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Patent number: 6184403Abstract: Chemical vapor deposition processes utilize as precursors volatile metal complexes with ligands containing metalloid elements silicon, germanium, tin or lead.Type: GrantFiled: May 19, 1999Date of Patent: February 6, 2001Assignee: Research Foundation of State University of New YorkInventors: John T. Welch, Paul J. Toscano, Rolf Claessen, Andrei Kornilov, Kulbinder Kumar Banger
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Patent number: 6117283Abstract: A silicon coating on an air bearing surface for magnetic thin film heads. A thick silicon layer is provided to replace metallic layers such as TiW as an overcoat for thin film heads. The silicon layer will provide a durable head-disk interface and act as a reflective surface for fly height measurement. The silicon layer can be planarized with the pole tips to avoid any magnetic spacing loss. The thickness of the silicon coating is preferably between 125 and 6500 Angstroms thick. The slider body may be fabricated from silicon such that the silicon coating is substantially identical to the silicon slider body, thereby preventing thermal mismatch therebetween. The silicon coating is preferably applied using a magnetron sputtering technique which provides a high rate of deposition of silicon to form a dense, low stress silicon layer.Type: GrantFiled: December 5, 1996Date of Patent: September 12, 2000Assignee: International Business Machines CorporationInventors: Pei C. Chen, Grace Lim Gorman, Cherngye Hwang, Vedantham Raman, Randall George Simmons
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Patent number: 6100466Abstract: Provided is a method of forming a microcrystalline silicon film by a plasma CVD, which comprises introducing a high frequency electromagnetic wave into a film forming space through an electrode to induce a plasma thereby forming a deposited film on a substrate, wherein the relation of 400<Q<10000 is satisfied when Q is defined as Q=P.multidot.f.sup.2 /d where d (cm) is the distance between the substrate and the electrode, P (Torr) is the pressure of the film forming space during formation of the deposited film, and f (MHz) is the frequency of the high frequency electromagnetic wave-forming method of microcrystalline silicon film for forming a microcrystalline silicon film by plasma CVD, wherein Q defined as Q=P.multidot.f.sup.Type: GrantFiled: November 23, 1998Date of Patent: August 8, 2000Assignee: Canon Kabushiki KaishaInventor: Tomonori Nishimoto
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Patent number: 6071351Abstract: An apparatus and method for the growth and etching of materials where a substrate on which a film is being deposited or which is being etched is maintained at a lower temperature than a precursor cracking temperature. The apparatus includes a susceptor with separators, made of an optically transmissive material with low thermal conductivity, such as quartz, upon which the substrates are mounted. The susceptor is heated to a precursor cracking temperature while the substrates are maintained at a lower deposition temperature by the separators. The substrates are heated by black body radiation transmitted through the separators to the substrates.Type: GrantFiled: May 7, 1999Date of Patent: June 6, 2000Assignee: Research Triangle InstituteInventor: Rama Venkatasubramanian
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Patent number: 6043105Abstract: A method of manufacturing a semiconductor device having a non-single crystalline semiconductor layer including an intrinsic or substantially instrinsic silicon which contains hydrogen or halogen and is formed on a substrate in a reaction chamber which may have a substrate holder. Sodium is removed from the inside of the reaction chamber and/or the surface of the substrate holder to remove sodium therefrom so that the concentration of sodium in the semiconductor layer is preferably 5.times.10.sup.18 atoms/cm.sup.3 or less.Type: GrantFiled: September 12, 1997Date of Patent: March 28, 2000Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 6033533Abstract: The present invention relates to a method of forming an intermediate film and a hard cabon film over the inner surface of a cylindrical member having a bore, such as a bushing or a cylinder, with the hard carbon film being formed on the intermediate film with a uniform thickness, greatly enhancing of abrasion resistance of the inner surface. The cylindrical member is placed in a vacuum vessel, an auxiliary electrode of an intermediate film forming material, such as a titanium-silicon alloy or the like, is inserted in the bore of the cylindrical member, a sputtering gas is supplied into the vacuum vessel, a voltage is applied to the auxiliary electrode to produce a plasma around the auxiliary electrode in order that the intermediate film forming material is sputtered from the auxiliary electrode and an intermediate film is formed over the inner surface of the cylindrical member.Type: GrantFiled: March 16, 1999Date of Patent: March 7, 2000Assignee: Citizen Watch Co., Ltd.Inventors: Osamu Sugiyama, Yukio Miya, Ryota Koike, Takashi Toida, Toshiichi Sekine
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Patent number: 6030666Abstract: A method of microwave heating of a substrate in a plasma processing chamber wherein a heatup gas is supplied into the processing chamber, the heatup process gas is energized with microwave power to heat an exposed surface of the substrate, a reactant gas is supplied into the processing chamber and the reactant gas is energized into a plasma gas state to process the substrate.Type: GrantFiled: March 31, 1997Date of Patent: February 29, 2000Assignee: Lam Research CorporationInventors: James Lam, David Hodul
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Patent number: 6001414Abstract: A dual damascene processing method comprising the steps depositing sequentially a first oxide layer, a SRO layer and a second oxide layer over a substrate. Then, photolithographic and etching operations are conducted to form a via that links up with a desired wire-connecting region above the substrate. Next, another photolithographic and etching operations are conducted to form interconnect trench lines followed by the deposition of metal into the via and trench. Finally, the surface is polished with a chemical-mechanical polishing operation to remove the unwanted metal on the surface. The invention is capable of controlling the depth of trench and obtaining a smoother trench bottom for the metal lines. Furthermore, the separation of via and trench etching steps makes the control of the final etch profile much easier, thereby able to get an optimal result.Type: GrantFiled: December 16, 1997Date of Patent: December 14, 1999Assignee: United Microelectronics Corp.Inventors: Yimin Huang, Hsiao-Pang Chou, Tri-Rung Yew
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Patent number: 5985103Abstract: A method is disclosed for improved side wall and bottom coverage of high aspect ratio space situated upon a substrate in two (2) steps. A lining is formed on a side wall surface of the space that terminated at a bottom surface. An opening then remains to a void defined by the lining and the bottom surface. The void is filled with a material passing through the opening to the space. When sputtered, the lining can be formed by a less-collimated sputtered particle flux, and the void can be filled by a collimated sputtered particle flux. The lining can be formed by flux in a plasma formed from a first gas having a neutral to ion ratio, and the void can be filled by a flux in a plasma formed from a second gas having a neutral to ion ratio lower than that of the first. Also, the lining can be formed by a flux in a plasma formed from a first gas having an atomic mass, and the void can be filled by a flux in a plasma formed from a second gas having an atomic mass lower than that of the first.Type: GrantFiled: August 14, 1997Date of Patent: November 16, 1999Assignee: Micron Technology, Inc.Inventors: John H. Givens, Richard L. Elliott
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Patent number: 5952061Abstract: The present invention is an apparatus and method for the fabrication of high quality silicon films by deposition of a silicon vapor onto a substrate. The silicon film fabrication apparatus includes a chamber, a crucible having an anode for melting a silicon metal, an anode for generating a DC arc discharge plasma, a substrate holder facing the crucible, and a heater for heating a substrate arranged in the substrate holder. The apparatus also includes a variable DC power supply, a cathode element including an electrode plate for generating the DC arc discharge plasma, a gas intake pipe penetrating through the electrode plate into the chamber, and an exhaust pipe having a valve facing the gas intake pipe. The silicon film is fabricated by disposing a substrate in a chamber, introducing hydrogen gas into the chamber, generating the DC arc discharge plasma, evaporating the silicon metal in the chamber, and depositing the silicon vapor on the substrate after the vapor passes through the DC arc discharge plasma.Type: GrantFiled: December 22, 1997Date of Patent: September 14, 1999Assignee: Stanley Electric Co., Ltd.Inventors: Makoto Yoshida, Takahiro Saida, Satoshi Okada, Masahiro Akamatsu, Kenichi Kondo
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Patent number: 5929267Abstract: A Pt compound which is in the form of a liquid at room temperature for producing Pt films usable as electrode films in semiconductor devices by the CVD method; a process for producing the compound; and a process for producing films with the use of the same.A novel compound trimethyl(ethylcyclopentadienyl)platinum (C.sub.2 H.sub.5 C.sub.5 H.sub.4)Pt(CH.sub.3).sub.3 is in the form of a liquid at room temperature and shows a sufficient vapor pressure at around 35.degree. C. Thus, it can be quantitatively supplied by gas bubbling or with the use of a liquid mass flow controller as a feedstock in the CVD method and thermally decomposed on a substrate at 150.degree. C. in a hydrogen atmosphere to give pure Pt films. This compound can be produced at a high yield by reacting iodotrimethylplatinum with sodium ethylcyclopentadienide in a solvent.Type: GrantFiled: February 17, 1999Date of Patent: July 27, 1999Assignee: Kabushikikaisha Kojundokagaku KenkyushoInventor: Hidekimi Kadokura
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Patent number: 5840631Abstract: A method of manufacturing a semiconductor device includes the following steps. A lower wiring layer is formed on a semiconductor substrate through an insulating film. A compound gas having a catalysis for promoting formation of silicon oxide is added in an atmosphere using a main component gas consisting of ozone, water vapor, and one of alkoxysilane and organosiloxane as a source gas to form a silicon oxide film by a chemical vapor deposition (CVD) method directly on a surface of the semiconductor substrate on which the lower wiring layer is formed. An upper wiring layer is formed on the silicon oxide film.Type: GrantFiled: November 27, 1995Date of Patent: November 24, 1998Assignee: NEC CorporationInventors: Akira Kubo, Tetsuya Homma, Koji Kishimoto
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Patent number: 5830579Abstract: A shiny or decorative aluminum or aluminum alloy based strip coated with an mproved corrosion-resistant protective coating for preserving the surface appearance of the strip and providing port-forming protection thereof, wherein said coating consists of a layer of silicon oxide.Type: GrantFiled: July 3, 1996Date of Patent: November 3, 1998Assignee: Societe Anonyme de Traitment des Metaux et Alliages Company (SATMA)Inventors: Mohamed Benmalek, Francis Allegret
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Patent number: 5817576Abstract: A method of processing a substrate, such as a semiconductor wafer, in a vacuum processing chamber includes the steps of depositing a material on a surface of the substrate using a gas mixture, and purging the chamber of residual gases by flowing SiH.sub.4 into the chamber. Preferably, WSi.sub.x is deposited on a semiconductor wafer using a mixture comprising WF.sub.6, dichlorosilane and a noble gas, and the chamber is subsequently purged of residual WF.sub.6 and dichlorosilane by flowing SiH.sub.4 into the chamber. A further method of processing a substrate in a vacuum processing chamber includes the step of conditioning the chamber by flowing SiH.sub.4 into the chamber prior to depositing a material on the surface of the substrate. Semiconductor wafers processed according to the inventive method are characterized by more uniform sheet resistance values and reduced film stress.Type: GrantFiled: November 5, 1996Date of Patent: October 6, 1998Assignee: Applied Materials, Inc.Inventors: Meng Chu Tseng, Mei Chang, Ramanujapuram A. Srinivas, Klaus-Dieter Rinnen, Moshe Eizenberg, Susan Telford
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Patent number: 5786039Abstract: The invention relates to a process for electrical insulation of conductive or semiconductor materials of a substrate, characterized in that it comprises at least the following steps:(a) at least one so-called conformal layer of insulating oxide is deposited on the predetermined regions of the substrate to be insulated;(b) a layer of planarizing oxide precursor is deposited on the predetermined regions by chemical reaction in plasma phase of a tetraalkylsilicate and of hydrogen peroxide;(c) at least one layer of insulating oxide is deposited on the predetermined regions; and(d) a conversion annealing operation is carried out.It also relates to the semiconductor devices and integrated-circuit elements having insulated narrow cavities.Type: GrantFiled: May 14, 1996Date of Patent: July 28, 1998Assignee: France TelecomInventor: Pierre Brouquet
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Patent number: 5747119Abstract: A vapor deposition method for forming at least one thin film on a substrate, wherein the time required to control the temperature of a substrate is minimized and the need for additional heating and cooling chambers to change the substrate temperature is obviated. A carry-in/carry-out chamber, heating chamber, and first and second film forming heating chambers are arranged about and connected to a transfer chamber by respective gate valves. The apparatus provides for a continuous film-forming process to be carried out under different operating conditions by controlling at least one of the following parameters: evacuation times for the first and second film forming chambers, the time for transporting the substrate from the first to the second film forming chamber by a carrier mechanism, the pressure in the transfer chamber, the evacuation waiting time before the film forming step, and the material gases introducing and pressure adjusting time before the film forming step.Type: GrantFiled: January 26, 1996Date of Patent: May 5, 1998Assignee: Kabushiki Kaisha ToshibaInventor: Noriyuki Hirata
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Patent number: 5744370Abstract: A fabricating method of a Si thin film which has no grain boundaries, photo-absorption characteristics similar to those of monocrystalline Si, and a low electrical resistivity, is provided. When electron beams 14 are applied to a deposition material source 12 to deposit the Si thin film on a substrate 10, assist ions are applied from an assist ion source 18 in the direction normal to the surface of the substrate 10.Type: GrantFiled: July 31, 1996Date of Patent: April 28, 1998Assignee: Toyota Jidosha Kabushiki KaishaInventor: Naoki Nakamura
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Patent number: 5733611Abstract: A porous preform is densified by heating while emersed in a precursor liquid. Heating is achieved by passing a current through the preform or by an induction coil immersed in the liquid. Ways to control the densification process are also described.Type: GrantFiled: March 29, 1995Date of Patent: March 31, 1998Assignee: Textron Systems CorporationInventors: Garrett S. Thurston, Raymond J. Suplinskas, Thomas J. Carroll, Donald F. Connors, Jr., David T. Scaringella, Richard C. Krutenat
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Patent number: 5702770Abstract: An apparatus and method for facilitating plasma processing and in particular chemical plasma enhanced vapor deposition, plasma polymerization or plasma treatment of barrier materials onto the interior surface of containers barrier materials are useful for providing an effective barrier against gas and/or water permeability in containers and for extending shelf-life of containers, especially plastic evacuated blood collection devices.Type: GrantFiled: January 30, 1996Date of Patent: December 30, 1997Assignee: Becton, Dickinson and CompanyInventor: David Alan Martin
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Patent number: 5641545Abstract: A method for chemical vapor deposition onto high aspect ratio features. Process gases including a reactant species are supplied to the surface and sufficient primary energy is supplied to the surface so as to cause the reactant species to deposit on the surface. Additional energy is supplied, preferably in the form of optical energy, that is tuned to be captured by the patterned features so as to slow the deposition rate preferentially on the patterned features.Type: GrantFiled: June 7, 1995Date of Patent: June 24, 1997Assignee: Micron Technology, Inc.Inventor: Gurtej S. Sandhu
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Patent number: 5604152Abstract: A novel process for depositing amorphous silicon has been described. The process features the homogeneous reaction of, decomposition of SiH2 and deposition of amorphous silicon, in a horizontal LPCVD reaction chamber. The SiH2 is produced by initially breaking down SiH4 in a heated autoclave apparatus, and then transferring the SiH2 to the LPCVD system through heated feed lines. This homogeneous process results in excellent thickness and resistivity uniformity for wafers placed along the horizontal axis of the LPCVD chamber.Type: GrantFiled: November 23, 1994Date of Patent: February 18, 1997Assignee: United Microelectronics CorporationInventors: Chao-Yang Chen, Fu-Yang Yu
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Patent number: 5534079Abstract: A CVD process for producing a rare earth-doped, epitaxial semiconductor layer on a substrate is disclosed. The process utilizes a silane or germane and a rare earth compound in the gas phase. By this method single phase, rare earth-doped semiconductor layers, supersaturated in the rare earth, are produced. The preferred rare earth is erbium and the preferred precursors for depositing erbium by CVD are erbium hexafluoroacetylacetonate, acetylacetonate, tetramethylheptanedionate and flurooctanedionate. The process may be used to produce optoelectronic devices comprising a silicon substrate and an erbium-doped epitaxial silicon film.Type: GrantFiled: March 9, 1994Date of Patent: July 9, 1996Assignee: International Business Machines CorporationInventor: David B. Beach