Superconductor Patents (Class 427/62)
  • Publication number: 20020032125
    Abstract: There is described a method of applying insulative coating on high temperature superconductors and low temperature superconductors from sol-gel solutions prepared from Zr, Mg, Y, Ce, In and Sn base precursor materials. The solution is prepared with isopropanol as a solvent and acetyl acetone as a catalyst. The conductors are dipped into the solution and thereafter dried at a temperature effective to evaporate the solvent. Thereafter, heat treatment in the presence of oxygen is applied at a temperature sufficient to oxidize the precursors to result in a ceramic insulative coating on the conductor.
    Type: Application
    Filed: October 9, 2001
    Publication date: March 14, 2002
    Inventors: Erdal Celik, Yusuf Hascicek, Ibrahim Mutlu
  • Patent number: 6352741
    Abstract: High temperature superconductive (HTS) integrated circuits can be fabricated in three ways according to the invention. First, a planar multiple layer HTS integrated circuit is fabricated using multiple HTS layers. The layers include altered regions which have been bombarded using ion implantation to destroy superconductivity of the altered regions without interrupting the lattice structure of the altered regions. Second, a planar multiple-layer HTS integrated circuit includes upper and lower HTS layers, each including central and opposing regions. A first implant energy is used to destroy superconducting properties of the opposing regions of the lower HTS layer without interrupting the lattice structure. A second implant energy is used to destroy superconducting properties of a top portion of the central region to define a contact. Third, a HTS integrated circuit is formed from a single HTS layer using three ion implantation steps and ions having first, second and third energies and range.
    Type: Grant
    Filed: April 17, 1995
    Date of Patent: March 5, 2002
    Assignee: TRW Inc.
    Inventors: Hugo W. K. Chan, Arnold H. Silver
  • Patent number: 6340657
    Abstract: A simple and low-cost method for producing a thin film of ribbon-like oxide high-temperature (high-Tc) superconductor, which comprises placing a solid starting material for the oxide high-temperature superconductor on a substrate and heating it at a temperature in the vicinity of the melting point of the solid starting material under ambient pressure in an oxygen atmosphere.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: January 22, 2002
    Assignee: Japan as represented by Director General of National Research Institute for Metals
    Inventors: Shunichi Arisawa, Kazumasa Togano, Takeshi Hatano, Hanping Miao
  • Patent number: 6331675
    Abstract: An aspected multifilamentary oxide article is provided having a plurality of aspected filaments including a metal oxide and extending continuously for the length of the article. A constraining member substantially surrounds each filament, wherein each of the filaments has an average transverse cross-sectional thickness less than about 35 &mgr;m and an average variation in cross-section along its length of less than about 10%. The article exhibits superior filament uniformity, hardness, and oxide density and texture.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: December 18, 2001
    Assignee: American Superconductor Corporation
    Inventors: Qi Li, Eric R. Podtburg, Patrick John Walsh, William L. Carter, Gilbert N. Riley, Jr., Martin W. Rupich, Elliott Thompson, Alexander Otto
  • Publication number: 20010041215
    Abstract: A process which relies on a joining technique between two individual strongly linked superconductors is disclosed. Specifically, this invention relates to fabrication of single domains of YBa2Cu3Ox or YBa2Cu3Ox with the addition of Y2BaCuO5 and/or other secondary phases such as Pt/PtO2, CeO2, SnO2, Ag, Y2O3 and other rare earth oxides, by using a top-seeded, melt processing technique. Beginning with a single crystal seed such as Nd1+xBa2−xCu3Ox or SmBa2Cu3Ox crystals, a melt-textured YBCO domain with crystallographic orientation nearly similar to that of the seed crystal can be fabricated. The samples are next machined to desired geometrical shapes. A bonding material is then applied to the ac plane. Low solidification or recrystalization point, similar crystal structure to that of YBa2Cu3Ox, and capability of growing epitaxially on YBCO domains are critical parameters of the bonding material.
    Type: Application
    Filed: January 3, 2001
    Publication date: November 15, 2001
    Inventor: Suvankar Sengupta
  • Patent number: 6303391
    Abstract: A low temperature CVD process using a tris (&bgr;-diketonate) bismuth precursor for deposition of bismuth ceramic thin films suitable for integration to fabricate ferroelectric memory devices. Films of amorphous SBT can be formed by CVD and then ferroannealed to produce films with Aurivillius phase composition having superior ferroelectric properties suitable for manufacturing high density FRAMs.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: October 16, 2001
    Assignees: Advanced Technology Materials, Inc., Siemens Aktiengesellschaft
    Inventors: Frank S. Hintermaier, Christine Dehm, Wolfgang Hoenlein, Peter C. Van Buskirk, Jeffrey F. Roeder, Bryan C. Hendrix, Thomas H. Baum, Debra A. Desrochers
  • Patent number: 6297199
    Abstract: There are disclosed an oxide superconductor which is made of an oxide superconductive bulk body (e.g. a rare earth element base copper-oxide superconductive bulk body) which has a resin impregnated layer (e.g. epoxy base resin impregnated layer), and, optionally, a proper amount of silver or a silver oxide; and a process for producing the above oxide superconductor which comprises impregnating a resin into an oxide superconductive bulk body by bringing the resin in liquid form into contact with the bulk body which is preserved in an atmosphere of reduced pressure. The above superconductor is capable of assuring a high trapped magnetic field and maintaining its performance for a long period of time without being affected by internal or external forces such as electromagnetic forces or thermal strains or by corrosive environments.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: October 2, 2001
    Assignees: International Superconductvity Technology Center, Railway Technical Research Institute
    Inventors: Masaru Tomita, Masato Murakami
  • Patent number: 6291402
    Abstract: Some mechanical, electrical, and thermal properties of high Tc superconductors such as (Ba, Y) cuprates can be substantially improved by the dispersal of an appropriate metal in the superconductive body. For instance, mixing Ag particles with superconductive powder of nominal composition Ba2YCu3O7 and processing the mixture in the conventional manner can produce superconductive bodies having Tc of about 93 K and substantially greater fracture strength and normal state electrical and thermal conductivity than otherwise identical bodies that do not contain Ag particles.
    Type: Grant
    Filed: October 23, 1989
    Date of Patent: September 18, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Sungho Jin, Richard Curry Sherwood, Thomas Henry Tiefel, Robert Bruce van Dover
  • Patent number: 6265353
    Abstract: In a method for producing laminate, a buffer layer is applied to a substrate, with the buffer layer material being evaporated from the buffer layer material dispensing devices at an angle &agr;1≠0 at the normal to the substrate surface onto the latter, before an oriented thin layer is evaporated. According to the invention, provision is made such that (a) following evaporation of the buffer layer and prior to the evaporation of the oriented thin layer, at least one cover layer is evaporated under deposition conditions that vary from those under which the buffer layer was applied, especially at a different pressure, different temperature, different rate, and/or different angle &agr;2≠&agr;1, especially &agr;2<&agr;1, preferably &agr;2≈0° to the substrate surface normal, and/or is evaporated on the buffer layer in such fashion that the buffer layer has a biaxial texture and/or facets.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: July 24, 2001
    Assignee: Theva Duennschichttechnik GmbH
    Inventors: Helmut Kinder, Markus Bauer, Joachim Schwachulla
  • Patent number: 6265019
    Abstract: A method of forming Supercondtuctors with high critical temperature is described in which heterostructures at the atomic limit are realized artificially by molecular beam epitaxy, sputtering, lithography, chemical synthesis, electrochemical deposition or other similar technologies, made by a plurality of first portions of a superconducting metallic material forming a lattice of substantially equal elements with constant period &lgr;p, at least in a first direction (y), and a plurality of second portions formed by a material with different electronic structure from that of the first portions, intercalated to the first portions to realize the separation between said first portions; the heterostructure is characterized by the fact that the plurality of first portions have a size (L) and a period (&lgr;p) as to satisfy the condition for the shape resonance condition for the electrons at the Fermi level and the plurality of second portions have a size (W) smaller or of the order of the superconducting Pippard cohe
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: July 24, 2001
    Inventor: Antonio Bianconi
  • Patent number: 6263219
    Abstract: A SQUID made of an oxide superconducting thin film is formed on a sapphire substrate. CeO2 film, RBa2Cu3O7−x film (“R” indicates a rare earth element chosen among a group formed of Yb, Er, Ho, Y, Dy, Gd, Eu, Sm and Nd) and SrTiO3 film are deposited on the substrate top of the sapphire substrate successively. Furthermore, an oxide superconducting thin film to form a SQUID is deposited on the SrTiO3 film.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: July 17, 2001
    Assignee: Sumitomo Electric Industries, Inc.
    Inventor: Tatsuoki Nagaishi
  • Patent number: 6258754
    Abstract: A process which relies on a joining technique between two individual strongly linked superconductors is disclosed. Specifically, this invention relates to fabrication of single domains of YBa2Cu3Ox or YBa2Cu3Ox with the addition of Y2BaCuO5 and/or other secondary phases such as Pt/PtO2, CeO2, SnO2, Ag, Y2O3 and other rare earth oxides, by using a top-seeded, melt processing technique. Beginning with a single crystal seed such as Nd1+xBa2−xCu3O3 or SmBa2Cu3Ox crystals, a melt-textured YBCO domain with crystallographic orientation nearly similar to that of the seed crystal can be fabricated. The samples are next machined to desired geometrical shapes. A bonding material is then applied to the ac plane. Low solidification or recrystalization point, similar crystal structure to that of YBa2Cu3Ox, and capability of growing epitaxially on YBCO domains are critical parameters of the bonding material.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: July 10, 2001
    Assignee: Superconductive Components, Inc.
    Inventor: Suvankar Sengupta
  • Publication number: 20010005528
    Abstract: A process for preparing an organic electroluminescent device having a transparent substrate, a transparent electrode layer, a metallic electrode layer, and an organic interlayer containing an electronically active material dispersed in a matrix of polyimide, characterized in that the organic interlayer is prepared by depositing the vapors of a dianhydride, an electronically, substantially inactive diamine and the electronically active material to form a polyimide precursor layer containing the active material dispersed therein; and thermally imidizing the polyimide precursor layer. The inventive process provides an easy control of luminous efficiency and organic luminescent device thus obtained has improved luminous efficiency, thermal stability, interfacial surface roughness and high bulk density of the layer.
    Type: Application
    Filed: January 24, 2001
    Publication date: June 28, 2001
    Inventors: Jae-Gyoung Lee, Youngkyoo Kim, Dong-Kwon Chol
  • Patent number: 6251834
    Abstract: The invention provides an improved substrate for growing layers of oxide superconductor materials for use in high current engineering applications. The invention also provides superconducting laminates based on the inventive substrates, and processes for the manufacture thereof. The substrate includes an alloy layer that is formed of either a cube-textured FeNi alloy containing about 47% Ni to 58% Ni, or (b) a cube-texture Ni—Cu alloy in the composition range 41% Ni to 44% Ni. The substrate may further include an oxide buffer layer covering a surface of the alloy layer.
    Type: Grant
    Filed: April 23, 1999
    Date of Patent: June 26, 2001
    Assignee: Carpenter Technology (UK) Limited
    Inventors: Bartlomiej Andrzej Glowacki, Jan Edgar Evetts, Rodney Major
  • Publication number: 20010003118
    Abstract: The present invention relates to a SQUID made of an oxide superconducting thin film is formed on a sapphire substrate. CeO2 film, RBa2Cu3O7−x film (“R” indicates a rare earth element chosen among a group formed Yb, Er, Ho, Y, Dy, Gd, Eu, Sm and Nd) and SrTiO3 film are deposited the substrate top of sapphire successively. Furthermore, an oxide superconducting thin film to be a SQUID is deposited on the SrTiO3 film.
    Type: Application
    Filed: March 23, 1999
    Publication date: June 7, 2001
    Inventor: TATSUOKI NAGAISHI
  • Publication number: 20010002273
    Abstract: An integrated circuit is formed containing a metal-oxide ferroelectric thin film. An inert-gas recovery anneal is conducted to reverse the degradation of ferroelectric properties caused by hydrogen. The inert-gas recovery anneal is conducted in an unreactive gas atmosphere at a temperature range from 300° to 1000° C. for a time period from one minute to two hours. Preferably, the metal-oxide thin film comprises layered superlattice material. Preferably, the layered superlattice material comprises strontium bismuth tantalate or strontium bismuth tantalum niobate. If the integrated circuit manufacture includes a forming-gas anneal, then the inert-gas recovery anneal is performed after the forming-gas anneal, preferably at or near the same temperature and for the same time duration as the forming-gas anneal.
    Type: Application
    Filed: November 13, 1998
    Publication date: May 31, 2001
    Inventors: VIKRAM JOSHI, NARAYAN SOLAYAPPAN, WALTER HARTNER, GUNTHER SCHINDLER
  • Patent number: 6235685
    Abstract: A rod 1 made of superconducting oxide is soaked in a molten normal conductor 2 to join the rod 1 and the normal conductor 2, whereby a superconducting oxide current lead is prepared. As a result, a contact resistance at the interface between the superconducting oxide and the normal conductor can be reduced. Consequently, Joule's heat at a current lead having a small cross sectional area can be suppressed low, which in turn realizes the reduction of the load on a freezer and the amount of evaporated cooling solvent, with respect to a superconducting coil.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: May 22, 2001
    Assignee: International Superconductivity Technology Center
    Inventors: Junya Maeda, Teruo Izumi, Yuichi Imagawa, Satoshi Matsuoka, Yuh Shiohara, Shoji Tanaka, Hiroshi Okamoto
  • Patent number: 6216941
    Abstract: A method for forming high frequency connections between a fragile chip and a substrate is described, wherein metal is selectively deposited on a surface of a chip and a surface of a substrate, and corresponding patterns of electrically conductive bumps are selectively evaporated on the surface of the chip and the surface of the substrate over the metal layers, to form a pattern of electrically conductive bumps having spongy and dendritic properties, placing the chip in aligned contact with the substrate where each electrically conductive chip bump mates with each corresponding electrically conductive substrate bump, and selectively applying heat and pressure to the chip and substrate causing each chip bump to fuse together with each corresponding substrate bump to form an electromechanical bond.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: April 17, 2001
    Assignee: TRW Inc.
    Inventors: Karen E. Yokoyama, Gershon Akerling, Moshe Sergant
  • Patent number: 6214772
    Abstract: A method is presented for making a polycrystalline thin film (B) by depositing particles emitted from a target (36) on a substrate base (A) to form the film (B) constituted by the target material while concurrently irradiating the depositing particles with an ion beam generated by an ion source (39) at an angle of incidence, in a range of 50 to 60 degrees to a normal (H) to a film surface, and maintaining a film temperature at less than 300 degrees Celsius. This method is effective in producing an excellent alignment of crystal axes of the grains in the film when the film thickness exceeds 200 nm. The target material includes yttrium-stabilized zirconia but other material can also be used. A layer (C) of a superconducting substance formed on top of the polycrystalline thin film (B) produces a superconducting film (22) exhibiting excellent superconducting properties.
    Type: Grant
    Filed: June 18, 1998
    Date of Patent: April 10, 2001
    Assignee: Fujikura Ltd.
    Inventors: Yasuhiro Iijima, Mariko Hosaka, Nobuo Tanabe, Nobuyuki Sadakata, Takashi Saitoh
  • Patent number: 6194353
    Abstract: A process for preparing an oxide superconductor thin film which has a high crystalline, clean and excellent superconductive surface on a substrate by MBE. The MBE is effected under a condition that the substrate is heated and an oxidizing gas is locally supplied to the proximity of the substrate so that the pressure of the proximity of the substrate becomes 6×10−6 to 8×10−5 Torr at a background pressure.
    Type: Grant
    Filed: October 14, 1994
    Date of Patent: February 27, 2001
    Assignee: Sumitomo Electric Industries Ltd.
    Inventor: Takao Nakamura
  • Patent number: 6191074
    Abstract: The fabrication of superconducting wires and rods having desired and consistent electrical and mechanical properties, in particular those based on Yttrium Barium Copper Oxide (YBCO) and Bismuth Strontium Calcium Copper Oxide (BSCCO), is disclosed. The first fabrication step is to form an extrudable paste by mixing YBCO or BSCCO superconducting powder with a set of organic additives, which include binder, plasticizer, lubricant, dispersant, and a solvent. The following additional steps are performed on both YBCO and BSCCO based wires or rods: (i) using a piston extruder to extrude the superconducting wire or rod; (ii) drying the wire or rod to remove the solvent; and (iii) subjecting the wire or rod to a binder burn-out treatment to remove the remaining organic additives. In addition, YBCO wires and rods also require a sintering step, while BSCCO wires and rods also require cold isostatic pressing and heat treatment steps.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: February 20, 2001
    Assignee: University of Houston
    Inventors: Krishnaswamy Ravi-Chandar, Devamanohar Ponnusamy, Kamel Salama
  • Patent number: 6188919
    Abstract: A SNS Josephson junction (10) is provided for use in a superconducting integrated circuit. The SNS junction (10) includes a first high temperature superconducting (HTS) layer (14) deposited and patterned on a substrate (18), such that the first HTS layer (14) is selectively removed to expose a top surface of the substrate (18) as well as to form an angular side surface (22) on the first HTS layer (14) adjacent to the exposed top surface of the substrate (18). Ion implantation is used to form a junction region (12) having non-superconducting properties along the angular side surface (22) of the first HTS layer (14). A second HTS layer (16) is then deposited and patterned over at least a portion of the first HTS layer (14) and the exposed top surface of the substrate (18), thereby forming a SNS Josephson junction.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: February 13, 2001
    Assignee: TRW Inc.
    Inventors: John R. LaGraff, James M. Murduck, Hugo W-K. Chan
  • Patent number: 6188921
    Abstract: A superconducting article having a high bulk sheath resistivity, and methods of manufacture of such an article. High-temperature superconductor filaments are disposed in a ductile matrix comprising a high silver content. The matrix is then coated with a solute and heated to a temperature high enough to allow the solute to diffuse into the matrix, but not high enough to allow substantive degradation or poisoning of the superconductor. After diffusion and cooling, the matrix comprises a silver alloy having a higher bulk resistivity than the pure silver.
    Type: Grant
    Filed: February 1, 1999
    Date of Patent: February 13, 2001
    Assignee: American Superconductor Corporation
    Inventors: Alexander Otto, Ralph P. Mason, Craig J. Christopherson, Peter R. Roberts
  • Patent number: 6177856
    Abstract: On transition from the superconducting state to the normal conducting state, current limiters having a high-temperature superconductor increase their electrical resistance and thereby limit an electric current which is flowing through them. To provide electrical stabilization, the high-temperature superconductor is combined with a silver foil having a layer thickness of <50 &mgr;m to form an extensive composite conductor with good conductivity. The ratio of the layer thickness of the high-temperature superconductor to that of the silver foil should be >10. To produce this composite conductor, the silver sheet is placed on one side on a 2 mm thick MgO powder layer and, on the other side, is covered with a 600 &mgr;m thick so-called green sheet which contains a high-temperature superconductor powder and an organic binder.
    Type: Grant
    Filed: August 19, 1997
    Date of Patent: January 23, 2001
    Assignee: ABB Research Ltd.
    Inventors: Makan Chen, Markus Hoidis, Willi Paul
  • Patent number: 6172008
    Abstract: A process for preparing an oxide thin film which has a crystalline, clean and smooth surface on a substrate. The process is conducted by using an apparatus comprising a vacuum chamber in which an oxidizing gas of O2 including O3 can be supplied near the substrate so that pressure around the substrate can be increased while maintaining high vacuum near an evaporation source and Knudsen cell evaporation sources arranged in the vacuum chamber wherein the substrate is heated, molecular beam of constituent atoms of the oxide excluding oxygen are supplied from the K cell evaporation sources, an oxidizing gas is locally supplied to the vicinity of the substrate and a growing thin film is illuminated by ultraviolet.
    Type: Grant
    Filed: March 28, 1995
    Date of Patent: January 9, 2001
    Assignee: Sumitomo Electric Industries Ltd.
    Inventor: Takao Nakamura
  • Patent number: 6147032
    Abstract: An implant patterned superconductive device and a method for indirect implant-patterning of oxide superconducting materials is provided. The method forms a device having an oxide superconducting layer on a substrate, deposits a passivation layer atop the oxide superconducting layer, and implants chemical impurities in a selected portion of the superconducting layer through the passivation layer. This modifies the conductivity of the selected portion of the oxide superconducting layer and electrically isolates the selected portion from the non-selected portion of the oxide superconducting layer. The passivation layer is made of a material less susceptible to implant damage than the oxide superconducting layer to allow inhibition of the oxide superconducting layer while protecting the crystalline structure of the top surface of the oxide superconducting layer and keeping it planarized.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: November 14, 2000
    Assignee: TRW Inc.
    Inventors: John R. LaGraff, Claire L. Pettiette-Hall, James M. Murduck, Hugo W-K. Chan
  • Patent number: 6083885
    Abstract: An oxide superconductor includes a textured superconducting material including an array of defects with a neutron-fissionable element, or with at least one of the following chemical elements: uranium-238, Nd, Mn, Re, Th, Sm, V, and Ta. The array of defects is dispersed throughout the superconducting material. The superconducting material may be the RE.sub.1 Ba.sub.2 Cu.sub.3 O.sub.7-.delta. compound, wherein RE=Y, Nd, La, Sm, Eu, Gd, Dy, Ho, Er, Tm, Yb, Lu; the Bi.sub.2 Sr.sub.2 CaCu.sub.2 O.sub.x, the (Bi, Pb).sub.2 Sr.sub.2 CaCu.sub.2 O.sub.x, Bi.sub.2 Sr.sub.2 Ca.sub.2 Cu.sub.3 O.sub.x or (Bi, Pb).sub.2 Sr.sub.2 Ca.sub.2 Cu.sub.3 O.sub.x compound; the Tl.sub.2 Ca.sub.1.5 BaCu.sub.2 O.sub.x or Tl.sub.2 Ca.sub.2 Ba.sub.2 Cu.sub.3 O.sub.x compound; or a compound involving substitution such as the Nd.sub.1+x Ba.sub.2-x Cu.sub.3 O.sub.x compounds. The neutron-fissionable element may be uranium-235. The oxide superconductor may include additional defects created by fission.
    Type: Grant
    Filed: January 13, 1998
    Date of Patent: July 4, 2000
    Inventor: Roy Weinstein
  • Patent number: 6066600
    Abstract: A high temperature superconductor junction and a method of forming the junction are disclosed. The junction 40 comprises a first high-T.sub.c superconductive layer (first base electrode layer) 46 on a substrate 42 and a dielectric layer 48 on the first high-T.sub.c superconductive layer. The dielectric layer and the first high-T.sub.c superconductive layer define a ramp edge 50. A trilayer SNS structure 52 is disposed on the ramp edge to form an SSNS junction. The SNS structure comprises a second high-T.sub.c superconductive layer (second base electrode layer) 54 directly on the first high-T.sub.c superconductive layer, a normal barrier layer 56 on the second high-T.sub.c superconductive layer, and a third high-T.sub.c superconductive layer 58 (counterelectrode) on the barrier layer. The ramp edge is typically formed by photoresist masking and ion-milling. A plasma etch step can be performed in-situ to remove the photoresist layer 62 following formation of the ramp edge.
    Type: Grant
    Filed: January 22, 1998
    Date of Patent: May 23, 2000
    Assignee: TRW Inc.
    Inventor: Hugo W. Chan
  • Patent number: 6060433
    Abstract: The invention provides a structure comprising a high temperature superconducting layer deposited on a ceramic polycrystalline ferrite plate suitable for making commercial microwave devices. In one embodiment, the high temperature superconductor is yttrium barium copper oxide (YBCO), the ferrite is yttrium iron garnet (YIG), and the microwave device is a phase shifter. The method of making this embodiment comprises, polishing the YIG plate, depositing biaxially oriented yttria-stabilized zirconia (YSZ) to form a crystalline template using an ion-beam-assisted-deposition technique, depositing a CeO.sub.2 lattice matching buffer layer using pulsed laser deposition, depositing YBCO using pulsed laser deposition, and annealing the YBCO in oxygen. Etching the YBCO to form a meanderline patterned waveguide results in a high figure-of-merit microwave phase shifter when the device is cooled with liquid nitrogen and an external magnetic field is applied.
    Type: Grant
    Filed: January 26, 1999
    Date of Patent: May 9, 2000
    Assignee: NZ Applied Technologies Corporation
    Inventors: Yi-Qun Li, Hua Jiang
  • Patent number: 6045932
    Abstract: A thin film structure including a lanthanum aluminum oxide substrate, a thin layer of homoepitaxial lanthanum aluminum oxide thereon, and a layer of a nonlinear dielectric material thereon the thin layer of homoepitaxial lanthanum aluminum oxide is provided together with microwave and electro-optical devices including such a thin film structure.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: April 4, 2000
    Assignee: The Regents of the Universitiy of California
    Inventors: Quanxi Jia, Alp T. Findikoglu
  • Patent number: 6040275
    Abstract: A novel ceramic substrate useful for the preparation of superconducting films, said substrate having the formula REBa.sub.2 MO.sub.6 where RE represents rare earth metals--Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu and M represents metals Nb, Sb, Sn, Hf, Zr; and a process for the preparation of superconducting YBa.sub.2 Cu.sub.3 O.sub.7-.delta. thick films on new ceramic substrate.
    Type: Grant
    Filed: August 3, 1998
    Date of Patent: March 21, 2000
    Assignee: Council of Scientific & Industrial Research
    Inventors: Jacob Koshy, Jijimon Kumpukkattu Thomas, Jose Kurian, Yogendra Prasad Yadava, Alathoor Damodaran Damodaran
  • Patent number: 5987731
    Abstract: A method for manufacturing an elongated member from a superconducting ceramic material comprising the steps of providing a hollow supporting body of metal or a metallic compound having a hollow inside section therein, introducing a superconducting ceramic material into the hollow inside section of the hollow supporting body, drying the above liquid, so that the superconducting ceramic material is coated on the inside of the supporting body; and firing the supporting body and the ceramic material in an oxidizing atmosphere.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 23, 1999
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shumpei Yamazaki
  • Patent number: 5962373
    Abstract: A precursor is made from a plurality of materials having different vapor pressures. The precursor and a source material are placed in a closed heat treatment furnace. The source material is materials which are the same as some of the materials contained in the precursor and having particular vapor pressures. The precursor and source material is thermally treated in the furnace while the source material is being supplied, so the particular materials in the precursor have their evaporation suppressed, thereby forming compounds. The compounds may be oxide superconductors, oxide dielectric, and so on.
    Type: Grant
    Filed: March 22, 1996
    Date of Patent: October 5, 1999
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masaaki Nemoto, Shuichi Yoshikawa, Ryokan Yuasa, Isao Yoshida, Yorinobu Yoshisato
  • Patent number: 5952270
    Abstract: An oxide superconductor wire is prepared by preparing a length of precursor wire for processing into an oxide superconductor wire and coating the precursor wire with an isolating layer. The coated wire is wound onto a reel in a spiralling manner, such that each turn of the spiral is in alignment with the preceding turn of the spiral along an axis perpendicular to the axis of winding. The wound precursor wire is then heated to form the oxide superconductor. The removable isolating layer is prepared by coating the wire with a solution including a metal oxide and a porosity-inducing component, and heating the coated wire so as to induce porosity and control grain size of the metal oxide so as to render the coating removable. The coating should function to isolate the overlapping turns of the wound wire from neighboring wires, so that not diffusion bonding or adherence between the turns occurs.
    Type: Grant
    Filed: April 29, 1994
    Date of Patent: September 14, 1999
    Assignee: American Superconductor Corporation
    Inventors: Steven Hughson, Elliott Thompson
  • Patent number: 5952271
    Abstract: The method for manufacturing superconducting elements according to the present invention includes the following steps of: (a) placing a substrate near a target in a chamber so that the substrate is positioned to face a surface of the target, wherein the target comprises a target material of a complex oxide superconducting compounds; (b) irradiating a laser beam to the surface of the target to vaporize or sublime the target material so that the target material is deposited onto a surface of the substrate, wherein the surface of the substrate maintains the position facing the surface of the target; and (c) fabricating the surface of the target material layer on the substrate to form a superconducting element by irradiating a laser beam to the surface of the substrate, without removing the substrate from the chamber.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: September 14, 1999
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Akihiro Moto, Tatsuoki Nagaishi, Hideo Itozaki
  • Patent number: 5945383
    Abstract: A method of producing a high temperature superconductor Josephson element and an improved SNS weak link barrier element is provided. A YBaCuO superconducting electrode film is deposited on a substrate at a temperature of approximately 800.degree. C. A weak link barrier layer of a nonsuperconducting film of N--YBaCuO is deposited over the electrode at a temperature range of 520.degree. C. to 540.degree. C. at a lower deposition rate. Subsequently, a superconducting counter-electrode film layer of YBaCuO is deposited over the weak link barrier layer at approximately 800.degree. C. The weak link barrier layer has a thickness of approximately 50 .ANG. and the SNS element can be constructed to provide an edge geometry junction.
    Type: Grant
    Filed: March 19, 1992
    Date of Patent: August 31, 1999
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventor: Brian D. Hunt
  • Patent number: 5939361
    Abstract: A substrate is set in a reaction chamber, to heat the substrate to a predetermined temperature. Tl, Ba, Ca, Cu and O are supplied to the substrate by a Tl evaporation source and a target, to cause a TlBaCaCuO film to grow on the substrate. The TlBaCaCuO film is crystallized for each formation of each of its blocks each having a layered structure. In an incomplete block which is being formed, the amount of evaporation of Tl by the heating is large, so that the amount of evaporation of Tl varies depending on the ratio of an uncrystallized region on its surface. In a complete block after the formation, the amount of evaporation of Tl by the heating is small, and is approximately constant. Film growth is stopped for a predetermined time period for each formation of the block, to control the amount of supply of Tl depending on the forming step of the block.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: August 17, 1999
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Masaaki Nemoto
  • Patent number: 5922651
    Abstract: Herein disclosed is a superconductive thin film formation method of forming a superconductive thin film having a high critical temperature and a low surface resistance. The method comprises a first step of depositing a superconductive thin film layer on a substrate under a first condition. The superconductive thin film layer has a thickness smaller than that of the superconductive thin film. The method further comprises a second step of introducing oxygen under a second condition. The method further comprises a third step of depositing a superconductive thin film layer on the previously deposited superconductive thin film layer under the first condition and fourth step of introducing oxygen under the second condition. The method further comprises a fifth step of repeating the third and fourth steps until the sum of the thicknesses of the superconductive thin film layers is substantially equal to the predetermined thickness of the superconductive thin film.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: July 13, 1999
    Assignee: Advanced Mobile Telecommunication Technology Inc.
    Inventors: Hiroki Hoshizaki, Masahiro Kawamura
  • Patent number: 5916848
    Abstract: An edge junction 10 with reduced parasitic inductance. The edge junction 10 has a laminar structure 22 including: a substrate 14; a first superconductive layer 12 deposited on a substrate 14; a first dielectric layer 16 deposited on the first superconductive layer 12; a second superconductive layer 18 deposited on the first dielectric layer 16; and a second dielectric layer 20 deposited on the second superconductive layer 18. The first and second superconductive layers 12 and 18 and the first and second dielectric layers 16 and 20 form a first laminar structure 22 having a planar segment 24 and a self-aligned ramp segment 26, the ramp segment 26 having a constantly-decreasing thickness and being connected to the planar segment 24 at an angle .theta. thereto.
    Type: Grant
    Filed: October 8, 1997
    Date of Patent: June 29, 1999
    Assignee: TRW Inc.
    Inventor: Dale J. Durand
  • Patent number: 5912210
    Abstract: There is disclosed herein an invention for increasing the current carrying capability of high-Tc superconductor materials. The inventive method includes irradiating such superconductors with light particles, such as neutrons, protons and thermal neutrons, having energy sufficient to cause fission of one or more elements in the superconductor material at a dose rate and for a time sufficient to create highly splayed (dispersed in orientation) extended columns of damaged material therein. These splayed tracks significantly enhance the pinning of magnetic vortices thereby effectively reducing the vortex creep at high temperatures resulting in increased current carrying capability.
    Type: Grant
    Filed: August 8, 1997
    Date of Patent: June 15, 1999
    Assignee: International Business Machines Corporation
    Inventors: Lia Krusin-Elbaum, Alan David Marwick, Paul William Lisowski, James Russell Thompson, Jr., James Francis Ziegler
  • Patent number: 5908813
    Abstract: The present invention discloses an integrated circuit that is wired with a high-temperature superconductive material that is superconductive at temperatures of about 70.degree. K and above, and methods of making the integrated circuit. The front-end manufactured semiconductor structure is patterned with a preferred precursor metal or metal oxide and a complementary compound is superposed and reacted to form wiring lines of superconductor ceramics that complete integrated circuits within the front-end manufactured semiconductor structure. The front-end manufactured semiconductor structure is alternatively patterned first with the complementary compound and the precursor metal is thinly patterned by ion implantation. The front-end manufactured semiconductor structure is then treated to form wiring lines of superconductor ceramics that complete integrated circuits within structure.
    Type: Grant
    Filed: February 14, 1997
    Date of Patent: June 1, 1999
    Assignee: Micron Technology, Inc.
    Inventor: John H. Givens
  • Patent number: 5900391
    Abstract: Herein disclosed is a method for depositing a high Tc superconducting thin film. The superconducting thin film is deposited on one surface of a substrate. The substrate is exposed to an electromagnetic wave to heat the substrate during the process for depositing the superconducting thin film. Before the processes for depositing the superconducting thin film and exposing the substrate to the electromagnetic wave, a dummy film is formed on the other surface of the substrate. The dummy film has absorbency of the electromagnetic wave which is higher than that of the substrate. The dummy film together with the substrate is exposed to the electromagnetic wave while the superconducting thin film is deposited on the one surface of the substrate. The superconducting thin film thus deposited has superconductivity and high quality crystal structure.
    Type: Grant
    Filed: November 26, 1996
    Date of Patent: May 4, 1999
    Assignee: Advanced Mobile Telecommunication Technology Inc.
    Inventors: Nobuyoshi Sakakibara, Hiroki Hoshizaki, Yoshiki Ueno
  • Patent number: 5885939
    Abstract: A process for forming a laminate of 123-type copper oxide superconductor thin films having dissimilar crystal axis orientations, a laminate of 123-type thin copper oxide superconductor layers exhibiting excellent superconducting property, and wiring for Josephson junction. A c-axis oriented single crystalline thin film of an oxide superconductor having a Y:Ba:Cu atomic ratio of substantially 1:2:3 and a lattice constant of 11.60 angstroms.ltoreq.c.ltoreq.11.70 angstroms at a temperature of 20.degree. C. under an oxygen partial pressure of 160 Torr is formed on a single crystalline substrate, and an a-axis oriented single crystalline thin film of said oxide superconductor is formed on the above laminated film relying upon a sputter deposition method.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: March 23, 1999
    Assignees: Kyocera Corporation, International Superconductivity Technology Center, Matsushita Electric Industrial Co., Ltd., Mitsubishi Materials Corporation
    Inventors: Yoshinori Matsunaga, Shuichi Fujino, Akihiro Odagawa, Youichi Enomoto
  • Patent number: 5885937
    Abstract: This invention provides a superconducting tunnel junction element showing satisfactory Josephson effect. The element includes a Bi-based layered compound such as Bi.sub.2 Sr.sub.2 (Ca.sub.0.6 Y.sub.0.4)Cu.sub.2 O.sub.8, Bi.sub.2 Sr.sub.2 Cu.sub.2 O.sub.6 and Bi.sub.2 Sr.sub.2 CaCu.sub.2 O.sub.8 as the barrier layer between the superconducting oxide electrodes. The structural matching of the superconducting oxide with the Bi-based compound is supposed to be good. Some kinds of Cu-based superconducting oxides such as YSr.sub.2 Cu.sub.2.7 Re.sub.0.3 O.sub.7, Sr.sub.2 CaCu.sub.2 O.sub.6 and (La.sub.0.9 Sr.sub.0.1).sub.2 CuO.sub.4 are used for the electrodes to obtain a Josephson element which can work at a high temperature. When using the superconducting oxides including Ba such as YBa.sub.2 Cu.sub.3 O.sub.7 for the electrode, forming a thin film between the electrode and the barrier is better to prevent Ba from reacting with Bi in the barrier layer.
    Type: Grant
    Filed: July 7, 1997
    Date of Patent: March 23, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideaki Adachi, Masahiro Sakai, Akihiro Odagawa, Kentaro Setsune
  • Patent number: 5880069
    Abstract: A desired pattern is formed on a non-superconducting oxide film after the non-superconducting oxide film has been formed on a magnesia substrate. A superconducting oxide film is formed over the exposed parts of the substrate and the non-superconducting oxide film. The epitaxial orientation of the superconducting oxide film section on the non-superconducting oxide film is different from that of the superconducting oxide film section on the substrate. A tilt-boundary junction is produced at a boundary between the superconducting film sections which are different in epitaxial orientation from each other. Thus, a Josephson junction having a desired pattern can be obtained.
    Type: Grant
    Filed: February 1, 1994
    Date of Patent: March 9, 1999
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masao Nakao, Hiroaki Furukawa, Ryohkan Yuasa, Shuji Fujiwara
  • Patent number: 5872081
    Abstract: A melt processing method for bulk or thick film fabrication of RE123 superconductor material includes the steps of using Nd in the RE123 to increase the recrystallization speed of the RE123, and using a heavy rare earth in the RE123 to establish the peritectic melting point of the RE123 somewhere below the melting point of silver. Within these requirements, the method essentially includes heating the RE123 above its peritectic melting point, and then cooling the resultant decomposed material to recrystallize the RE123. The heavy rare earths to be used for lowering the RE123 peritectic melting temperature include Lu, Yb, Tm or Er or mixtures thereof. The addition of RE211, silver and the use of a low oxygen partial pressure also contribute to a lowering of the melting point of the RE123. When using Nd to accelerate the processing time, the RE123 can include a first component of Nd.sub.1-z R.sub.z 123 and a second component of Nd.sub.1-y R.sub.y 211.
    Type: Grant
    Filed: April 7, 1995
    Date of Patent: February 16, 1999
    Assignees: General Atomics, Shimabun Co., Ltd.
    Inventor: Lawrence D. Woolf
  • Patent number: 5869431
    Abstract: A method of fabricating bulk superconducting material such as RBa.sub.2 Cu.sub.3 O.sub.7-.delta. where R is La or Y comprising depositing a thin epitaxially oriented film of Nd or Sm (123) on an oxide substrate. The powder oxides of RBa.sub.2 Cu.sub.3 O.sub.7-.delta. or oxides and/or carbonates of R and Ba and Cu present in mole ratios to form RBa.sub.2 Cu.sub.3 O.sub.7-.delta., where R is Y or La are heated, in physical contact with the thin film of Nd or Sm (123) on the oxide substrate to a temperature sufficient to form a liquid phase in the oxide or carbonate mixture while maintaining the thin film solid to grow a large single domain 123 superconducting material. Then the material is cooled. The thin film is between 200 .ANG. and 2000 .ANG.. A construction prepared by the method is also disclosed.
    Type: Grant
    Filed: April 15, 1996
    Date of Patent: February 9, 1999
    Assignee: The University of Chicago
    Inventors: Boyd W. Veal, Arvydas Paulikas, Uthamalingam Balachandran, Wei Zhong
  • Patent number: 5866195
    Abstract: A method for producing elongated strip, wire or cable, a portion or all of which is defined by electrically metallic superconducting material. In one form, a substrate in the form of a strip, wire or cable, is formed by extrusion, rolling, drawing, casting or a combination of two or more of such processes, of a metal, combination of metals, metal compound, non-metallic material or a combination of such materials, and is controllably driven through a reaction chamber while the material thereof, or of the surface stratum thereof, is chemically converted, as it is driven, to a superconducting material. In a second form, such elongated wire, strip or cable is controllably coated with one or more materials which define a superconducting layer thereon or a plurality of such superconducting layers which bond or solidify on the substrate.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: February 2, 1999
    Inventor: Jerome H. Lemelson
  • Patent number: 5863869
    Abstract: Superconducting transition metal oxide films are provided which exhibit very high onsets of superconductivity and superconductivity at temperatures in excess of 40.degree. K. These films are produced by vapor deposition processes using pure metal sources for the metals in the superconducting compositions, where the metals include multi-valent nonmagnetic transition metals, rare earth elements and/or rare earth-like elements and alkaline earth elements. The substrate is exposed to oxygen during vapor deposition, and, after formation of the film, there is at least one annealing step in an oxygen ambient and slow cooling over several hours to room temperature. The substrates chosen are not critical as long as they are not adversely reactive with the superconducting oxide film. Transition metals include Cu, Ni, Ti and V, while the rare earth-like elements include Y, Sc and La. The alkaline earth elements include Ca, Ba and Sr.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: January 26, 1999
    Assignee: International Business Machines Corporation
    Inventors: Praveen Chaudhari, Richard Joseph Gambino, Roger Hilson Koch, James Andrew Lacey, Robert Benjamin Laibowitz, Joseph Michael Viggiano
  • Patent number: 5863846
    Abstract: A slurry is molded from ceramic fibers and/or microparticles to form a soft felt mat which is impregnated with a sol prior to drying the mat. A catalyst for the sol is caused to diffuse into the mat by exposing the mat to the catalyst and subjecting the mat to a soak time during which the catalyst diffuses into the mat and causes the sol to gel. The sol-gel binder forms bonds so that the mat is dimensionally stabilized. The mat is dried to produce ceramic insulation.Ceramic insulation having a consistent microstructure and a fully gelled sol-gel binder through its entire thickness is also provided.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: January 26, 1999
    Assignee: The Boeing Company
    Inventors: Michael E. Rorabaugh, Darryl F. Garrigus, Juris Verzemnieks