Electrolytic Or Barrier Layer Type Patents (Class 427/80)
  • Patent number: 7166250
    Abstract: The present invention relates to poly(arylene ethers) used as low k dielectric layers in electronic applications and articles containing such poly(arylene ethers) comprising the structure: wherein n=5 to 10000 and monovalent Ar1 and divalent Ar2 are selected from a group of heteroaromatic compounds that incorporate O, N, Se, S, or Te or combinations of the aforesaid elements, including but not limited to:
    Type: Grant
    Filed: January 4, 2005
    Date of Patent: January 23, 2007
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Christopher Lim, Siu Choon Ng, Hardy Chan, Simon Chooi, Mei Sheng Zhou
  • Patent number: 7152291
    Abstract: Improved method steps for terminating multilayer electronic components are disclosed. Monolithic components are formed with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. Electrode and dielectric layers are provided in an interleaved arrangement and selected portions of the electrode layers are exposed. Electrically isolated anchor tabs may optionally be provided and exposed in some embodiments. Termination material is then plated to the exposed portions of the electrode layers until exposed portions of selected such portions thereof are connected. A variety of different plating techniques and termination materials may be employed in the formation of the subject self-determining plated terminations.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: December 26, 2006
    Assignee: AVX Corporation
    Inventors: Andrew P. Ritter, Robert Heistand, II, John L. Galvagni, Sriram Dattaguru
  • Patent number: 7144432
    Abstract: A method of making a capacitor element used for a solid electrolyte capacitor is provided. The method includes steps of forming a dielectric layer, a solid electrolyte layer of manganese dioxide, a graphite layer and a metal layer in this order on an anode chip of valve metal. The method further includes a step of forming an intermediate layer between the electrolyte layer and the graphite layer. The intermediate layer is made by application of manganese nitrate solution containing 0.5–2.0 wt % of graphite powder or by application of a graphite material containing manganese dioxide powder.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: December 5, 2006
    Assignee: Rohm Co., Ltd.
    Inventor: Takahiro Nakamura
  • Patent number: 7090706
    Abstract: A long life double layer capacitor and method of making the same including a case and a first terminal with an electrically insulating hermitic seal interposed between the first terminal and the case. A first current collector foil is electrically coupled to an interior portion of the first terminal and a first electrode comprising carbon which is juxtaposed against the first current collector foil. A porous separator is then juxtaposed against the first electrode comprising carbon and separating the first electrode from a second electrode comprising carbon. A second current collector foil is juxtaposed against a side of the second electrode and is electrically coupled to the second terminal.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: August 15, 2006
    Assignee: Maxwell Technologies, Inc.
    Inventors: C. Joseph Farahmandi, John M. Dispennette, Edward Blank, Robert W. Crawford, Chenniah Nanjundiah
  • Patent number: 7081141
    Abstract: An electrolytic capacitor comprising an anode, cathode and an electrolyte. The electrolyte comprises an aqueous solution comprising a compound of formula 1: CH3—(OCH2CH2)m—OCH3Formula 1 wherein m is an integer from 3 to 10. The electrolyte also comprises an ionogen.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: July 25, 2006
    Assignee: Medtronic, Inc.
    Inventors: Joachim Hossick-Schott, Brian John Melody, John Tony Kinard
  • Patent number: 7071281
    Abstract: The present invention relates to poly(arylene ethers) used as low k dielectric layers in electronic applications and articles containing such poly(arylene ethers) comprising the structure: wherein n=5 to 10000 and monovalent Ar1 and divalent Ar2 are selected from a group of heteroaromatic compounds that incorporate O, N, Se, S, or Te or combinations of the aforesaid elements, including but not limited to:
    Type: Grant
    Filed: January 4, 2005
    Date of Patent: July 4, 2006
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Christopher Lim, Siu Choon Ng, Hardy Chan, Simon Chooi, Mei Sheng Zhou
  • Patent number: 7067172
    Abstract: Improved terminations, interconnection techniques, and inductive element features for multilayer electronic components are formed in accordance with disclosed plating techniques. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such plated termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed varying width internal electrode tabs and additional anchor tab portions. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. The combination of electrode tabs and anchor tabs may be exposed in respective arrangements to form generally discoidal portions of plated material.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: June 27, 2006
    Assignee: AVX Corporation
    Inventors: Andrew P. Ritter, John L. Galvagni, Jason MacNeal, Robert Heistand, II, Sriram Dattaguru
  • Patent number: 7067173
    Abstract: Provided is a Ag-based conductive paste for a terminal electrode which suppresses oxidation of the Ni surface of an internal conductor and therefore brings about excellent joining with Ni even when baking is performed in the atmosphere in the case where Ni is used as the internal conductor of a laminated ceramic electronic component. The conductive paste includes at least one of an Ag powder and an Ag alloy powder, a nickel boride powder, an inorganic binder and an organic vehicle, wherein the quantity of the nickel boride powder is within the range of about 5% by weight or more, but less than about 60% by weight of the total paste.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: June 27, 2006
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takeshi Miki, Satoru Noda
  • Patent number: 7025795
    Abstract: An electrode for electrolytic capacitors having a large capacitance and having excellent tan ?, heat resistance, humidity resistance and stability. An electrolytic capacitor using the electrode. An electrode obtained by attaching a compound having a siloxane bond onto the surface of an electrode body comprising a valve-acting metal having formed thereon a dielectric film. The compound having a siloxane bond is attached by coating, dipping or vapor deposition. A solid electrolytic capacitor obtained by forming an electrolyte comprising an electrically conducting polymer on the electrode.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: April 11, 2006
    Assignee: Showa Denko Kabushiki Kaisha
    Inventors: Ryuji Monden, Atsushi Sakai, Yuji Furuta, Hideki Ohata
  • Patent number: 7011726
    Abstract: A method of fabricating a thin dielectric film, a thin dielectric film formed according to the method, and a system including the thin dielectric film. The method includes: depositing a ceramic precursor material on a metal sheet, the ceramic precursor material including a mixture comprising ceramic particles and an organic carrier medium; heat treating the ceramic precursor material such that the organic carrier medium is substantially burnt off, and further such that a dielectric layer is formed including ceramic grains formed from the ceramic particles, and having grain sizes between about 100 nm and about 500 nm; depositing a CSD precursor material onto the dielectric layer; and heat treating the CSD precursor material such that organics in the CSD precursor material are substantially burnt off, and further such that a CSD medium is formed from the CSD precursor material including CSD grains substantially filling the voids between the ceramic grains.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: March 14, 2006
    Assignee: Intel Corporation
    Inventor: Cengiz A. Palanduz
  • Patent number: 7004983
    Abstract: The polymer electrolyte composite, for driving an electrolytic capacitor, according to the present invention is a composite body comprising an electrolyte and an acrylic polymer containing a copolymer of acrylic derivative. The electrolyte comprises a polar solvent and a solute comprising at least one of inorganic acids, organic acids and salts of such acids. The copolymer of acrylic derivative is a polymer of: a first monomer of at least one of a group of monofunctional monomers of acrylic derivatives each having at least one hydroxyl group at a terminal thereof and a polymerizable unsaturated double bond; and a second monomer of at least one of a group of multifunctional monomers of acrylic derivatives each having plural polymerizable unsaturated double bonds.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: February 28, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazumitsu Honda, Nario Niibo, Yuichiro Tsubaki, Junji Ozaki
  • Patent number: 6996891
    Abstract: The invention relates to a method for the manufacture of a sensor element and to a sensor element. In the method, both surfaces of a sensor film are provided with metallic electrodes. The sensor element is produced by cutting it from a larger amount of sensor element material. In the manufacture of the sensor element material, the electrodes are produced as a continuous process from roll to roll and the sensor element material is formed by laminating as a continuous process from roll to roll. At least the signal electrode consists of repeated electrode patterns which are at least partially connected to each other via one or more narrow connecting strips, and a sensor element of a desired length and/or shape is produced by cutting the material across the region of the connecting strips.
    Type: Grant
    Filed: July 3, 2000
    Date of Patent: February 14, 2006
    Assignee: Emfitech Oy
    Inventor: Heikki Räisänen
  • Patent number: 6973706
    Abstract: A process for the manufacture of small sensors with reproducible surfaces, including electrochemical sensors. One process includes fanning channels in the surface of a substrate and disposing a conductive material in the channels to form an electrode. The conductive material can also be formed on the substrate by other impact and non-impact methods. In a preferred embodiment, the method includes cutting the substrate to form a sensor having a connector portion and a transcutaneous portion, the two portions having edges that define one continuous straight line.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: December 13, 2005
    Assignee: TheraSense, Inc.
    Inventors: James Say, Michael F. Tomasco, Adam Heller, Yoram Gal, Behrad Aria, Ephraim Heller, Phillip John Plante, Mark S. Vreeke
  • Patent number: 6960366
    Abstract: Improved termination features for multilayer electronic components are disclosed. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed internal electrode tabs and additional anchor tab portions which may optionally extend to the cover layers of a multilayer component. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. External anchor tabs positioned on one or both of top and bottom surfaces of a monolithic structure can facilitate the formation of selective wrap-around plated terminations.
    Type: Grant
    Filed: August 1, 2003
    Date of Patent: November 1, 2005
    Assignee: AVX Corporation
    Inventors: Andrew P. Ritter, Robert Heistand, II, John L. Galvagni, Sriram Dattaguru
  • Patent number: 6925701
    Abstract: A method of making a resonant frequency tag which resonates at a predetermined frequency. The method involves providing a first conductive pattern having an inductive element and a first land and a second conductive pattern having a second land and a third land which are joined together by a link. The second conductive pattern is overlaid the first conductive pattern such that the second land is positioned over the first land. The third land is in electrical communication with the inductive element of the first conductive pattern. The formed resonant frequency tag is energized to determine if the tag resonates at the predetermined frequency. If the tag resonates properly, the third land is electrically coupled to the inductive element. If it does not, the second conductive pattern is adjusted so that overlapping portions of the first and second lands are changed, altering the capacitance to adjust the resonant tag frequency.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: August 9, 2005
    Assignee: Checkpoint Systems, Inc.
    Inventors: Eric Eckstein, Gary Mazoki, Peter Lendering, Luis Francisco Soler Bonnin, Takeshi Matsumoto, Lawrence Appalucci
  • Patent number: 6857172
    Abstract: According to the present invention, a method of manufacturing a ferroelectric capacitor using a ferroelectric thin film, includes steps of: forming a lower conductive layer on a semiconductor substrate; coating solution of ferroelectric coking including organic solvent and organometallic complex on the lower conductive layer; performing a heating process for coated solution at temperature, to decompose said organometallic complex in solution of ferroelectric coking, or more and ferroelectric crystallization temperature or below to form said metal compound thin film; forming an upper conductive layer on said metal compound thin film; and performing a heating process for said metal compound thin film at ferroelectric crystallization temperature or more to form said ferroelectric thin film.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: February 22, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Daisuke Inomata
  • Patent number: 6855367
    Abstract: A base layer, which is supposed to be burnt off by baking, is formed on an unbaked member such as ceramic green sheet or laminated ceramic green sheets. This base layer improves ink acceptability of the unbaked ceramic member particularly for low viscosity ink such as jet-ink, and prevents oozing, draining, uneven thickness. This structure thus allows the inkjet to form a precise pattern. The base layer is burnt off at the baking step in the manufacturing process of electronic components, thus it does not adversely affect the reliability of the electronic component.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: February 15, 2005
    Assignee: Atsushita Electric Industrial Co., Ltd.
    Inventor: Keiichi Nakao
  • Patent number: 6849292
    Abstract: The present invention concerns the field of solid state capacitors and relates particularly to massed production methods for manufacturing solid state capacitors.
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: February 1, 2005
    Assignee: AVX Limited
    Inventor: David Huntington
  • Patent number: 6846899
    Abstract: The present invention relates to poly(arylene ethers) used as low k dielectric layers in electronic applications and articles containing such poly(arylene ethers) comprising the structure: wherein n=5 to 10000 and monovalent Ar1 and divalent Ar2 are selected from a group of heteroaromatic compounds that incorporate O, N, Se, S, or Te or combinations of the aforesaid elements, including but not limited to:
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: January 25, 2005
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Christopher Lim, Siu Choon Ng, Hardy Chan, Simon Chooi, Mei Sheng Zhou
  • Patent number: 6845551
    Abstract: There is disclosed herein a high voltage and high temperature power electronics capacitor which comprises one or more insulator layers of mica paper, and one or more metal conductor layers, all dispersed in a pressurized environment of a nonreactive and high voltage strength gas maintained at near ambient to about 405.2 kPa of pressure. The insulator and conductor layers are isolated and separated from one another by the alternating placement of conductor layers between said insulator layers. These capacitors are readily packaged for commercial use in containers or housings of almost any geometric form and any material of construction. Moreover, low inductance ceramic bushings can be employed on these containers for establishing external electrical contacts. These capacitors can be economically manufactured and used in large commercial volumes with currently available materials and production methods.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: January 25, 2005
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Lyon Mandelcorn, John Bowers, Eugene R. Danielson, Stephen R. Gurkovich, Kenneth C. Radford
  • Patent number: 6843810
    Abstract: An electric double layer capacitor is disclosed which is capable of preventing transmission of an electrolytic solution vaporized in a basic cell through current collectors and capable of improving a yield. A method for preparing the electric double layer capacitor is also disclosed.
    Type: Grant
    Filed: January 2, 2004
    Date of Patent: January 18, 2005
    Assignee: NEC Tokin Corporation
    Inventors: Yutaka Nakazawa, Ryuichi Kasahara, Koji Sakata
  • Patent number: 6824603
    Abstract: A composition of matter comprising a mixture of an oxide powder or powders and a Reactive Organic Medium (ROM) which can be used to create electronic components on a suitable. The materials are applied to conventional polymer-based circuit substrates by any convenient printing process and thermally cured to well-consolidated oxide components at a temperature, which the substrate can withstand. Mixtures for various components, including resistors, capacitor dielectrics and magnetic cores and processes to apply them are disclosed.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: November 30, 2004
    Assignee: Parelec, Inc.
    Inventor: Paul H. Kydd
  • Patent number: 6817086
    Abstract: A bilayer mask employed for lift off has a top strip which bridges between first and second bilayer portions and is completely undercut so that when one or more materials is sputter deposited the materials do not form fences abutting recessed edges of a bottom layer in undercuts below a top layer. Sacrificial protective layers are formed on a sensor and lead layers for protecting these components while overlapping portions of these materials on the top of the sensor formed during deposition can be removed by ion beam sputtering, after which the sacrificial protective layers can be removed by ion milling or reactive ion etching.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: November 16, 2004
    Assignee: International Business Machines Corporation
    Inventors: Jennifer Qing Lu, Scott Arthur MacDonald, Hugo Alberto Emilio Santini
  • Patent number: 6805763
    Abstract: This invention provides a stacked ceramic body in which de-lamination (inter-layer peeling) does not easily occur, and a production method thereof. In the invention, a predetermined number of unit layers 151 and 152 each including a ceramic layer 111 112, an internal electrode layer 121, 122, a spacer 131, 132 having substantially the same thickness as the internal electrode layer 121, 122 and adhesive layers 14 stacked on the surface of the internal electrode layer and on the surface of the adhesive layer are stacked. A print portion for the internal electrode layer 121, 122 and a print portion for the spacer 131, 132 are formed on a green sheet for the ceramic layer 111, 112, and print portions for the adhesive layer 14 are formed on both of them to give an unsintered unit. The unsintered units are stacked to give an unsintered stacked body, are press-bonded and are then sintered.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: October 19, 2004
    Assignee: Denso Corporation
    Inventors: Akio Iwase, Yukihisa Takeuchi, Tetuji Ito
  • Patent number: 6764712
    Abstract: A method for increasing the surface area of foil electrodes of electrolytic capacitors. A valve metal is deposited by evaporation on a valve metal foil in a low pressure inert atmosphere including oxygen at a pressure one to two orders of magnitude lower than the pressure of the inert gas. The resulting surface is fractal-like. The foil thus treated is suitable as such for use as a cathode. Prior to anodization to produce an anode, a discontinuous layer of a valve metal oxide is deposited on the foil, to preserve the high surface area of the fractal-like surface and otherwise promote the formation of a dielectric coating whose interface with the metal foil has a high surface area.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: July 20, 2004
    Assignee: Acktar Ltd
    Inventors: Dina Katsir, Iris Tartakovsky, Israel Tartakovsky
  • Publication number: 20040136145
    Abstract: A solid electrolytic capacitor comprising (1) an electrically conducting polymer composition formed on the surface of an oxide film which is formed on a valve-acting metal, by specifying the viscosity of an oxidizing agent solution and/or a monomer solution, particularly by specifying the viscosity to less than about 100 cp, (2) an electroconducting polymer composition formed on the surface of an oxide film layer which is formed on a valve-acting metal, wherein the electroconducting polymer layer comprising a monomer compound or a derivative thereof as a repeating unit and also containing an anionic dopant is polymerized by setting the humidity in the atmosphere to from about 10% to less than about 60%; (3) an anode body having provided on the outer surface thereof a solid electrolyte formed of an electrically conducting polymer containing a lamellar structure, wherein the solid electrolyte provided on the dielectric film formed on a valve acting metal occupies from about 10 to about 95% of the space in a por
    Type: Application
    Filed: December 24, 2003
    Publication date: July 15, 2004
    Applicant: SHOWA DENKO K.K.
    Inventors: Atsushi Sakai, Ryuji Monden, Toru Sawaguchi, Katsuhiko Yamazaki, Yuji Furuta, Hideki Ohata
  • Patent number: 6749890
    Abstract: The invention provides an electrode forming method with steps of arraying chip-style electronic components on an arraying flat bed thereby positioning and aligning the components, lowering a film coated with an adhesive in relative manner together with an adhering top plate parallel to the arraying flat bed thereby adhering ends of the positioned and aligned chip-style electronic components to the adhesive, then lowering the first film to which the chip-style electronic components are adhered in relative manner together with a coating top plate parallel to a coating flat bed provided with a conductive paste layer of a constant thickness thereby pressing the other ends of the chip-style electronic components to the coating flat bed and coating the ends of the electronic components with the conductive paste.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: June 15, 2004
    Assignee: TDK Corporation
    Inventors: Ko Onodera, Satoshi Kurimoto
  • Patent number: 6740351
    Abstract: For manufacturing a multi-layer structure with repeating layer sequences, a band-shaped carrier material is first partially separated into individual sections of a same size with connections capable of bearing remaining between the individual sections. After continuously applying at least one further material layer on the surface of the carrier material, the individual sections are completely separated by cutting or punching. The multi-layer structure is obtained by stacking the individual sections obtained in this way on top of one another, whereby intermediate layers can also be potentially inserted between two individual sections.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: May 25, 2004
    Assignee: Epcos AG
    Inventors: Klaus Schoch, Werner Erhardt, Hartmut Michel
  • Publication number: 20040083589
    Abstract: The invention relates to a method for producing electrodes, components, half cells and cells for electrochemical energy converters, such as fuel cells or electrolysis cells, comprising the following steps: a) producing a plane, porous support material (4a; 4b); b) applying at least one layer of an electrode material (1) and/or a layer of a catalyst material (18) to the porous support material (4a); c) rolling or pressing said porous support material (4a) together with the layers applied thereto to a predetermined thickness (D), at the same time producing a flat and smooth or structured surface.
    Type: Application
    Filed: December 10, 2003
    Publication date: May 6, 2004
    Inventors: Marc Steinfort, Marc Bednarz
  • Patent number: 6696138
    Abstract: A solid electrolytic capacitor comprises a porous valve acting metal having formed thereon a dielectric film and a solid electrolyte formed on the dielectric film. The solid electrolyte occupies from 10 to 95% of the space within a pore of the porous metal.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: February 24, 2004
    Assignee: Showa Denko K.K.
    Inventors: Atsushi Sakai, Ryuji Monden, Toru Sawaguchi, Katsuhiko Yamazaki, Yuji Furuta, Hideki Ohata
  • Patent number: 6682772
    Abstract: A platinum deposition method uses a combination of an oxide adhesion layer and a high temperature thin film deposition process to produce platinum bottom electrodes for ferroelectric capacitors. The platinum bottom electrode is deposited onto a TiOx layer at temperatures between about 300 and 800° C. Deposition at high temperatures changes the platinum stress from compressive to tensile, increases platinum grain size, and provides a more thermally stable substrate for subsequent PZT deposition.
    Type: Grant
    Filed: April 24, 2000
    Date of Patent: January 27, 2004
    Assignees: Ramtron International Corporation, Ulvac Japan, Ltd.
    Inventors: Glen R. Fox, KouKou Suu
  • Patent number: 6673388
    Abstract: A method of making a charge containing element including the steps of depositing and patterning a dielectric material on a surface wherein the dielectric material includes a metallo-organic component and a liquid component; and decomposing by laser light the deposited dielectric material to substantially evaporate the liquid component to cause the metallic portion of the metallo-organic component to react with oxygen causing the dielectric material to have charge-holding properties.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: January 6, 2004
    Assignee: Eastman Kodak Company
    Inventors: Thomas N. Blanton, Syamal K. Ghosh, Donn B. Carlton, Dilip K. Chatterjee
  • Patent number: 6673389
    Abstract: The present invention concerns the field of solid state capacitors and relates particularly to massed production methods for manufacturing solid state capacitors. The present invention seeks to provide a process simplification in order to provide an economic advantage.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: January 6, 2004
    Assignee: AVX Limited
    Inventor: David Huntington
  • Patent number: 6663793
    Abstract: The present invention relates to a method for producing a low temperature 0-3 composite material, comprising the steps of providing a mixture, wherein the mixture comprises a liquid phase and a particulate phase and wherein the liquid phase comprises a reactive metal alkoxide; depositing the mixture on to a plastic substrate; and consolidating the mixture to provide a 0-3 composite material, wherein the 0-3 composite material is suitable for use as an electronic component.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: December 16, 2003
    Assignee: Sciperio, Inc.
    Inventors: Robert L. Parkhill, Steven M. Coleman, Edward T. Knobbe
  • Patent number: 6627252
    Abstract: A double layer capacitor includes first and second electrode structures separated by a porous separator. The first and second electrode structures each include a current collector foil, a primary coating formed on the current collector foil, and a secondary coating formed on the primary coating. The primary coatings include conducting carbon powder, and the secondary coatings include activated carbon powder. A method of making the electrode structures includes the steps of: preparing a first slurry that includes conducting carbon powder and a binder; applying the first slurry to a current collector plate; drying the applied first slurry to form a primary coating; preparing a second slurry that includes activated carbon powder, a solvent and a binder; and applying the second slurry to the primary coating.
    Type: Grant
    Filed: May 12, 2000
    Date of Patent: September 30, 2003
    Assignee: Maxwell Electronic Components, Inc.
    Inventors: Chenniah Nanjundiah, Richard P. Braun, Raymond T. E. Christie, C. Joseph Farahmandi
  • Publication number: 20030076648
    Abstract: The polymer electrolyte composite, for driving an electrolytic capacitor, according to the present invention is a composite body comprising an electrolyte and an acrylic polymer containing a copolymer of acrylic derivative. The electrolyte comprises a polar solvent and a solute comprising at least one of inorganic acids, organic acids and salts of such acids. The copolymer of acrylic derivative is a polymer of: a first monomer of at least one of a group of monofunctional monomers of acrylic derivatives each having at least one hydroxyl group at a terminal thereof and a polymerizable unsaturated double bond; and a second monomer of at least one of a group of multifunctional monomers of acrylic derivatives each having plural polymerizable unsaturated double bonds.
    Type: Application
    Filed: May 31, 2002
    Publication date: April 24, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazumitsu Honda, Nario Niibo, Yuichiro Tsubaki, Junji Ozaki
  • Patent number: 6517892
    Abstract: A solid electrolytic capacitor comprising (1) an electrically conducting polymer composition formed on the surface of an oxide film which is formed on a valve-acting metal, by specifying the viscosity of an oxidizing agent solution and/or a monomer solution, particularly by specifying the viscosity to less than about 100 cp, (2) an electroconducting polymer composition formed on the surface of an oxide film layer which is formed on a valve-acting metal, wherein the electroconducting polymer layer comprising a monomer compound or a derivative thereof as a repeating unit and also containing an anionic dopant is polymerized by setting the humidity in the atmosphere to from about 10% to less than about 60%; (3) an anode body having provided on the outer surface thereof a solid electrolyte formed of an electrically conducting polymer containing a lamellar structure, wherein the solid electrolyte provided on the dielectric film formed on a valve acting metal occupies from about 10 to about 95% of the space in a por
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: February 11, 2003
    Assignee: Showa Denko K.K.
    Inventors: Atsushi Sakai, Ryuji Monden, Toru Sawaguchi, Katsuhiko Yamazaki, Yuji Furuta, Hideki Ohata
  • Patent number: 6514296
    Abstract: A dry preunit (10), includes a plurality of cells (110, 112, 114) in a true bipolar configuration, which are stacked and bonded together, to impart to the device an integral and unitary construction. Each cell (114) includes two electrically conductive electrodes (111A, 111B) that are spaced apart by a predetermined distance. The cell (114) also includes two identical dielectric gaskets (121, 123) that are interposed, in registration with each other, between the electrodes (111A, 11B), for separating and electrically insulating these electrodes. When the electrodes (111A, 111B), and the gaskets (121, 123) are bonded together, at least one fill gap (130) is formed for each cell. Each cell (114) also includes a porous and conductive coating layer (119, 120) that is formed on one surface of each electrode. The coating layer (119) includes a set of closely spaced-apart peripheral microprotrusions (125), and a set of distally spaced-apart central microprotrusions (127).
    Type: Grant
    Filed: October 19, 1998
    Date of Patent: February 4, 2003
    Assignee: Pacific ShinFu Technologies Co., Ltd.
    Inventors: K. C. Tsai, Gary E. Mason, Mark L. Goodwin, Nazir Ahmad, Davy Wu, Douglas Cromack, Robert R. Tong, James M. Poplett, Ronald L. Anderson, James P. Nelson, Alan B. McEwen
  • Patent number: 6495021
    Abstract: A dendritic sponge which is directionally-grown on a substrate material has a high surface to volume ratio and is suitable for forming anodes for highly efficient capacitors. A dielectric film is formed on the sponge surface by oxidizing the surface. In a preferred embodiment, the dielectric is grown on titanium sponge and is doped with oxides of Ca, Mg, Sr, Be, or Ba to improve the film's dielectric constant or with higher valent cations, such as Cr6+, V5+, Ta5+, Mo6+, Nb5+, W6+, and P5+, to reduce the oxygen vacancy concentration and leakage current of the dielectric film. A capacitor formed from the sponge includes a cathode electrolyte which serves as an electrical conductor and to repair the dielectric film by re-oxidizing the anode surface at areas of local breakdown. Sponges of titanium, tantalum, and aluminum form efficient dielectric films.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: December 17, 2002
    Assignee: Case Western Reserve University
    Inventors: Gerhard Welsch, Donald McGervey
  • Patent number: 6454817
    Abstract: Disclosed is a method for manufacturing a solid electrolytic capacitor using a functional polymer composition. The method comprises immersing the rolled aluminum electrolytic capacitor device in polyaniline solution with high electric conductivity to impregnate the device with polyaniline, drying the impregnated device in a drying oven which is maintained at constant temperature to fully remove the solvent, inserting the dried device to a capacitor aluminum can and then sealing with epoxy resin, to manufacture a solid electrolytic capacitor using a functional polymer. As such, the impregnation can be performed well at not only normal temperature and pressure, but also high temperature and reduced pressure. The solid electrolytic capacitor has the advantages of high capacity, low impedance and low ESR, and also, low manufacturing cost, simple processes and high reliability.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: September 24, 2002
    Assignee: Samwha Electric Co., Ltd.
    Inventors: Dal-Woo Shin, Jong-Joo Park, Young-Hoon Lee, Yong-Chul Kim, Sung-Ho Kim
  • Patent number: 6447838
    Abstract: A Ti/TiN adhesion/barrier layer is formed on a substrate and annealed. The anneal step is performed at a temperature within a good morphology range of 100° C. above a base barrier anneal temperature that depends on the thickness of said barrier layer. The base barrier anneal temperature is about 700° C. for a barrier thickness of about 1000 Å and about 800° C. for a barrier thickness of about 3000 Å. The barrier layer is 800 Å thick or thicker. A first electrode is formed, followed by a BST dielectric layer and a second electrode. A bottom electrode structure in which a barrier layer of TiN is sandwiched between two layers of platinum is also disclosed. The process and structures also produce good results with other capacitor dielectrics, including ferroelectrics such as strontium bismuth tantalate.
    Type: Grant
    Filed: October 16, 1995
    Date of Patent: September 10, 2002
    Assignees: Symetrix Corporation, Matsushita Electric Industrial Co., Ltd.
    Inventors: Masamichi Azuma, Eiji Fujii, Yasuhiro Uemoto, Shinichiro Hayashi, Toru Nasu, Yoshihiro Shimada, Akihiro Matsuda, Tatsuo Otsuki, Michael C. Scott, Joseph D. Cuchiaro, Carlos A. Paz de Araujo
  • Patent number: 6432509
    Abstract: A composite film for a film condenser, which comprises a biaxially oriented film made of polyethylene-2,6-naphthalenedicarboxylate as a main polymer component and an electrically conductive metal thin layer formed on the surface of the biaxially oriented film, wherein the number of flyspecks having an average diameter of 60 &mgr;m or greater in the surface of said biaxially oriented film is 20/m2 or less and the number of portions failing to satisfy a dielectric breakdown voltage of 200 V/&mgr;m (electrical insulation defects) in said composite film is 20/m2 or less, and a biaxially oriented film therefor. According to the present invention, there is provided a high-quality composite film for a film condenser, which has excellent physical properties and electric characteristics. Further, there is provided a very thin biaxially oriented film excellent in processability and surface properties and usable for the composite film.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: August 13, 2002
    Assignee: Teijin Limited
    Inventors: Koji Furuya, Shinya Watanabe, Hiroshi Kusume, Akira Kameoka
  • Patent number: 6428842
    Abstract: A process for producing an impermeable electrode for electrolytic capacitors, supercapacitors or batteries, with an impermeable conductive layer of graphite, which is deposited from a suspension comprising graphite at a concentration between 1 and 50 g/l in an organic solvent on a substrate by immersion for a given length of time of, for example, approximately 10 to 60 seconds and wherein, after the deposition, the substrate with the layer of graphite is dried at a temperature between approximately 80 and 150° C. for a given length of time of, for example, approximately 1 minute and, after the drying, is heat-treated at a temperature between approximately 200 and 450° C. for a given length of time of, for example, approximately 5 to 60 minutes.
    Type: Grant
    Filed: July 20, 1999
    Date of Patent: August 6, 2002
    Assignee: Becromal S.p.A.
    Inventors: Giovanni Pietro Chiavarotti, Jean Constanti, Giuseppe Vono
  • Publication number: 20020084192
    Abstract: The present invention generally provides a method and an apparatus for forming a doped metal film on a conductive substrate. In one aspect of the invention, the deposition process comprises first depositing a phosphorus doped seed layer on a conductive substrate, and then depositing a conductive metal layer on the phosphorus doped seed layer to form a conductive film. In another aspect, the invention provides a method of processing a substrate including depositing a dielectric layer on a substrate, etching a feature into the substrate, depositing a conductive layer in the feature, depositing a phosphorus doped seed layer on the conductive barrier layer, and depositing a conductive metal layer on the phosphorus doped seed layer. In another aspect of the invention, an apparatus is provided that includes a phosphorus doped anode used for depositing a phosphorus doped metal film, such as a seed layer, in an electrochemical deposition process.
    Type: Application
    Filed: January 16, 2002
    Publication date: July 4, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Dan Maydan, Ashok K. Sinha
  • Patent number: 6413282
    Abstract: The invention has an object to reduce the impedance and to improve the responsiveness at high frequencies in an electrolytic capacitor having an conducting polymer layer as the cathode. A cathode current collector is directly joined with the surface of the dielectric of a valvular metal porous body for anode using an conducting polymer layer but not through various binding layers (for example, a carbon layer and a silver layer) thereby reducing the impedance. A cathode current collector is disposed adjacent and opposite to a porous valvular metal foil for anode. This structure ensures that the collecting area is enlarged. In this case, a cathode current collector may be directly joined with the surface of the dielectric of a valvular metal porous body for anode using an conducting polymer layer but not through various binding layers thereby reducing the total impedance.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: July 2, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masakazu Tanahashi, Emiko Igaki
  • Patent number: 6399012
    Abstract: Varistors are produced by pressing ceramic ZnO powder to provide discs, sintering the discs with microwave radiation, and firing outer electrodes with microwave radiation. The sintering has a maximum plateau temperature of 1000° C. to 1300° C. and the duration for ramping to this temperature and maintenance at this temperature is 120 to 180 minutes. These parameters also apply for multi-layer varistors with inner electrodes. The outer electrodes are fired at a maximum plateau temperature of 550° C. to 820° C. for a total duration of 40 to 45 minutes.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: June 4, 2002
    Inventors: Dinesh Agrawal, Ramesh Raghavendra, Balasubramaniam Vaidhyanathan
  • Publication number: 20020061362
    Abstract: A process for producing an impermeable electrode for electrolytic capacitors, supercapacitors or batteries, with an impermeable conductive layer of graphite, which is deposited from a suspension comprising graphite at a concentration between 1 and 50 g/l in an organic solvent on a substrate by immersion for a given length of time of, for example, approximately 10 to 60 seconds and wherein, after the deposition, the substrate with the layer of graphite is dried at a temperature between approximately 80 and 150 ° C. for a given length of time of, for example, approximately 1 minute and, after the drying, is heat-treated at a temperature between approximately 200 and 450° C. for a given length of time of, for example, approximately 5 to 60 minutes.
    Type: Application
    Filed: July 20, 1999
    Publication date: May 23, 2002
    Inventors: GIOVANNI PIETRO CHIAVAROTTI, JEAN CONSTANTI, GIUSEPPE VONO
  • Patent number: 6391379
    Abstract: The present invention relates to a method for making a solid electrolytic capacitor having a low equivalent series resistance by impregnating a porous capacitor pellet with conductive polymer. An oxidized pellet is dipped in a high concentration conductive polymer solution to deposit the polymer in doped (conductive) form. The solution also contains a crosslinking agent to prevent redissolution of the polymer when the pellet is re-dipped. After dipping, the solvent in the polymer solution is evaporated and a conductive film formed. In order to evaporate the solvent quickly, the solvent should have a boiling point of 80-220° C. and preferably a boiling point of 100-150° C. The conductive polymer film has a low resistivity (less than 1 ohm-cm, preferably less than 0.2 ohm-cm).
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: May 21, 2002
    Assignee: Kemet Electronics Corporation
    Inventors: Philip M. Lessner, Tsung-Yuan Su, Brian J. Melody, John T. Kinard, Veeriya Rajasekaran
  • Patent number: 6379402
    Abstract: This relates to a process for producing an electric double layer capacitor having a low resistance and a large capacitance of at least 10F, and it is an object to provide a process for producing a large capacitance electric double layer capacitor showing little self-discharge, little deterioration with time of the capacitance or little deformation of the cell. The above object is accomplished by forming an element by disposing a positive electrode and a negative electrode made mainly of a carbon material having a specific surface area of at least 500 m2/g to face each other with a separator interposed, impregnating it with a non-aqueous electrolyte, applying a voltage of from 1 to 1.5 times the rated voltage in a non-sealed state, further maintaining the element under reduced pressure and sealing a container accommodating the element.
    Type: Grant
    Filed: May 12, 2000
    Date of Patent: April 30, 2002
    Assignee: Asahi Glass Company, Limited
    Inventors: Manabu Suhara, Kazuya Hiratsuka
  • Patent number: 6377443
    Abstract: An electrolytic capacitor comprising a thermally treated anode prepared by heating a manganese dioxide coated porous anodized valve metal nitride anode to a temperature of about 325° C. to about 450° C. The anode may be heated to first temperature of about 200° C. to about 250° C. for a time sufficient for the valve metal nitride anode to reach thermal equilibrium, prior to increasing the temperature to about 325° C. to about 450° C.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: April 23, 2002
    Assignee: Kemet Electronics Corporation
    Inventors: Randolph S. Hahn, Brian J. Melody, John T. Kinard, David A. Wheeler