Abstract: A mounting region is provided at an approximately center of one surface of an insulating layer. A conductive trace is formed so as to outwardly extend from inside of the mounting region. A cover insulating layer is formed in a periphery of the mounting region so as to cover the conductive trace. A terminal of the conductive trace is arranged in the mounting region, and a bump of an electronic component is bonded to the terminal. A metal layer made of copper, for example, is provided on the other surface of the insulating layer. A pair of slits is formed in the metal layer such that a region being opposite to the electronic component is sandwiched therebetween. Each slit is formed so as not to divide the metal layer into a plurality of regions.

Abstract: An inkjet printing process for a circuit board includes the following procedures. Firstly, a substrate and a conductive layer disposed on the substrate are provided. Afterward, a roughening treatment is performed on the conductive layer so that the roughness of the conductive layer is between 0.1 ?m and 5 ?m. Then, a patterned mask layer is printed on the conductive layer for covering an area of the conductive layer prepared for forming a circuit pattern.

Abstract: Methods of using thin metal layers to make Carbon Nanotube Films, Layers, Fabrics, Ribbons, Elements and Articles are disclosed. Carbon nanotube growth catalyst is applied on to a surface of a substrate, including one or more thin layers of metal. The substrate is subjected to a chemical vapor deposition of a carbon-containing gas to grow a non-woven fabric of carbon nanotubes. Portions of the non-woven fabric are selectively removed according to a defined pattern to create the article. A non-woven fabric of carbon nanotubes may be made by applying carbon nanotube growth catalyst on to a surface of a wafer substrate to create a dispersed monolayer of catalyst. The substrate is subjected to a chemical vapor deposition of a carbon-containing gas to grow a non-woven fabric of carbon nanotubes in contact and covering the surface of the wafer and in which the fabric is substantially uniform density.

Abstract: A wired circuit board and a producing method thereof are provided which can precisely form an insulating layer and reduce transmission loss with a simple layer structure and also features excellent long-term reliability by preventing the occurrence of an ion migration phenomenon between a ground layer and a positioning mark layer, and the insulating layer to improve the adhesion therebetween and the conductivity of a conductor. A metal supporting board is prepared and a first metal thin film is formed on the metal supporting board. A resist is formed in a pattern and a ground layer and a positioning mark layer are formed on the first metal thin film exposed from the resist at the same time. A second metal thin film is formed over the ground layer and the positioning mark layer, then the resist is removed. An insulating base layer is formed on the first metal thin film including the upper surface of the second metal thin film, thereafter, a conductive pattern is formed on the insulating base layer.

Abstract: The range of selection of the material for a primary substrate and the material for a resin mask in a secondary substrate can be broadened, and short circuiting of a circuit can be reliably prevented. The shape of a primary substrate (1) is such that a circuit forming face (11) is in a convex form and a circuit non-forming face (12) is in a concave form, the difference in level between the circuit forming face (11) and the circuit non-forming face (12) is 0.05 mm, and the angle of side walls (13, 14) connecting the circuit forming face to the circuit non-forming face is 90°. In order to apply a catalyst, a palladium catalyst solution was immersed in a bath having a water depth of 500 mm at a liquid temperature of 40° C. for 5 min. Thereafter, a resin mask (3) is dissolved and removed, followed by electroless plating. As a result, the catalyst solution penetrates up to a part in which the creeping distance could have been increased, that is, up to both side walls (13, 14).

Abstract: A method of fabricating a circuit board includes the following steps. First, a patterned metal board is provided. The patterned metal board includes a patterned circuit having at least a pad. Next, a dielectric layer is formed on the patterned metal board to cover the patterned circuit. Thereafter, a processing treatment is preformed on a surface of the patterned metal board in which the surface is opposite to the patterned circuit, such that at least a conductive joint column disposed on the pad and a circuit layer having the patterned circuit are formed. Afterwards, a solder mask layer is formed on the dielectric layer to cover the circuit layer, such that the solder mask layer is in contact with the conductive joint column, the conductive joint column passes through the solder mask layer, and a height of the conductive joint column exceeds a thickness of the solder mask layer.

Abstract: Printed wiring board for generally reducing electro-magnetic, capacitive and inductive cross coupling and cross talk in electrical circuits, electronic modules, and systems utilizing dissipative carbon layers residing between layers of conventional analog, digital, radio frequency (RF), or assemblies of mixed circuitry printed wiring constructions. Connection between layers by the use of insulated vias is possible when connection to the carbon layer is not desired.

Abstract: There is provided a circuit board to which a solder ball composed of a lead (Pb)-free solder is to be connected, a semiconductor device including an electrode and a solder ball composed of a lead (Pb)-free solder disposed on the electrode, and a method of manufacturing the semiconductor device, in which mounting reliability can be improved by enhancing the bonding strength (adhesion strength) between the solder ball composed of a lead (Pb)-free solder and the electrode.

Abstract: Provided is a method of manufacturing a printed circuit board. In an embodiment, the method includes forming a prepreg layer via a reel method, forming a conductive film for forming a circuit pattern on at least one surface of the prepreg layer; and forming a predetermined circuit pattern on the conductive film. In an embodiment, the prepreg layer has a thickness of at most about 0.15 mm and contains a fiber material and a resin material. In an embodiment, the content of the resin material in the prepreg layer is about 70% or less by volume. In an embodiment, the prepreg layer is composed of at least one prepreg layer.

Abstract: A method for patterning a surface includes providing a first layer of mechanically deformable material having a first surface. A second layer of mechanically deformable material is placed on the first surface. At least a portion of the second layer is controllably displaced to form at least one patterned void through the second layer.

Abstract: In a method of preparing a circuit pattern on a printed circuit board, reflow wiring is performed by printing the circuit pattern on an insulative board with an electroconductive coating material and printing a cream solder in a wiring pattern portion of the circuit pattern to form a metal conductor. Other portions of the printed, electroconductive coating material are arranged to function as any one of a resistor (R), a capacitor (C), and a coil (L), by taking advantage of the resistance and electrostatic capacitance of the electroconductive coating material.

Abstract: A method for the attachment of solder powder includes the steps of treating an exposed metallic surface of an electronic circuit board with a tackifier compound, thereby imparting tackiness to the metallic surface to form a tacky part, and supplying the tacky part with a solder powder slurry suspended in a liquid, thereby inducing attachment of the solder powder. A method for the production of a soldered electronic circuit board, includes the steps of treating an exposed metallic surface of an electronic circuit board with a tackifier compound, thereby imparting tackiness to the metallic surface to form a tacky part; supplying the tacky part with a solder powder slurry suspended in a liquid, thereby inducing attachment of the solder powder, and thermally fusing the attached solder powder, thereby forming a circuit.

Abstract: An auto-calibration circuit or label (20) being adapted to be used with different first and second instruments. The first instrument being different from the second instrument. The auto-calibration label comprising first and second plurality of electrical connections. The first electrical connections conveys first instrument encoded-calibration information (82) corresponding to a sensor The first instrument information is adapted to be utilized by the first instrument to auto-calibrate for the first sensor The first plurality of electrical connections includes contact areas. The second electrical connections conveys second encoded-calibration information (84) corresponding to the first sensor The second information is adapted to be utilized by the second instrument to auto-calibrate for the sensor The second electrical connections includes a second plurality of contact areas, which are distinct from the first contact areas.

Abstract: A method of preventing adhesive bleed onto the metal (e.g., gold) surfaces of a plurality of electrical conductors (e.g., wire-bond pads) positioned on a dielectric substrate when positioning an electronic component onto the dielectric substrate and electrically coupling (e.g., wire-bonding) the component to the metal surfaces. The method includes contacting the metal surfaces with a chemical composition which comprises a minor amount of a surface active agent (e.g., a thiol) and the remainder substantially being a non-reactive solvent (e.g., methanol). A circuitized substrate produced using this method is also provided.

Abstract: In general, the present invention provides an interconnect structure and method for forming the same. This present invention discloses an interconnect structure includes a Cu seeding layer embedded between a diffusion barrier layer and a grain growth promotion layer. Specifically, under the present invention, a diffusion barrier layer is formed on a patterned inter-level dielectric layer. A (Cu) seeding layer is then formed on the diffusion barrier layer, and a grain growth promotion layer is formed on the seeding layer. Once the grain growth promotion layer is formed, post-processing steps (e.g., electroplating and chemical-mechanical polishing) are performed.

Abstract: Systems and methods for forming conductive traces on plastic substrates. In one embodiment, conductive traces are formed by forming a polyelectrolyte layer on a polymeric substrate and growing conductive traces on the polyelectrolyte layer using an electroless plating process.

Abstract: An interferometric modulator is formed by a stationary layer and a mirror facing the stationary layer. The mirror is movable between the undriven and driven positions. Landing pads, bumps or spring clips are formed on at least one of the stationary layer and the mirror. The landing pads, bumps or spring clips can prevent the stationary layer and the mirror from contacting each other when the mirror is in the driven position. The spring clips exert force on the mirror toward the undriven position when the mirror is in the driven position and in contact with the spring clips.

Abstract: Conductive micro traces (64) are formed on a coated or uncoated substrate (28) in order to achieve a combination of target optical properties and target electrical capabilities. For the coated substrate, the coating (100) may be formed before or after the conductive micro traces. The coating may be designed for providing IR filtering or reductions in reflected light and color shift, while the conductive micro traces may be used for EMI shielding or to provide current-carrying capability, such as when used as heaters. In another embodiment, the conductive micro traces are formed on an uncoated flexible transparent substrate and have a width of less than 25 microns, such that the conductive micro traces are capable of achieving their intended purpose while maintaining a high visible light transmissivity. The conductive micro traces may be formed using various approaches, such as the use of electroplating techniques or the use of inkjet printing techniques.

Abstract: [Object] To provide a multilayer assembly that excels in pore properties, is flexible, and is satisfactorily handled and processed; and a method of producing the multilayer assembly. [Solving Means] A multilayer assembly includes a base and, arranged on at least one side thereof, a porous layer and has a large number of continuous micropores with an average pore diameter of 0.01 to 10 ?m. The multilayer assembly suffers from no interfacial delamination between the base and the porous layer when examined in a tape peeling test according to the following procedure: Tape Peeling Test A 24-mm wide masking tape [Film Masking Tape No. 603 (#25)] supplied by Teraoka Seisakusho Co., Ltd. is applied to a surface of the porous layer of the multilayer assembly and press-bonded thereto with a roller having a diameter of 30 mm and a load of 200 gf to give a sample; and the sample is subjected to a T-peel test with a tensile tester at a peel rate of 50 mm/min.

Abstract: The invention concerns a process for the production of an electrically conductive structure on a carrier substrate comprising at least two conductor track portions spaced in a region of a width b over the entire width b at between 500 ?m and 1 ?m and a multi-layer film body. A conductive layer in the form of the conductor track portions is produced on the surface of the carrier substrate. A metallic coating forming the electrically conductive structure is deposited on the conductive layer by application of a flow of current in an electrolyte which contains a dissolved coating metal. In the production of the conductive layer the conductive layer is additionally produced in the form of conductor track extensions which are arranged on both sides of the conductor track portions and which are convexly curved away from the oppositely disposed conductor track portion.

Abstract: A conductive paste, a printed circuit board using the conductive paste, and a method of manufacturing the printed circuit board are disclosed. A conductive paste that includes conductive particles, a polymer, and a polymer foam, can reduce the number of printing repetitions, to simplify the manufacturing process, decrease process times, and improve reliability.

Abstract: A coated copper is provided which inhibits the growth of whiskers and is composed of a copper substrate or a copper alloy substrate, a copper-diffused tin layer formed on the surface of the substrate, and a pure tin layer formed on the surface of the copper-diffused tin layer. The thickness of the copper-diffused tin layer is 55% or more with respect to the total thickness of the copper-diffused tin layer and the pure tin layer. Further, a printed wiring board is provided having a wiring pattern of the copper substrate or the copper alloy substrate, and a semiconductor device. Accordingly, the generation of long whiskers having a length exceeding 15 ?m which cause short circuits can be inhibited.

Abstract: Probe-based lithography, including: depositing a preceramic polymer on a substrate; writing nanoscale features in the polymer by locally transforming the preceramic polymer via a chemical reaction causing it to undergo a permanent phase change into hardened, ceramic material, the chemical reaction activated with a prescribed activation energy supplied by heat and/or pressure applied by a probe tip; then depositing new layers and continuing according to a desired three-dimensional pattern; either by (a) removing unactivated preceramic polymer utilizing a removal solvent, or (b) cross-linking unactivated preceramic polymer to act as a support medium that isolates a formed ceramic structure mechanically and/or electrically; and where the ceramic pattern is made electrically conductive by (a) incorporating dopant elements into or onto the preceramic polymer, or (b) performing the write step in a chemically-active environment that supplies dopant atoms during the chemical reaction.

Abstract: A process of an embedded circuit structure is provided. A complex metal layer, a prepreg, a supporting board, another prepreg and another complex metal layer are laminated together, wherein each of the complex metal layers has an inner metal layer and an outer metal layer stacked on the inner metal layer, the roughness of the outer surfaces of the inner metal layers is less than the roughness of the second outer surfaces of the outer metal layers, and the outer surfaces of the outer metal layers after laminating are exposed outwards. Each of two patterned photoresist layers is respectively formed on the outer surfaces of the outer metal layers. A metal material is created on portions of the outer surfaces of the outer metal layers not covered by the patterned photoresist layers to form two patterned circuit layers. The patterned photoresist layers are then removed to form a laminating structure.

Abstract: A method for manufacturing a semiconductor package is proposed. A circuit board with a circuit layer on at least one surface thereof is provided. The circuit board has at least one free area, and the circuit layer has a plurality of electrically connecting pads distributed on the periphery of the free area. A metal protecting layer is plated on the electrically connecting pads by non-plating line. The free area is removed, to form a cavity penetrating the circuit board. The present invention prevents burrs which may otherwise form on the periphery of a cavity, to increase the yield and throughput.

Abstract: A surface treating method for metallizing the surface of a polymer containing silicon by the use of a non-expensive material and a method for metallizing the surface of or forming a pattern of a metal layer such as a wiring on the surface of a substrate comprising an arbitrary material, or a method for producing fine particles of a specific transition metal are provided. The method for treating the surface of a silicon-containing polymer or a method for preparing fine transition metal particles involves contacting an organosilicon compound with a solid, a solution or a suspension of a specific transition metal salt, to reduce and precipitate the transition metal and thereby precipitate fine particles of the transition metal on the surface of said organosilicon compound or in the organosilicon compound.

Abstract: A method for printing electrically conductive circuits is disclosed. The method comprises the steps of providing a substrate, printing a circuit design on the substrate, providing a film having a conductive layer, selectively transferring portions of the conductive layer of the film to the printed circuit design on the substrate, optionally removing any remaining release coat and optionally applying a protective overcoat. The method of the present invention is particularly useful for creating flexible circuits.

Abstract: A patterned organic monolayer or multiplayer film self-assembled on a solid substrate, the pattern consisting in a site-defined surface chemical modification non-destructively inscribed in the organic monolayer or multilayer by means of an electrically biased conducting scanning probe device, stamping device and/or liquid metal or metal alloy or any other device that can touch the organic monolayer or multilayer surface and inscribe therein a chemical modification pattern upon application of an electrical bias.

Abstract: An object of the present invention is to provide a wiring module that enables dense mounting and a reduction in wiring distance. The wiring module in accordance with the present invention includes a base material, a plurality of electronic circuit parts, insulating portions, and conductive portions connected to the electronic circuit parts, the plurality of electronic circuit parts, the insulating portions, and the conductive portions being integrally held on the base material. Wires are composed of a stack of the conductive portions and extend in a direction crossing a surface of the base material and in a direction crossing a direction perpendicular to the base material surface to electrically connect the plurality of electronic circuit parts together.

Abstract: A method of producing a multilayered wiring board having at least two wiring layers (wiring patterns 17, 31), polyamide 22 (an interlayer insulation film) between the wiring layers, and an interlayer conducting post (a conductor post) 18 for conducting between the wiring pattern 17 and the wiring pattern 31, wherein the polyimide 22 is disposed around the interlayer conducting post 18 using a liquid drop discharge system.

Abstract: A method of manufacturing a wiring substrate of the present invention includes the steps of, preparing a laminated body having such a structure that a peelable metal foil in which a lower metal foil and an upper metal foil are laminated peelably and an opening portion is provided on a peripheral side is pasted onto a supporting body, forming a through hole having a diameter smaller than the opening portion by processing a portion of the supporting body on an inner side of the opening portion to obtain a reference hole having a projection portion in an inside, forming a resin layer on the peelable metal foil and the projection portion in the reference hole to cover a side surface of the opening portion, and then forming a build-up wiring on the resin layer, removing portions of the build-up wiring and the laminated body corresponding to an area containing the opening portion to expose a peeling boundary of the peelable metal foil, peeling the upper metal foil from the lower metal foil at a boundary to separate

Abstract: Methods of reducing the intrusions or migrations of photolithography materials by introducing a sol-gel layer onto a porous thin film prior to applying the photolithography/photoresist material layer. Curing the sol-gel layer results in the sol-gel layer merging or unifying with the underlying porous thin film layer so that the combined sol-gel/thin layer exhibits substantially the same properties as the untreated porous thin film layer before the sol-gel was applied. As a result, a greater etching accuracy is achieved.

Abstract: A droplet ejection patterning method of ejecting a dispersion formed by dispersing a convectable dispersoid in a dispersion medium onto a substrate including a lyophilic region and a lyophobic region. Due to a concentration difference of the dispersion, the dispersoid convects within the dispersion medium toward the edges of the dispersion to form narrow lines of the dispersoid without using photolithography.

Abstract: Patterned articles can be prepared by applying a release polymer to a substrate in a desired pattern, applying a substrate-adherent polymer over the pattern and substrate, and mechanically removing the substrate-adherent polymer from the pattern without requiring solvent. Suitable mechanical removal methods include applying adhesive tape to the substrate-adherent polymer and peeling the tape and substrate-adherent polymer away from the pattern, and abrading the substrate-adherent polymer from the pattern using impact media.

Abstract: Disclosed is a process for applying a kinetic spray coating of powder particles onto a substrate covered in a plastic-type material without first removing the plastic-type material. In one use of the process a mask is used to enable a single kinetic spray pass to both remove the plastic covering and bind particles having average nominal diameters of from 60 to 250 microns to the underlying substrate. In another use of the process the particles have an average nominal diameter of from 250 to 1400 microns and the use of a mask is optional because the particles can penetrate the plastic material and bind directly to the substrate. The process finds special use in forming electrical connections or solderable pads anywhere along the length of a flexible circuit.

Abstract: A method of fabricating a liquid emission device includes a chamber having a nozzle orifice. Separately addressable dual electrodes are positioned on opposite sides of a central electrode. The three electrodes are aligned with the nozzle orifice. A rigid electrically insulating coupler connects the two addressable electrodes. To eject a drop, an electrostatic charge is applied to the addressable electrode nearest to the nozzle orifice, which pulls that electrode away from the orifice, drawing liquid into the expanding chamber. The other addressable electrode moves in conjunction, storing potential energy in the system. Subsequently the addressable electrode nearest to the nozzle is de-energized and the other addressable electrode is energized, causing the other electrode to be pulled toward the central electrode in conjunction with the release of the stored elastic potential energy.

Abstract: It consists of making a first engraving over a first face of a panel of electro-conducting material to form some reliefs and depressions corresponding to future tracks and intermediate tracks; subjecting said first face to a black oxide treatment (40); applying a layer of an adhesive material over said first face previously engraved and treated with black oxide; applying by injection moulding a dielectric material (20) over said previously engraved first face, treated and with the adhesive applied, covering said reliefs and filling said depressions; and carrying out a second selective engraving over a second face, opposite to the first one, of the mentioned panel to eliminate the material thereof corresponding to said future intermediate tracks, so that some finished tracks (16) remain insulated from each other, partially embedded on a face of said dielectric material (20) and separated by intermediate tracks (18).