With Posttreatment Of Coating Or Coating Material Patents (Class 427/97.4)
  • Publication number: 20090017275
    Abstract: A heat-releasing PCB and a method of manufacturing the PCB are disclosed. The method of manufacturing the heat-releasing printed circuit board includes: preparing a copper clad laminate, which has at least one copper layer stacked on at least one insulation layer; forming a coating layer, made from a paste having carbon nanotubes as a major constituent, on a surface of the copper layer; and forming a circuit pattern by removing portions of the coating layer and portions of the copper layer.
    Type: Application
    Filed: March 18, 2008
    Publication date: January 15, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Eung-Suek Lee, Je-Gwang Yoo, Chang-Sup Ryu, Jun-Oh Hwang, Jee-Soo Mok
  • Publication number: 20080241359
    Abstract: A method of making a circuitized substrate in which conductors are formed in such a manner that selected ones of the conductors include solder while others do not and are thus adapted for receiving a different form of connection (e.g., wire-bond) than the solder covered conductors. In one embodiment, the solder may be applied in molten form by immersing the substrate within a bath of the solder while in another the solder may be deposited using a screening procedure.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Norman A. Card, Robert J. Harendza, John J. Konrad, Tonya Mosher, Susan Pitely, Jose A. Rios
  • Patent number: 7425346
    Abstract: A method of forming a hybrid inorganic/organic dielectric layer on a substrate for use in an integrated circuit is provided, wherein the method includes forming a first dielectric layer on the substrate via chemical vapor deposition, and forming a second dielectric layer on the first dielectric layer via chemical vapor deposition, wherein one of the first dielectric layer and the second dielectric layer is formed from an organic dielectric material, and wherein the other of the first dielectric layer and the second dielectric layer is formed from an inorganic dielectric material.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: September 16, 2008
    Assignee: Dielectric Systems, Inc.
    Inventors: Chieh Chen, Atul Kumar, Yuri Pikovsky, Chung J. Lee
  • Patent number: 7399399
    Abstract: A method for manufacturing a semiconductor package is proposed. A circuit board with a circuit layer on at least one surface thereof is provided. The circuit board has at least one free area, and the circuit layer has a plurality of electrically connecting pads distributed on the periphery of the free area. A metal protecting layer is plated on the electrically connecting pads by non-plating line. The free area is removed, to form a cavity penetrating the circuit board. The present invention prevents burrs which may otherwise form on the periphery of a cavity, to increase the yield and throughput.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: July 15, 2008
    Assignee: Phoenix Precision Technology Corporation
    Inventors: E-Tung Chou, Che-Wei Hsu, Tzu-Sheng Tseng
  • Publication number: 20080023219
    Abstract: An electronic component having: a substrate, a lower conductor layer provided on the substrate; an inorganic dielectric film that covers the lower conductor layer; and an upper conductor layer having an upper electrode portion provided on the inorganic dielectric film. The lower conductor layer has a lower electrode portion that together with the upper electrode portion and the inorganic dielectric film constitutes a capacitor, and a coil portion that constitutes an inductor. The entire inorganic dielectric film is formed integrally, and the lower conductor layer is in contact only with the substrate, inorganic dielectric film, and upper conductor layer.
    Type: Application
    Filed: July 24, 2007
    Publication date: January 31, 2008
    Applicant: TDK CORPORATION
    Inventors: Toshiyuki Yoshizawa, Masahiro Miyazaki, Akira Furuya, Masaomi Ishikura, Hajime Kuwajima
  • Patent number: 7305761
    Abstract: A method for manufacturing a wiring substrate includes the steps of: (a) forming a ground layer precursor having reactive groups including nitrogen atoms in first and second areas of a substrate; (b) irradiating light energy to remove the reactive groups from the ground layer precursor to thereby form a ground layer charged in cathode; (c) patterning a cationic surface-active agent of anode to be left on the first area of the substrate with the ground layer as a ground; (d) providing a catalyst at the surface-active agent; and (e) forming a wiring along the first area of the substrate by precipitating a metal layer to the catalyst.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: December 11, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Satoshi Kimura, Hidemichi Furihata
  • Patent number: 7261916
    Abstract: A method of manufacturing a thin-film antenna is disclosed. A substrate is provided and coated with an organic material layer. After both of the substrate and organic material layer have been dried, a conductive layer is formed on both the substrate and the organic material layer. The organic material layer and the layer thereon are then removed so that the remaining conductive layer forms a thin-film antenna.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: August 28, 2007
    Assignee: Air Wave Co., Ltd.
    Inventors: Kun-Ta Lu, Hsin-Chun Lu, Han-Lun Lin