Coating Hole Wall Patents (Class 427/97.7)
  • Patent number: 6921505
    Abstract: An assembly is disclosed that includes an etched hole-fill standoff; a tooling plate contacting the etched hole-fill stand-off, the stand-off and tooling plate being aligned to each other; a device having holes to be filled removably contacting the stand-off, the stand-off and device being aligned to each other; the device and the stand-off each having at least one hole, the hole of the device being aligned with the hole of the stand-off. An assembly is also disclosed comprising an etched hole-fill standoff, the stand-off comprising an etched layer bonded to a non-etched layer. A method of filling holes in a substrate having a plurality of holes to be filled includes the steps of providing an etched hole-fill stand-off, aligning the stand-off to a tooling plate, aligning the substrate to the stand off and placing the substrate in contact with the stand-off, and filling the plurality of holes of the substrate.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: July 26, 2005
    Assignee: TTM Advanced Circuits, Inc.
    Inventors: Bruce W. Lee, Jesse L. Pedigo
  • Patent number: 6911229
    Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; a barrier layer located in the via opening; an interlayer of palladium and/or platinum on the barrier layer; and a layer of copper or copper alloy on the interlayer is provided.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: June 28, 2005
    Assignee: International Business Machines Corporation
    Inventors: Panayotis C. Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
  • Patent number: 6886248
    Abstract: The conductive material comprises a first metal material having a melting point of not more than 250° C. and a second metal material having a melting point of not less than 500° C., and is paste at a temperature not more than 250° C. Whereby the conductive material can have much higher conductivity than the resin paste. The conductive material can be used in paste, whereby the conductive material can be buried in the via-hole in the same way as the resin paste.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: May 3, 2005
    Assignee: Fujitsu Limited
    Inventors: Isao Watanabe, Kaoru Hashimoto, Osamu Taniguchi
  • Patent number: 6849294
    Abstract: A circuit pattern fabrication method of a printed circuit board includes: a first step of forming a resin layer at a surface of an insulation material; a second step of selectively removing the resin layer; a third step of forming a metal plated layer at the surface of the resin layer-removed portion of the insulation material to form circuit patterns and a connection pad; and a fourth step of forming a gold plated layer on the connection pad. By doing that, a fine circuit pattern can be easily formed.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: February 1, 2005
    Assignee: LG Electronics Inc.
    Inventor: Sung-Gue Lee