Abstract: A system and method is used to optimize print parameters in the printing of functional electronic materials and integrated objects. The method employs a grid pattern to determine drop spacing and further assigns priority to various features to be printed, separating features into layers to be printed. The most critical layers being printed with higher resolution and greater accuracy, the less critical layers being printed at lower resolution.

Abstract: A semiconductor device according to the present invention includes: an insulating substrate; a circuit pattern having a first surface that is bonded to a first main surface of the insulating substrate and a second surface opposite to the first surface on which a semiconductor element is bonded; a back surface pattern having a first surface that is bonded to a second main surface of the insulating substrate; and a heat dissipation plate bonded to a second surface of the back surface pattern opposite to the first surface of the back surface pattern. A curvature of a corner portion of the circuit pattern is greater than a curvature of a corner portion of the back surface pattern, and the corner portion of the circuit pattern is located inside the corner portion of the back surface pattern in a plan view.

Abstract: A thermally conductive sheet, comprising a curable resin composition, thermally conductive fibers, and thermally conductive particles, wherein the thermally conductive sheet has a compressibility of 40% or more.

Abstract: The present disclosure relates generally to Hf-comprising materials for use in, for example, the insulator of a RRAM device, and to methods for making such materials. In one aspect, the disclosure provides a method for the manufacture of a layer of material over a substrate, said method including a) providing a substrate, and b) depositing a layer of material on said substrate via ALD at a temperature of from 250 to 500° C., said depositing step comprising: at least one HfX4 pulse, and at least one trimethyl-aluminum (TMA) pulse, wherein X is a halogen selected from Cl, Br, I and F and is preferably Cl.

Abstract: In a layered structure having at least a substrate and a photosensitive resin layer or cured film layer formed on the substrate and containing an inorganic filler, the content of the inorganic filler in the photosensitive resin layer or cured film layer is low on the side contacting the substrate and high on the surface side away from the substrate, so that a linear thermal expansion coefficient of the photosensitive resin layer or cured film layer as a whole is maintained as low as possible. Preferably, the inorganic filler content in the layer gradually increases continuously obliquely or stepwise from the side contacting the substrate to the surface side away from the substrate. A photosensitive dry film containing the above-mentioned photosensitive resin layer is suitable for use as a solder resist or an interlayer resin insulation layer of a printed wiring board.

Abstract: A compliant printed flexible circuit including a flexible polymeric film and at least one dielectric layer bonded to the polymeric film with recesses corresponding to a target circuit geometry. A conductive material is printed in at least a portion of the recesses to form a circuit geometry. At least one dielectric covering layer is printed over at least the circuit geometry. Openings can be printed in the dielectric covering layer to provide access to at least a portion of the circuit geometry.

Abstract: An electromagnetic interference (EMI) shielded device which includes an object to be shielded and an EMI shielding material encompassing the object. The EMI shielding material is made up of, but not limited to a broadband biopolymer or polymer dissolved in organic solvents, and metal and carbon-based nano-powders or nanoparticles. The specific makeup of the shielding material and fabrication procedure of the shielding material is also included herein.

Abstract: A conductive material includes a first metal part whose main ingredient is a first metal; a second metal part formed on the first metal part and whose main ingredient is a second metal, the second metal having a melting point lower than a melting point of the first metal, which second metal can form a metallic compound with the first metal; and a third metal part whose main ingredient is a third metal, which third metal can make a eutectic reaction with the second metal.

Abstract: A fluid handling device includes a substrate, a film and a conductive layer. The substrate includes a through hole or a recess. The film includes first, second and third regions. The conductive layer is disposed on one surface of the film across the first, second and third regions. The first region of the film is bonded to one surface of the substrate such that one of openings of the through hole or an opening of the recess is closed to form a housing part, and that a part of the conductive layer is exposed to the inside of the housing part. The second region of the film is bent such that the conductive layer is located on an outside. The third region of the film is bonded to the first region of the film such that the conductive layer is exposed to the exterior.

Abstract: An integrated circuit package includes a packaging substrate with an electrical connection pad formed thereon and an integrated circuit die coupled to the electrical connection pad. The electrical connection pad includes an electroplated surface finish layer, but does not include an electrical trace configured as a plating tail. Because the electrical connection pad is free of a plating tail, signal degradation caused by the presence of plating tails in the integrated circuit package is avoided.

Abstract: Provided is a method of manufacturing a circuit board including preparing a board structural body (11) and covering a conductor circuit element (13) on an outermost layer of the board structural body (11) with a cover film (14), wherein a heat treatment is performed while having a release material (15) interposed between the cover film (14) and a heat-processing device. The release material (15) is a laminate at least including, sequentially from the cover film toward the heat-processing device, a low friction film (16) selected from an ultrahigh-molecular-weight polyethylene film and a polytetrafluoroethylene film, a first aluminum foil (17), a first high-density polyethylene film (18a), a second high-density polyethylene film (18b), and a second aluminum foil (19). The first high-density polyethylene film (18a) and the second high-density polyethylene film (18b) are positioned such that respective MD directions are perpendicular to each other.

Abstract: A disulfide compound represented by formula (1): (in formula (1), R1 and R2 each independently represent a hydrogen atom or an alkyl group; R3 and R4 each independently represent a hydrogen atom or a substituent; Y represents a single bond, —CO— or —COO—; Rf represents a linear or branched perfluoroalkylene group having 1 to 20 carbon atoms or a linear or branched perfluoroether group having 1 to 20 carbon atoms; when Y is a single bond or —CO—, n represents 0 and m represents an integer of 0 to 6; when Y is —COO—, n represents 1 or 2 and m represents an integer of 1 to 6; and p represents an integer of 2 or 3 and 1 represents an integer of 0 or 1 such that p+1=3).

Abstract: A composite comprising a first layer comprising a first material including nanoparticles dispersed therein, wherein the first material comprises a material capable of transporting charge, a second layer comprising a second material, and a backing element that is removably attached to the uppermost layer of the composite or the lowermost layer of the composite. In certain preferred embodiments, a least a portion of the nanoparticles include a ligand attached to a surface thereof. Methods are also disclosed. Products including a composite is further provided. Composite materials can be particularly well-suited for use, for example, in products useful in various optical, electronic, optoelectronic, magnetic, or catalytic devices.

Abstract: A secondary battery and to a circuit board for the secondary battery. The circuit board having a structure for enhancing the safety of a secondary battery, and a secondary battery with the same. The circuit board for a secondary battery includes an insulation layer, a terminal pad layer formed on the insulation layer, and a plating layer formed on the terminal pad layer. The thickness of the plating layer is greater than 20 micrometers. The plating layer is made of nickel. The secondary battery further includes a circuit protection device, and a bare cell electrically connected to the circuit protection device, wherein circuit protection device including a first lead plate electrically connected to the plating layer of the circuit board, the plating layer of the circuit board being made of the same material as that of the first lead plate of the circuit protection device.

Abstract: A manufacturing method of a circuit board comprises the following steps. Firstly, provide a first core layer, a second core material layer, and a central dielectric material layer. Secondly, press the first core layer, the second core material layer, and the central dielectric material layer to form a composite circuit structure. Thirdly, removing a portion of the central dielectric material layer located at a periphery of a pre-removing area and a portion of the second core material layer located at the periphery of the pre-removing area. Finally, remove a portion of the central dielectric material layer located within the pre-removing area and a portion of the second core material layer located within the pre-removing area to form a central dielectric layer and a second core layer.

Abstract: Methods and apparatus for performing molding on die on wafer interposers. A method includes receiving an interposer assembly having a die side and an opposite side including two or more integrated circuit dies mounted on the die side of the interposer, the interposer assembly having spaces formed on the die side of the interposer between the two or more integrated circuit dies; mounting at least one stress relief feature on the die side of the interposer assembly in one of the spaces between the two or more integrated circuit dies; and molding the integrated circuit dies using a mold compound, the mold compound surrounding the two or more integrated circuit dies and the at least one stress relief feature. An apparatus is disclosed having integrated circuits mounted on a die side of an interposer, stress relief features between the integrated circuits and mold compound over the integrated circuits.

Abstract: A read wiring trace and a write wiring trace are formed on an insulating layer. Connection terminals made of conductor are connected to the read wiring trace and the write wiring trace, respectively. Each connection terminal has at least one corner with a radius of curvature of not larger than 35 ?m.

Abstract: A display device includes a display panel, a top member, and a bottom member. The top member is disposed on the display panel. The bottom member is disposed under the display panel, and includes a plurality of layers. At least one of the layers has an opening at a bending region of the display device.

Abstract: A lamp assembly (1800) may include a circuit board (201), one or more light-emitting devices (100) disposed on the circuit board (201), a heat sink (600) in thermal contact with a surface of the circuit board (201), a gasket (700) with a first surface in mechanical contact with the circuit board (201), a bezel (800) a surface (805) of which is in mechanical contact with a second surface of the gasket (700), and one or more fasteners (901) that may apply a force between the bezel (800) and the heat sink (600). A lamp array (2100) may include two or more lamp assemblies (1800), not all of which supply illumination with the same spectral characteristic, and a bearing mount (2000) that may support each lamp assembly (1800) and allow each to be oriented rotationally. A supply circuit (2500, 2600) may include a nonlinear resistive element (2501, 2601).

Abstract: A thin-film wiring substrate includes a base B including a ceramic substrate having an upper surface and a wiring conductor provided on the upper surface of the ceramic substrate; a bonding layer and a thin-film wiring layer laminated in order on the upper surface of the ceramic substrate; and a through conductor that passes through the bonding layer in a thickness direction and electrically connects the wiring conductor to the thin-film wiring layer, Wherein the bonding layer includes a core layer composed of a thermosetting resin and adhesive layers respectively laminated on an upper surface and a lower surface of the core layer, the adhesive layers being composed of a thermosetting resin having an elastic modulus smaller than that of the thermosetting resin constituting the core layer.

Abstract: A semiconductor device, includes a semiconductor layer formed above a substrate; an insulating film formed on the semiconductor layer; and an electrode formed on the insulating film. The insulating film has a membrane stress at a side of the semiconductor layer lower than a membrane stress at a side of the electrode.

Abstract: A method including forming a copper pillar, electroplating a metal layer on a top surface and a sidewall of the copper pillar, and electroplating a metal cap above the top surface of the copper pillar in direct contact with the metal layer. The method further including forming an intermetallic by heating the metal layer and the copper pillar in a non-reducing environment, the intermetallic including elements of both the copper pillar and the metal layer, where molten solder will wet to the metal cap and will not wet to the intermetallic.

Abstract: A copolymer of DCPD-containing benzoxazine (DCPDBz) and cyanate ester resin forms a low-dielectric thermosetting polymeric material for making electronic components. A method of manufacturing the copolymer is also introduced. The method includes allowing DCPD-phenol oligomer, aniline, and paraformaldehyde to react at 110° C. for 6-12 hours before being extracted and baked to obtain DCPDBz; and mixing cyanate ester and the DCPDBz at 150° C.; heating the mixture up to 220° C.

Abstract: An interconnection substrate includes a plurality of electrically conductive elements of at least one wiring layer defining first and second lateral directions. Electrically conductive projections for bonding to electrically conductive contacts of at least one component external to the substrate, extend from the conductive elements above the at least one wiring layer. The conductive projections have end portions remote from the conductive elements and neck portions between the conductive elements and the end portions. The end portions have lower surfaces extending outwardly from the neck portions in at least one of the lateral directions. The substrate further includes a dielectric layer overlying the conductive elements and extending upwardly along the neck portions at least to the lower surfaces. At least portions of the dielectric layer between the conductive projections are recessed below a height of the lower surfaces.

Abstract: A method and system for a MEMS device is disclosed. The MEMS device includes a free layer, with a first portion and a second portion. The MEMS device also includes a underlying substrate, the free layer movably positioned relative to the underlying substrate. The first portion and second portion of the free layer are coupled through at least one stem. A sense material is disposed over portions of the second portion of the free layer. Stress in the sense material and second portion of the free layer does not cause substantial deflection of the first portion.

Abstract: A method for making low emissivity panels, comprising forming a patterned layer on a transparent substrate. The patterned layers can offer different color schemes or different decorative appearance styles for the coated panels, or can offer gradable thermal efficiency through the patterned layers.

Abstract: An electrical heating includes a plurality of electrical heating elements which are held by a housing and which abut heat conducting surfaces over which a medium to be heated flows. The electrical heating elements comprise contact lugs, arranged essentially at the same height, that are connected through a plate element. The plate element includes conductive paths and contact lug receptacles for the contact lugs. The plate element may include a carrier plate of non-conducting material and a stamped out metal plate that are joined together to form one unit. A method of manufacturing a plate element includes manufacturing the carrier plate by injection moulding and subjecting a metal plate to stamping operations to form area elements which are joined together by connecting ridges and in which the contact lug receptacles are located. The carrier plate and the metal plate are then joined, and the connecting ridges are then parted.

Abstract: The invention relates to a method for applying a photo-activated layered polymer coating to a substrate material in which one or more layers do not contain photoinitiator, or are not exposed to initiating light, but cure due to migration of cationic active centers. At least two separate monomer layers are applied to the substrate material. At least one of the monomer layers includes a photoinitiator capable of producing cationic active centers. The at least one layer including the photoinitiator is exposed to a source of UV radiation at a desired wavelength forming cationic active centers. The at least two separate monomer layers react in a polymerization reaction forming a cured layered material. The cationic active centers of the exposed monomer layer migrate to the unexposed layer such that both layers cure via the polymerization reaction.

Abstract: A communication device for a vehicle in which an RF device in the room mirror is connected electrically to a radiator included in a shade band is disclosed. The communication device for a vehicle includes an RF device in a room mirror and a radiator disposed in a shade band and connected electrically to the RF device.

Abstract: A method for producing a semiconductor device includes solder-connecting a semiconductor chip, onto an insulating substrate including a ceramic board and having conductor layers on two surfaces thereof, with a lead-free solder; warping a radiating base such that a surface of the radiating base on a side opposite to the insulating substrate is convex; and solder-connecting the insulating substrate onto the warped radiating base with the lead-free solder so as to provide a substantially flat solder-connected radiating base.

Abstract: In an aspect, a composite anode active material including lithium titanium oxide particles; and a TiN, and TiN a method of preparing the composite anode active material, and a lithium battery including the composite anode active material is provided.

Abstract: A novel electronic device is reported containing a host comprising an inorganic material with a band gap of less than 4 eV. The use of an inorganic material is advantageous due to its desirable physical properties, including increased stability and charge mobility.

Abstract: There is provided a method of manufacturing a thin-film device, the method including forming a first substrate on a supporting base by a coating method, the first substrate being formed by using a resin material; forming a second substrate on the first substrate by using any one of a thermosetting resin and energy ray-curable resin; forming an active element on the second substrate; and removing the supporting base from the first substrate. The resin material used to form the first substrate has a glass transition temperature of at least 180° C.

Abstract: The present invention provides a composition for developing a photoresist containing a carboxyl group (—COOH) and a method of developing a photoresist using the composition. The composition includes: a first solution including a salt containing a monovalent cationic component; and a second solution including a salt containing a bivalent cationic component. The composition for photoresist development is advantageous in that the developing depth of a photoresist can be controlled, and the developed surface of a photoresist is flat, thereby enabling the photoresist to be developed to realize precise three-dimensional packaging.

Abstract: A railcar includes a heat-resistant floor, and the heat-resistant floor includes a floor panel, a heat absorbing layer provided under the floor panel and configured to absorb heat, and a supporting plate configured to support the heat absorbing layer from below. The supporting plate includes contacting portions each configured to contact the heat absorbing layer and separated portions each continuously formed from the contacting portion in a railcar width direction, separated downward from the heat absorbing layer, and extending in a railcar longitudinal direction.

Abstract: The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating differential wiring patterns in multilayer glass-ceramic (MLC) modules. A structure and method of forming a MLC having layers with staggered, or offset, pairs of lines formed directly on one another are disclosed. In addition, a structure and method of forming a MLC having layers with staggered, or offset, pairs of lines that periodically reverse polarity are disclosed.

Abstract: The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating differential wiring patterns in multilayer glass-ceramic (MLC) modules. A structure and method of forming a MLC having layers with staggered, or offset, pairs of lines formed directly on one another are disclosed. In addition, a structure and method of forming a MLC having layers with staggered, or offset, pairs of lines that periodically reverse polarity are disclosed.

Abstract: A method is provided to produce an opto-electronic device comprising a substrate, a first electrode layer, a second electrode layer of opposite polarity to said first electrode layer, any interlayers and, between said first and second electrode layers, a first functional material in interfacial contact with a second functional material, wherein the first functional material has the structure of a laterally porous film and the second functional material is a film disposed over and interpenetrating with the film of the first functional material.

Abstract: A method of making an imprinted optical micro-channel structure for transmitting light to an optical receiver or receiving light from an optical transmitter includes forming a curable optical layer over a substrate and imprinting one or more optical micro-channels in the optical layer with a first stamp. The curable optical layer is cured to form a cured optical layer having the optical micro-channels imprinted in the cured optical layer. A curable light-transparent material is located in the optical micro-channels and cured to form light-pipes of cured light-transparent material in the optical micro-channels. The optical transmitter located in alignment with a light-pipe for transmitting light through the light-pipe or the optical receiver is located in alignment with a light-pipe for receiving light from the light-pipe.

Abstract: Provided in a dielectric ceramic having flat capacitance characteristics and a high dielectric constant, and a multilayer ceramic electronic component (such as a multilayer ceramic capacitor) in which the dielectric ceramic is used. A multilayer ceramic capacitor includes a multilayer body having a plurality of dielectric ceramic layers and a plurality of internal electrodes, and external electrodes formed on the multilayer body. The composition of the multilayer body includes any of a bismuth layered compound containing Sr, Bi and Ti, a bismuth layered compound containing Sr, Bi and Nb, and a bismuth layered compound containing Ca, Bi and Ti as a primary ingredient, Bi and at least one of Cu, Ba, Zn and Li, and satisfies the conditions that if the Ti content is 400 molar parts or the Nb content is 200 molar parts, then (Bi content-Ti content) or (Bi content-Nb content) is equal to or greater than 1 molar part and less than 7.

Abstract: The present description relates to the field of fabricating microelectronic transistors, including non-planar transistors, for microelectronic devices. Embodiments of the present description relate to the formation a recessed gate electrode capped by a substantially void-free dielectric capping dielectric structure which may be formed with a high density plasma process.

Abstract: A method of electroplating and depositing metal includes: providing an insulation substrate formed with conductive through holes; forming a first conductive layer on a first surface of the insulation substrate and forming a resist layer on a first portion of the first conductive layer, leaving a second portion of the first conductive layer uncovered by the resist layer as a to-be-plated area; disposing the insulation substrate in a first electroplating solution and depositing a first metal layer on the to-be-plated area; removing the resist layer and the portion of the first conductive layer; forming a second conductive layer on a second surface of the insulation substrate; forming a mask layer on the second conductive layer; disposing the insulation substrate in a second electroplating solution and depositing a second metal layer on the first metal layer of the to-be-plated area; and removing the mask layer and the second conductive layer.

Abstract: A surface mount electrical interconnect adapted to provide an interface between solder balls on a BGA device and a PCB. A socket substrate is provided with a first surface, a second surface, and a plurality of openings sized and configured to receive the solder balls on the BGA device. A plurality of electrically conductive contact tabs are attached to the socket substrate so that contact tips on the contact tabs extend into the openings. The contact tips electrically couple with the BGA device when the solder balls are positioned in the openings. Vias electrically couple the contact tabs to contact pads located proximate the second surface of the socket substrate. Solder balls are bonded to the contact pads to electrically and mechanically couple the electrical interconnect to the PCB.

Abstract: A coating for a conductor, the coating having a layered structure of a palladium layer. The palladium layer has a crystal plane whose orientation rate is 65% or more, which means 65% or more of the crystal planes of the palladium layer are aligned to this crystal plane. Preferably the crystal plane whose orientation rate is 65% or more in the coating is the (111) plane or (200) plane.

Abstract: The present invention provides a method for manufacturing a silicon substrate having texture structure, by which, in comparison with conventional methods, it is possible to reduce manufacturing step and form easily regular texture structure on silicon substrate surface. The method of the present invention comprises the steps of: (A) forming a pattern on the silicon substrate using a resin-comprising composition; (B) irradiating an etching gas to the silicon substrate surface other than the pattern portion; and (C) processing the silicon substrate irradiated with the etching gas with an alkaline etching fluid to form concave structure under the pattern portion. Furthermore, the present invention provides a resin-comprising composition usable in the method, in particular, a composition comprising photo-curable resin.

Abstract: A semiconductor memory device according to embodiments includes a semiconductor substrate and plural switching transistors provided on the semiconductor substrate. In the semiconductor memory device, a contact plug is embedded between adjacent two of the switching transistors, and is insulated from gates of the adjacent two switching transistors. The contact plug is also electrically connected to a source or a drain of each of the adjacent two switching transistors, and an upper surface of the contact plug is at a position higher than an upper surface of the switching transistors. A memory element is provided on the upper surface of the contact plug and stores data. A wiring is provided on the memory element.

Abstract: A high-sensitivity detector for opto-electronic detection using multiwall carbon nanotubes (MWCNTs) is provided. More specifically, multiwall carbon nanotube films demonstrate an infrared bolometric photoresponse higher than SWCNT films at room temperature. The observed D* exceeding 3.3×106 cm Hz1/2/W with MWCNT-film bolometers and can be further improved to over 1×107 cm Hz1/2/W by adding graphene flakes. The response time of about 1-2 milliseconds with MWCNT bolometers is more than an order of magnitude shorter than that of SWCNT bolometers. For individual MWCNTs with specially designed asymmetric Schottky contacts, one on the sidewall and the other covering the end, the photocurrent has been efficiently harvested and provides a higher detectivity of 6.2×109 cm·Hz1/2/W at room temperature, which is one order of magnitude higher than the convectional VOx detector and makes MWCNT competitive for practical optoelectronic detections over infrared and even longer wavelength range.

Abstract: A stress buffer sheet 10 is constituted by arranging external conductive layers 16A and 16B on the front and rear main surfaces of a through electrode layer 13. Columnar internal electrodes 14 are formed using a porous oxide base material 30 formed by anodic oxidation of valve metal; the oxide base material 30 is selectively removed after the internal electrodes 14 have been formed, and a resin 12 is filled in a resultant void space. The resin 12 has a small Young's modulus and can be deformed together with the internal electrode 14. In a structure having a wiring board 20 and an electronic component 24 connected through the stress buffer sheet 10, when stress acts on the joint portion during mounting of the electronic component 24, the whole of the through electrode layer 13 is deformed so that the stress is absorbed or released.

Abstract: A flex-rigid printed wiring board is provided which can retain flexibility of a flexible portion while increasing durability of the flexible portion against folding, and can ensure conduction in a rigid portion, and a method of manufacturing the printed wiring board. The flex-rigid printed wiring board includes a conductor layer provided on at least one face of a base film, one region of the wiring board containing the base film being a rigid region, an another region containing the base film being a flexible region. The average thickness “tf” of the conductor layer on the base film formed in the flexible region and the average thickness “tR” of the conductor layer on the base film formed in the rigid region satisfy the relationship of tf<tR.

Abstract: A method for preparing a device having a film on a substrate is disclosed. In the method, a film is deposited on a substrate. The film includes a first and a second metal. The first and the second metals in the film are converted to an intermetallic compound using microwave radiation. One example device prepared by the method includes a silicon substrate and a film on the substrate, wherein the film includes semiconducting copper germanide as the intermetallic compound.