Abstract: An optical disc having at least two metal-containing layers with different compositions and partially overlapping areal extents in the plane of the disc and method of forming the disc are described. The optical disc with dual metallization exhibits visually distinct regions suitable for use for identification purposes.

Abstract: Phase change memory materials and more particularly GeAs telluride materials useful for phase change memory applications, for example, optical and electronic data storage are described.

Abstract: A laminated structure is formed by stacking a first block member, an intermediate member, and a second block member together in this order, and then mutually joining each of the members. Further, by setting the elastic constant of the intermediate member to be greater than the elastic constants of the first block member and the second block member, deformation of grooves, which are formed in the first block member, is minimized.

Abstract: An article comprising a silicon-containing substrate, a silicide-containing bond coat layer overlying the substrate, and typically an environmental barrier coating overlaying the bond coat layer. An article is also provided wherein the environmental barrier coating comprises: (1) an optional inner silica scale layer overlaying the bond coat layer; (2) intermediate layer overlaying the inner silica scale layer, or the bond coat layer in the absence of the inner silica scale layer, and comprising mullite, or a combination of mullite with a barium strontium aluminosilicate, a yttrium silicate, or a calcium aluminosilicate; and (3) an outer steam-resistant barrier layer overlaying the intermediate layer and consisting essentially of an alkaline earth silicate/aluminosilicate. Processes are also provided for forming the silicide-containing bond coat layer over the substrate, followed by forming the environmental barrier coating over the bond coat layer.

Abstract: The present invention relates to wear-resistant mechanical parts.

Abstract: A layer sequence (400), comprising an aluminium layer (300), a nickel layer (301), and a nickel layer protection layer (302; 701). The aluminium layer (300) is formable on a substrate (200), the nickel layer (301) is formed on the aluminium layer (300), and the nickel layer protection layer (302; 701) is formed on the nickel layer (301).

Abstract: An article comprising a silicon-containing substrate, a silicide-containing bond coat layer overlying the substrate, and an environmental barrier coating (EBC) overlying the bond coat layer, wherein the EBC comprises a corrosion resistant outer layer comprising a corrosion resistant metal silicate. A process is also provided for forming the corrosion resistant outer layer over the silicide-containing bond coat layer.

Abstract: Tubular structures having aspect ratios of at least about 3 and comprising interior surfaces comprising substantially uniform coatings generated from a gaseous precursor material.

Abstract: A multilayer system and its production. Multilayer systems, such as those used as mirrors in the extreme ultraviolet wavelength range, suffer contamination or oxidation during storage in air and in long-time operation, i.e. when exposed to EUV radiation in a vacuum environment with certain partial pressures of water or oxygen, which causes a serious reduction in reflectivity. The multilayer system according to the invention will have a long life with constantly high reflectivity. Their reflectivity can be enhanced by barrier layers. The multilayer systems according to the invention have protective layers comprising iridium. The multilayer systems according to the invention are produced by direct, ion-beam-supported growth of the respective layer. The multilayer systems according to the invention are not only resistant to contamination and oxidation, but can also be cleaned if necessary, without losing reflectivity.

Abstract: Semiconductor wafers utilize asymmetric edge profiles (EP) to facilitate higher yield semiconductor device processing. These edge profiles are configured to reduce the volume of thin film residues that may form on a top surface of a semiconductor wafer at locations adjacent a peripheral edge thereof. These edges profiles are also configured to inhibit redeposition of residue particulates on the top surfaces of the wafers during semiconductor processing steps. Such steps may include surface cleaning and rinsing steps that may include passing a cleaning or rinsing solution across a wafer or batch of wafers that are held by a cartridge and submerged in the solution.

Abstract: A silicon semiconductor substrate has a structure possessing oxygen precipitate defects fated to form gettering sites in a high density directly below the defect-free region of void type crystals. The silicon semiconductor substrate is formed by heat-treating a silicon semiconductor substrate derived from a silicon single crystal grown by the Czochralski method or the magnetic field-applied Czochralski method and characterized by satisfying the relational expression (Oi DZ)?(COP DZ)?10 ?m wherein Oi DZ denotes a defect-free zone of oxygen precipitate crystal defects and COP DZ denotes a region devoid of a void type defect measuring not less than 0.11 ?m in size, and having not less than 5×108 oxygen precipitate crystal defects per cm3.

Abstract: A nanostructure is a porous body comprising a plurality of pillar-shaped pores and a region surrounding them, said region being an oxide amorphous region formed so as to contain C, Si, Ge or a material of a combination of them. Such a nanostructure can be used as functional material that can be used for light emitting devices, optical devices and microdevices. It can also be used as filter.

Abstract: There are provided a porous material and a process for producing the same. The porous material has a plurality of columnar pores and an area surrounding the pores, and the area is an amorphous area containing C, Si, Ge or a combination thereof.

Abstract: A blade with improved sharpness and durability is disclosed. The blade includes a base plate having an edge and a coating layer for coating the edge. The coating layer is formed of a material handling metal, and a tip of the coating layer is sharpened. It is preferred that an angle (Ba) between two tapered surfaces be between 15 to 45 degrees.

Abstract: According to various embodiments and aspects of the present invention, there is provided a dynamically tunable thin film interference coating including one or more layers with thermo-optically tunable refractive index. Tunable layers within thin film interference coatings enable a new family of thin film active devices for the filtering, control, modulation of light. Active thin film structures can be used directly or integrated into a variety of photonic subsystems to make tunable lasers, tunable add-drop filters for fiber optic telecommunications, tunable polarizers, tunable dispersion compensation filters, and many other devices.

Abstract: The present invention provides a method of fabricating a SiGe-on-insulator substrate in which lattice engineering is employed to decouple the interdependence between SiGe thickness, Ge fraction and strain relaxation. The method includes providing a SiGe-on-insulator substrate material comprising a SiGe alloy layer having a selected in-plane lattice parameter, a selected thickness parameter and a selected Ge content parameter, wherein the selected in-plane lattice parameter has a constant value and one or both of the other parameters, i.e., thickness or Ge content, have adjustable values; and adjusting one or both of the other parameters to final selected values, while maintaining the selected in-plane lattice parameter. The adjusting is achieved utilizing either a thinning process or a thermal dilution process depending on which parameters are fixed and which are adjustable.

Abstract: A hybrid optical recording disc having copy protection for use in a computer, including a read-only area having preformed information including at least one program and disc identifier data; a recordable area; and the disc identifier data being adapted to authenticate a transferred program in the computer to permit the program to be operated by the computer.

Abstract: This invention provides an SOI substrate manufacturing method using a transfer method (bonding and separation). A separation layer (12) is formed on a silicon substrate (11). A silicon layer (13), SiGe layer (14), silicon layer (15?), and insulating layer (21) are sequentially formed on the resultant structure to prepare a first substrate (10?). This first substrate (10?) is bonded to a second substrate (30). The bonded substrate stack is separated into two parts at the separation layer (12). Next, Ge in the SiGe layer (14) is diffused into the silicon layer (13) by hydrogen annealing. With this process, a strained SOI substrate having the SiGe layer on the insulating layer (21) and a strained silicon layer on the SiGe layer is obtained.

Abstract: A hybrid substrate, i.e., a substrate fabricated from different materials, and method for fabricating the same are presented. The hybrid substrate is configured for fabricating more than two different devices thereon, has a high thermal conductivity, and is configured for patterning interconnects thereon for interconnecting the different devices fabricated on the hybrid substrate.

Abstract: An imaging cell reduces recombination losses and increases sensitivity by forming a low resistance lateral path with a silicon germanium layer of a conductivity type that is sandwiched between silicon layers of the same conductivity type. The silicon germanium layer also provides a quantum well from which photo-generated electrons find it difficult to escape, thereby providing a barrier that reduces cross-talk.

Abstract: An electrically conductive wire coated with a curable coating composition that forms a cured coating having a high partial discharge resitance and good mechanical properties. A process for coating an electrically conductive wire with a curable coating composition and curing the coating composition to form a coating having high partial discharge resistance and good mechanical properties.

Abstract: A method for producing conductor coating on dielectric surface may be used in many areas of industry for preparation of dielectric surfaces for selective electroplating. Using this method, conductor coatings are obtained when dielectric items are etched in acidic solutions containing oxidizing agents, then treated in trivalent bismuth compound solution and additionally treated in sulphide solution.

Abstract: Ceramic-containing bodies can be bonded to other ceramic-containing bodies, or to metals or metal-containing bodies, by way of an aluminum-silicon brazing alloy. Such alloys feature high thermal conductivity and a melting range intermediate to Cu—Sil and Au—Si. By depositing a layer of silicon or aluminum, e.g., by vapor deposition, onto a surface of the ceramic-containing body, the formation of deleterious intermetallic phases at the brazing interface is avoided. This technique is particularly useful for joining reaction-bonded silicon carbide (RBSC) composite bodies, and particularly such composite bodies that contain appreciable amounts of aluminum as a metallurgical modification of the residual silicon phase. When the RBSC body contains minor amounts of the aluminum alloying constituent, or none, the metallization layer is not required. The resulting bonded structures have utility as mirrors, as packaging for electronics, and in semiconductor lithography equipment, e.g.

Abstract: A particle filter for microelectromechanical systems is provided that includes a particle trap formed on a substrate material. The particle trap includes an array of multidimensional geometric structures in an adjacent relationship. The geometric structures further define a plurality of multidimensional voids therebetween for trapping particles therein. The individual multidimensional geometric structures are formed by a plurality of vertically interconnected geometric shapes to define different configurations of voids between the adjacent geometric structures. In one embodiment of the filter system, an electrical bias is applied to the array of multidimensional geometric structures to facilitate attracting and trapping of particles in the filter.

Abstract: A thin film based nanoporous alumina template has been developed which allows the in situ removal of an electrically insulating alumina barrier layer at the pore bases. This barrier free nanoporous system has great utility for electrodeposition of a wide variety of nanowire materials. An exemplary multilayer thin film precursor is provided comprising Al (anodization layer), Ti (diffusion barrier) and Pt (active electrode) on a Si substrate. Aluminum anodization in sulfuric acid with a subsequent applied voltage ramping program produces a Pt electrode at the base of the nanopores without the additional steps of alumina removal, barrier layer dissolution, and metal deposition onto the pore bottoms.

Abstract: A bond pad structure formed over a predetermined area of an IC substrate comprising quickly and easily removable redundancy and passivation layers upon lithography and plasma etching in a plasma containing Cl2, the bond structure comprises: a liner or lower metal layer formed on a predetermined area of the IC substrate; an aluminum-based metal layer formed on the liner layer as the last metal layer for bond purposes; a tungsten based redundancy layer formed on top of the aluminum-based last metal layer; and a passivation layer formed over the IC substrate and on the tungsten based redundancy layer.

Abstract: A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implanted-ion rich region in the Si-containing substrate. The implanted-ion rich region has a sufficient ion concentration such that during a subsequent anneal at high temperatures a barrier layer that is resistant to Ge diffusion is formed. Next, a Ge-containing layer is formed on a surface of the Si-containing substrate, and thereafter a heating step is performed at a temperature which permits formation of the barrier layer and interdiffusion of Ge thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer.

Abstract: A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implant rich region in the Si-containing substrate. The implant rich region has a sufficient ion concentration such that during a subsequent anneal at high temperatures a barrier layer that is resistant to Ge diffusion is formed. Next, a Ge-containing layer is formed on a surface of the Si-containing substrate, and thereafter a heating step is performed at a temperature which permits formation of the barrier layer and interdiffusion of Ge thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer.

Abstract: A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implanted-ion rich region in the Si-containing substrate. The implanted-ion rich region has a sufficient ion concentration such that during a subsequent anneal at high temperatures a barrier layer that is resistant to Ge diffusion is formed. Next, a Ge-containing layer is formed on a surface of the Si-containing substrate, and thereafter a heating step is performed at a temperature which permits formation of the barrier layer and interdiffusion of Ge thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer.

Abstract: A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implant rich region in the Si-containing substrate. The implant rich region has a sufficient ion concentration such that during a subsequent anneal at high temperatures a barrier layer that is resistant to Ge diffusion is formed. Next, a Ge-containing layer is formed on a surface of the Si-containing substrate, and thereafter a heating step is performed at a temperature which permits formation of the barrier layer and interdiffusion of Ge thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer.

Abstract: Materials such as titanium are vapor-deposited to form a film on a substrate while the substrate is thermally coupled to a temperature-controlling thermal source. Varying the temperature conditions of the substrate when the film is deposited varies the intrinsic stress of the film, which varies the change in substrate shape caused by the presence of the film. A film having a desired intrinsic stress may be obtained by control of the substrate temperature when the film is deposited. A stress-controlled titanium film may be used, for example, as an adhesion layer between a silicon movable structure in an optical MEMS device and a gold layer serving as a reflecting surface.

Abstract: A diffusion barrier multi-layer structure for a TFT LCD by the LTPS process and the process for fabricating thereof are disclosed. By increasing the coarseness between two layers of the diffusion barrier multi-layer structure with a plasma treatment, or by forming a loose and porous impurity collecting layer between two layers of the diffusion barrier multi-layer structure to trap the impurity atoms, the impurity diffusion can be effectively obstructed.

Abstract: The prevent invention provides a partial discharge-resistant wire enamel composition wherein at least one fine particle sol selected from the group of metal oxide fine particle sol and silicon oxide fine particle sol is dispersed, and 3 to 100 parts by weight of at least one fine particle selected from the group of a metal oxide fine particle and a silicon oxide fine particle is contained per 100 parts by weight of wire enamel resin. Accordingly, the partial discharge-resistant wire enamel composition having excellent dispersibility of inorganic fine particle can be obtained.

Abstract: A method of forming a thin, high-quality relaxed SiGe-on-insulator substrate material is provided which first includes forming a SiGe or pure Ge layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to the diffusion of Ge. Optionally forming a Si cap layer over the SiGe or pure Ge layer, and thereafter heating the various layers at a temperature which permits interdiffusion of Ge throughout the first single crystal Si layer, the optional Si cap and the SiGe or pure Ge layer thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer. Additional SiGe regrowth and/or formation of a strained epi-Si layer may follow the above steps. SiGe-on-insulator substrate materials as well as structures including at least the SiGe-on-insulator substrate materials are also disclosed herein.

Abstract: A new capping multilayer structure for EUV-reflective Mo/Si multilayers consists of two layers: A top layer that protects the multilayer structure from the environment and a bottom layer that acts as a diffusion barrier between the top layer and the structure beneath. One embodiment combines a first layer of Ru with a second layer of B4C. Another embodiment combines a first layer of Ru with a second layer of Mo. These embodiments have the additional advantage that the reflectivity is also enhanced. Ru has the best oxidation resistance of all materials investigated so far. B4C is an excellent barrier against silicide formation while the silicide layer formed at the Si boundary is well controlled.

Abstract: A semiconductor device structure and method for manufacture includes a substrate having a top first layer of dielectric material; a second layer of material selected from the group including: amorphous Silicon (a-Si), amorphous Ge (a-Ge) or alloys thereof, located on top of the first layer; and, a third layer located on top of the a-Si, a-Ge, or alloys thereof layer, wherein the second layer provides adhesion between the first and third layers of the structure. Additionally, a semiconductor device structure and method for manufacture includes an insulating structure comprising a multitude of dielectric and conductive layers with respective a-Si, a-Ge, or alloys thereof bonding layers disposed to enhance adhesion between the different layers.

Abstract: A method of sputtering a Ta layer comprised of alpha phase Ta on a Cu layer. An embodiment includes a Ta sputter deposition on a Cu surface at a substrate temperature less than 200° C. Another embodiment has a pre-cooling step at a temperature less than 100° C. prior to Ta layer sputter deposition. In another non-limiting example embodiment, a pre-clean step comprising an inert gas sputter is performed prior to the tantalum sputter. Another non-limiting example embodiment provides a semiconductor structure comprising: a semiconductor structure; a copper layer over the semiconductor structure; a tantalum layer on the copper layer; the tantalum layer comprised alpha phase Ta; a metal layer on the tantalum layer.

Abstract: The invention uses iridium and iridium compounds as a protective capping layer on multilayers having reflectivity in the deep ultra-violet to soft x-ray regime. The iridium compounds can be formed in one of two ways: by direct deposition of the iridium compound from a prepared target or by depositing a thin layer (e.g., 5-50 angstroms) of iridium directly onto an element. The deposition energy of the incoming iridium is sufficient to activate the formation of the desired iridium compound. The compounds of most interest are iridium silicide (IrSix) and iridium molybdenide (IrMox).

Abstract: A turbine component comprises a substrate; and a crystalline coating disposed on a surface of the substrate, wherein the crystalline coating comprises tin and yttrium in an amount greater than or equal to about 0.05 atomic percent based upon the total coating. A method of making a turbine component comprises disposing a coating composition on a substrate, wherein the coating composition comprises tin and yttrium in an amount greater than or equal to about 0.1 atomic percent based upon the total coating composition. A crystalline coating comprises tin and yttrium in an amount greater than or equal to about 0.05 atomic percent based upon the total coating.

Abstract: A surface of an article is protected by coating the surface with a silicon-containing coating by preparing a coating mixture of silicon, a halide activator, and an oxide powder, positioning the surface of the article in gaseous communication with the coating mixture, and heating the surface of the article and the coating mixture to a coating temperature of from about 1150° F. to about 1500° F. The article is preferably a component of a gas turbine engine made of a nickel-base superalloy.

Abstract: A substrate including a base substrate, an interfacial bonding layer disposed on the base substrate, and a thin film adaptive crystalline layer disposed on the interfacial bonding layer. The interfacial bonding layer is solid at room temperature, and is in liquid-like form when heated to a temperature above room temperature. The interfacial bonding layer may be heated during epitaxial growth of a target material system grown on the thin film layer to provide the thin film layer with lattice flexibility to adapt to the different lattice constant of the target material system.

Abstract: A multilayer article includes a substrate that includes at least one of a ceramic compound and a Si-containing metal alloy. An outer layer includes stabilized zirconia. Intermediate layers are located between the outer layer and the substrate and include a mullite-containing layer and a chemical barrier layer. The mullite-containing layer includes 1) mullite or 2) mullite and an alkaline earth metal aluminosilicate. The chemical barrier layer is located between the mullite-containing layer and the outer layer. The chemical barrier layer includes at least one of mullite, hafnia, hafnium silicate and rare earth silicate (e.g., at least one of RE2SiO5 and RE2Si2O7 where RE is Sc or Yb). The multilayer article is characterized by the combination of the chemical barrier layer and by its lack of a layer consisting essentially of barium strontium aluminosilicate between the mullite-containing layer and the chemical barrier layer.

Abstract: According to various embodiments and aspects of the present invention, there is provided a dynamically tunable thin film interference coating including one or more layers with thermo-optically tunable refractive index. Tunable layers within thin film interference coatings enable a new family of thin film active devices for the filtering, control, modulation of light. Active thin film structures can be used directly or integrated into a variety of photonic subsystems to make tunable lasers, tunable add-drop filters for fiber optic telecommunications, tunable polarizers, tunable dispersion compensation filters, and many other devices.

Abstract: A surface-alloyed cylindrical, partly cylindrical or hollow cylindrical component consists of an aluminium matrix casting alloy (1) and a precipitation area (3) extending as far as the surface of the component (3) and consisting of an aluminium base alloy with precipitated hard phases. A eutectic area (2) (hereafter: “transition area”) which is supersaturated by primary hard phases is present between the matrix (1) and the precipitation area (3) and the increase in hardness from the matrix (1) to the component surface (3) is gradual.

Abstract: This invention includes a step of forming the first substrate which has a semiconductor region and an insulating region on its surface and a step of coating the first substrate with a single-crystal semiconductor layer. In the coating step, a single-crystal semiconductor is longitudinally grown in the semiconductor region and then laterally grown to manufacture a substrate.

Abstract: A semiconductor structure including a first substrate, and an epitaxial layer bonded to the substrate. The epitaxial layer has a threading dislocation density of less than 107 cm−2 and an in-plane lattice constant that is different from that of the first substrate and a second substrate on which the epitaxial layer is fabricated. In another embodiment, there is provided a method of processing a semiconductor structure including providing a first substrate; providing a layered structure including a second substrate having an epitaxial layer provided thereon, the epitaxial layer having an in-plane lattice constant that is different from that of the first substrate and a threading dislocation density of less than 107 cm−2; bonding the first substrate to the layered structure; and removing the second substrate.

Abstract: The present invention provides an optical information recording medium comprising a substrate including a groove that has a track pitch of 200 to 400 nm and a depth of 20 to 150 nm, the substrate having successively disposed thereon a light-reflective layer, a recording layer containing a dye and on which information is recordable by a laser beam having a wavelength of 600 nm or less, and a cover layer, wherein the recording layer contains at least two organic solvent-soluble compounds each having an absorption maximum in the range of 300 to 450 nm and a specific absorbance at a recording laser wavelength.

Abstract: A semiconductor device structure and method for manufacture includes a substrate having a top first layer of dielectric material; a second layer of material selected from the group including: amorphous Silicon (a-Si), amorphous Ge (a-Ge) or alloys thereof, located on top of the first layer; and, a third layer located on top of the a-Si, a-Ge, or alloys thereof layer, wherein the second layer provides adhesion between the first and third layers of the structure. Additionally, a semiconductor device structure and method for manufacture includes an insulating structure comprising a multitude of dielectric and conductive layers with respective a-Si, a-Ge, or alloys thereof bonding layers disposed to enhance adhesion between the different layers.

Abstract: A magnetoresistive thin-film magnetic element including a composite comprising an antiferromagnetic layer, a pinned magnetic layer, a nonmagnetic conductive layer, a free magnetic layer; hard bias layers for orienting the magnetic vectors of the free magnetic layer in a direction substantially orthogonal to the magnetization vector of the pinned magnetic layer; and a conductive layer for supplying a sense current is provided. The hard bias layers are provided at the two sides of the free magnetic layer. The hard bias layers and the free magnetic layers are in contact with each other at least partly. Bias underlayers are provided at the bottom of the hard bias layers.

Abstract: A practically realizable semiconductor magnetic body having a flat-band structure is disclosed. The semiconductor magnetic body is formed by semiconductor quantum dots arranged on lattice points such that electrons can transfer between neighboring quantum dots and the electron energy band contains a flat-band structure, where each quantum dot is a structure in which electrons are confined inside a region which is surrounded by high energy potential regions, and the flat-band structure is a band structure in which energy dispersion of electrons has hardly any wave number dependency.