Abstract: Methods of fabricating a metal contact structure for a laser diodes are provided, wherein the method comprises providing a UV transparent semiconductor substrate, a UV transparent semiconductor epilayer defining a ridge disposed between etched epilayer edges, the epilayer being disposed over the UV transparent semiconductor substrate, and a UV opaque metal layer disposed over the epilayer ridge, applying at least one photoresist layer (positive photoresist, image reversal photoresist, or negative photoresist) over the opaque metal layer and epilayer edges, and selectively developing regions of the photoresist layer via backside exposure to UV light with the opaque metal layer used as a photolithographic mask.

Abstract: Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pitch multiplication and the wider mask lines are formed by photolithography. The wider mask lines and are aligned so that one side of those lines is flush with or inset from a corresponding side of the narrow lines. Being wider, the opposite sides of the wider mask lines protrude beyond the corresponding opposite sides of the narrow mask lines. The wider mask lines are formed in negative photoresist having a height less than the height of the narrow mask lines. Advantageously, the narrow mask lines can prevent expansion of the mask lines in one direction, thus increasing alignment tolerances in that direction.

Abstract: Disclosed is a method of manufacturing a distributed feedback semiconductor laser device. In order to form a grating in only a channel, an etching mask, which is used when forming a ridge waveguide, is allowed to remain. A portion of sides of an ohmic contact layer is removed. A metal layer that remains at locations other than a location of the grating is removed by a lift-off method. According to an embodiment of the invention, a holographic exposure method or a nanoimprint method is used in forming a grating of the distributed feedback laser device, and the grating is formed in a self-aligned manner. The distributed feedback laser device that is manufactured according to the embodiment of the invention can be formed by using a technology and a structure that are suitable for mass production. Further, excellent reproducibility can be ensured and production costs can be decreased in the distributed feedback laser device, thereby complementing a disadvantage of an existing distributed feedback laser device.

Abstract: A method of manufacturing a printed circuit board is disclosed. The method includes: forming a relievo pattern and an intaglio pattern on a surface of a base plate; forming a metal plate, which has a metal pattern that corresponds with a shape of the relievo pattern and the intaglio pattern, by plating a surface of the relievo pattern and a surface of the intaglio pattern; separating the metal plate from the base plate; pressing the metal plate onto an insulation layer with the metal pattern facing the insulation layer; and removing a portion of the metal plate such that the metal pattern is exposed. Since this method does not use carriers, there is no need for a chemical etching process for carrier removal.

Abstract: Alignment tolerances between narrow mask lines, for forming interconnects in the array region of an integrated circuit, and wider mask lines, for forming interconnects in the periphery of the integrated circuit, are increased. The narrow mask lines are formed by pitch multiplication and the wider mask lines are formed by photolithography. The wider mask lines and are aligned so that one side of those lines is flush with or inset from a corresponding side of the narrow lines. Being wider, the opposite sides of the wider mask lines protrude beyond the corresponding opposite sides of the narrow mask lines. The wider mask lines are formed in negative photoresist having a height less than the height of the narrow mask lines. Advantageously, the narrow mask lines can prevent expansion of the mask lines in one direction, thus increasing alignment tolerances in that direction.

Abstract: A micro structure includes a seed electrode layer on a substrate and a plurality of conductive layers on the seed electrode layer. The combined thickness of the seed electrode layer and the plurality of conductive layers can be more than 0.1 mm and the lateral dimensions of the seed electrode layer and the plurality of conductive layers vary less than 20% along the direction normal to a surface of the substrate and the micro structure has striations on an outer surface.

Abstract: A polymer which has siloxane group at a main chain thereof and a composition including the same, for forming an organic anti-reflective coating layer are disclosed. The polymer for forming an organic anti-reflective coating layer is represented by following Formula. In Formula, R is hydrogen atom, C1˜C20 alkyl group, C1˜C10 alcohol group or epoxy group, R1 is independently hydrogen atom, n is an integer of 1-50, R2 is C1˜C20 alkyl group, C3˜C20 cycloalkyl group, C6˜C20 aryl group or C7˜C12 arylalkyl group, R3 is hydrogen atom, C1˜C10 alcohol group or epoxy group and POSS is a polyhedral oligosilsesquioxane.

Abstract: The invention includes methods of fabricating integrated circuitry and semiconductor processing polymer residue removing solutions. In one implementation, a method of fabricating integrated circuitry includes forming a conductive metal line over a semiconductor substrate. The conductive line is exposed to a solution comprising an inorganic acid, hydrogen peroxide and a carboxylic acid buffering agent. In one implementation, a method of fabricating integrated circuitry includes forming an insulating layer over a semiconductor substrate. A contact opening is at least partially formed into the insulating layer. The contact opening is exposed to a solution comprising an inorganic acid, hydrogen peroxide and a carboxylic acid buffering agent. In one implementation, a semiconductor processing polymer residue removing solution comprises an inorganic acid, hydrogen peroxide and a carboxylic acid buffering agent. Other aspects and implementations are contemplated.

Abstract: A near-field photoresist for formation of a fine pattern with by near-field exposure includes an alkali-soluble novalac resin, a diazyde-type photosensitizer which is photoreactive by near-field exposure, a photoacid generator which generates acid by the near-field exposure, and a solvent.

Abstract: The present invention provided an improvement to reduce an edge roughness during forming a small and fine pattern. Such and objective is to accomplish that after patterning a resist film, a coating film is formed on the resist film, so as to intermix the resist film material with the coating film material at the interface therebetween to reduce the edge roughness. There is provided a resist pattern-improving material, comprising: (a) a water-soluble or alkali-soluble composition, comprising: (i) a resin, and (ii) a crosslinking agent. Alternatively, The resist pattern-improving material, comprising (a) a water-soluble or alkali-soluble composition, comprising: (i) a resin, and (ii) a nonionic surfactant. According to the present invention, a pattern is prepared in the step, comprising: (a) forming a resist pattern; and (b) coating the resist pattern-improving material on the surface of the resist pattern.

Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 ?m) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.

Abstract: A system may provide an optical element including conductive material deposited on the optical element using a thick film process, dielectric material disposed on the conductive material and defining an aperture created using photolithography, the aperture exposing a portion of the conductive material, and a solar cell comprising an electrical contact coupled to the exposed portion of the conductive material. Some aspects provide deposition of conductive material on an optical element using a thick film process, deposition of dielectric material on the conductive material, creation of an aperture in the dielectric material using photolithography to expose a portion of the conductive material, and coupling of an electrical contact of a solar cell to the exposed portion of the conductive material.

Abstract: This disclosure relates to a system and method for fabricating and using a superlattice. A superlattice can be fabricated by applying alternating material layers on a ridge and then removing some of the alternating layers to expose edges. These exposed edges can be of nearly arbitrary length and curvature. These edges can be used to fabricate an array of nano-scale-width curved wires.

Abstract: A method of making a microelectromechanical system (MEMS) device is disclosed. The method includes forming a stationary layer and a moving layer spaced from the stationary layer. The method also includes forming at least one support structure configured to support the moving layer. Forming the at least one support structure includes forming a photoresist layer over the stationary layer and patterning the photoresist layer. Patterning the photoresist layer includes exposing the photoresist layer to light through a photomask. Then, the photoresist layer is first developed with a first developing solution for a first predetermined period of time after exposing. The first developing solution is removed after first developing. Subsequently, the photoresist layer is developed a second time with a second developing solution for a second predetermined period of time after removing the first developing solution. The second developing solution is removed after the second developing process.

Abstract: A method of patterning a transparent conductive film adaptive for selectively etching a transparent conductive film without any mask processes, a thin film transistor for a display device using the same and a fabricating method thereof are disclosed. In the method of patterning the transparent conductive film, an inorganic material substrate is prepared. An organic material pattern is formed at a desired area of the inorganic material substrate. A thin film having a different crystallization rate depending upon said inorganic material and said organic material is formed. The thin film is selectively etched in accordance with said crystallization rate.

Abstract: A method for post lithographic critical dimension shrinking of a patterned semiconductor feature includes forming an overcoat layer over a patterned photoresist layer, and removing portions of the overcoat layer initially formed over top surfaces of the patterned photoresist layer. The remaining portions of the overcoat layer on sidewalls of said patterned photoresist layer are reacted so as to chemically bind the remaining portions of the overcoat layer on the sidewalls.

Abstract: A method for forming hard mask patterns includes, sequentially forming first, second, and third hard mask layers formed of materials having different etching selectivities on a substrate, forming first sacrificial patterns having a first pitch therebetween on the third hard mask layer, forming fourth hard mask patterns with a second pitch between the first sacrificial patterns, the second pitch being substantially equal to about ½ of the first pitch, patterning the third hard mask layer to form third hard mask patterns using the fourth hard mask patterns as an etch mask, patterning the second hard mask layer to form second hard mask patterns using the third and fourth hard mask patterns as an etch mask, and patterning the first hard mask layer to form first hard mask patterns with the second pitch therebetween using the second and third hard mask patterns as an etch mask.

Abstract: An array substrate has regions in which an intermediate resist film thickness is formed and processed by an intermediate exposure amount which does not completely expose a resist, respectively on a drain electrode, source terminal, and a common connection wiring which are made of a second conductive film. Thin film patterns or a common wiring made of a first conductive film is formed in substantially entire regions on the bottom layers of the regions so that the heights from a substrate are substantially the same.

Abstract: An integrated circuit semiconductor device including a cell region formed in a first portion of a silicon substrate, the cell region including a first trench formed in the silicon substrate, a first buried insulating layer filled in the first trench, a first insulating pattern formed over the silicon substrate, and a first conductive pattern formed over the first insulating pattern. An overlay key region is formed in a second portion of the silicon substrate and includes a second trench formed in the silicon substrate, a second insulating pattern formed over the silicon substrate and used as an overlay key, and a second conductive pattern formed over the second insulating pattern and formed by correcting overlay and alignment errors using the second insulating pattern.

Abstract: In a manufacturing method of a flexible device, when a protective material is adhered onto a surface of a substrate, the adhesion is performed at only a part of the substrate. Since being adhered to the part of the substrate, the protective material is easily peeled away. As a result, the time required for peeling can be decreased, and cracking of the device which may occur in peeling can be prevented.

Abstract: Disclosed is a breathable heater element for a garment or for the lining of a garment such as an outdoor jacket, e.g. a waterproof jacket. The heater element is formed from porous metallised fabric such a nickel plated woven polyester fabric by photochemical etching of a suitable track pattern onto the metallised fabric. The formed heater element is then laminated into a lining. The material of the lining may be impregnated with microencapsulated functional chemicals such as fragrances, perfumes, antimicrobials or insect repellents. The microcapsules release their contents on activation due to heat generated by the heater element.

Abstract: A photoresist resin composition comprises about 10 to about 35% by weight of an acryl-based copolymer, about 5 to about 10% by weight of a quinone diazide compound, about 55 to about 80% by weight of a solvent, and about 0.01 to about 0.5% by weight of a silane-based surfactant where the weights of each of the acryl-based copolymer, quinone diazide compound, solvent, and silane-based surfactant are based on the total weight of acryl-based copolymer, quinone diazide compound, solvent, and silane-based surfactant. An overcoating layer formed using the photoresist resin composition has improved flatness, and thus defects on a display screen may be prevented and/or reduced.

Abstract: A method for forming fine patterns of a semiconductor device is provided, the method including forming a first lower layer pattern having a width of two minimum line width and a space pattern on a semiconductor substrate prior to a C-HALO implant process and etching the first lower layer pattern to separate into a second lower layer pattern having a width of two minimum line widths and a space pattern.

Abstract: It is very difficult to produce a negative wall angle from either negative or positive-tone chemically amplified resists, especially by e-beam lithography. This problem has now been overcome by first forming a photoresist pedestal in the conventional way, followed by flood exposing with electrons. Then, a second development treatment is given. This results in removal of additional material from the sidewalls, said removal being greatest at the substrate and least at the pedestal's top surface, resulting in negatively sloping sidewalls. Application of this method to a process for forming a pole tip for a vertical magnetic writer is also discussed.

Abstract: Anti-reflective materials such as bottom anti-reflective coatings (BARC's) and sacrificial light absorbing materials (SLAM) may be made more effective at preventing coherent light or electron beam reflection from a substrate by including in the anti-reflective material an additive to alter the radiation beam path of the reflected light or electrons. The radiation beam path altering additive may be a reflective material or a refractive material. The inclusion of such a radiation beam bath altering additive may reduce line width roughness and increase critical dimension (CD) control of interconnect lines and vias.

Abstract: An electroosmotic flow pump for generating a flow in an electrolyte from an inlet to an outlet in a channel, the electroosmotic flow pump comprising a housing with the channel for holding the ionic solution, a membrane separating the channel in a first part in contact with the inlet and a second part in contact with the outlet, the membrane comprising a plurality of perforations having inner surface parts with a finite zeta potential in an 130-160 mM aqueous electrolyte with pH value in the interval 7-7.5, one or more first electrodes in electrical contact with electrolyte held in the first part of the channel and one or more second electrodes in electrical contact with electrolyte held in the second part of the channel, means for creating an electric potential difference between the first and second electrodes.

Abstract: Pitch multiplied and non-pitch multiplied features of an integrated circuit, e.g., features in the array, interface and periphery areas of the integrated circuit, are formed by processing a substrate through a mask. The mask is formed by patterning a photoresist layer which simultaneously defines mask elements corresponding to features in the array, interface and periphery areas of the integrated circuit. The pattern is transferred to an amorphous carbon layer. Sidewall spacers are formed on the sidewalls of the patterned amorphous carbon layer. A layer of protective material is deposited and then patterned to expose mask elements in the array region and in selected parts of the interface or periphery areas. Amorphous carbon in the array region or other exposed parts is removed, thereby leaving a pattern including free-standing, pitch multiplied spacers in the array region.

Abstract: A resist pattern thickness reducing material has at least one type selected from a water soluble resin and an alkali-soluble resin. A process for forming a resist pattern includes a step for coating the resist pattern thickness reducing material such that the surface of a first resist pattern formed is covered and forming a mixing layer of the resist pattern thickness reducing material and the material of the resist pattern, on the surface of the resist pattern.

Abstract: The invention relates to a method of structuring of a substrate by providing a polymerization starter layer on the substrate, applying a radiation field on the polymerization starter layer for selectively reducing a density of polymerization starters of the polymerization starter layer, applying monomers and then polymerizing of the monomers, the polymerization being initiated by the starters of the polymerization starter layer, and structuring the substrate using the polymerized monomers as a mask.

Abstract: A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.

Abstract: A process of producing an electroluminescent element is provided. The production process comprises repeating at least twice a step of forming an electroluminescent layer comprising a buffer layer and a luminescent layer by patterning using a photolithographic process, thereby producing an electroluminescent element comprising a patterned electroluminescent layer. The method includes the steps of forming a first pattern part comprising a first buffer layer as the lowermost layer, and coating a solution for forming a second buffer layer in a region including the first pattern part. The first buffer layer is immiscible with the solution for forming the second buffer layer.

Abstract: A method for forming a pattern, comprises: forming a bank film on a substrate; performing a lyophobic treatment on a surface of the bank film; patterning the bank film on which the lyophobic treatment has been performed to form a bank; performing a surface modification treatment in which a hydroxyl group on a surface of a pattern forming region partitioned by the bank is alkylated; disposing a functional liquid in the pattern forming region; and firing the functional liquid to form a pattern.

Abstract: The present invention relates to preparation of patterned workpieces in the production of semiconductor and other devices. Methods and devices are described utilizing resist and transfer layers over a workpiece substrate. The methods and devices produce small feature dimensions in masks and phase shift masks. The methods described may apply to both masks and direct writing on other workpieces having similarly small features, such as semiconductor, cryogenic, magnetic and optical microdevices.

Abstract: A process and related structure are disclosed for using photo-definable layers that may be selectively converted to insulative materials in the manufacture of semiconductor devices, including for example dynamic random access memories (DRAMs), synchronous DRAMs (SDRAMs), static RAMs (SRAMs), FLASH memories, and other memory devices. One possible photo-definable material for use with the present invention is plasma polymerized methylsilane (PPMS), which may be selectively converted into photo-oxidized siloxane (PPMSO) through exposure to deep ultra-violet (DUV) radiation using standard photolithography techniques. According to the present invention, structures may be formed by converting exposed portions of a photo-definable layer to an insulative material and by using the non-exposed portions in a negative pattern scheme, or the exposed portions in a positive pattern scheme, to transfer a pattern into to an underlying layer.

Abstract: A lift-off positive resist composition capable of forming a fine lift-off pattern is provided. This composition comprises a base resin component (A) and an acid generator component (B) generating an acid under exposure, wherein the base resin component (A) is a silicone resin.

Abstract: A resistless lithography method for fabricating fine stiuctures is disclosed. IN an embodiment, a semiconductor mask layer (HM) may be formed on a carrier material (TM, HM?) and a selective ion implantation (I) being effected in order to dope selected regions (1) of the semiconductor mask layer (HM). Wet chemical removal of the non doped regions of the semiconductor mask layer (HM) yields a semiconductor mask which can be used for further patterning. A simple and high precision resistless lithography method for structures smaller than 100 nm is obtained in this way.

Abstract: The subject invention provides a correction method for design data or mask data comprising the steps of: (i) carrying out PPC of design data or mask data; (ii) exposing and developing a resist with an evaluation mask including a critical pattern which becomes critical in a process, etching a circuit material using the resist having been developed, and measuring pattern sizes of the developed resist and the etched circuit material; (iii) extracting parameter numerical condition for preventing the design data or the mask data from being critical after OPC or PPC, as a rule or as a model based on the pattern sizes of the resist and the circuit material; (iv) extracting a critical pattern with a parameter not satisfying the foregoing rule or the model from the design data or the mask data; and (v) correcting the critical pattern.

Abstract: A semiconductor device fabrication method applies a diazo novolac photoresist to a semiconductor wafer, followed by light exposure of its entire surface to form an underlying resist layer; forms a surface resist layer thereover; performs patterned-light exposure and heat treatment to the photoresist film consisting of the two resist layers formed; and exposes its entire surface to light, followed by development to process the photoresist film into a resist pattern, where the surface resist layer is in an inverse tapered shape, while the underlying resist layer is in an undercut shape relative to the surface resist layer.

Abstract: A template 1 is brought close to or in contact with a surface to be patterned 111 and patterns are formed with liquid 62 on the surface 111. This method comprises the steps of: bringing the template 1 close to or essentially in contact with the surface 111, supplying liquid 62 to a plurality of through holes 12 established in the pattern transfer region 10 of the template 1 for supplying the liquid 62, and separating the template 1 from the surface 111 after the liquid 62 is adhered to the surface 111 via the through holes 12.

Abstract: Disclosed are a light emitting element that, in the formation of a plurality of luminescent layers, can effectively suppress color mixing in each luminescent layer and loss in dissolution of the luminescent layer per se, and a process for producing the same. The light emitting element comprising a plurality of luminescent layers formed by photolithography is produced by a process which comprises: forming a first electrode on a surface of a base material; forming a first luminescent layer on the first electrode; conducting treatment for rendering the first luminescent layer in its exposed area insoluble in a coating liquid for second luminescent layer formation; forming the second luminescent layer on the first electrode; repeating the steps a plurality of times to form a plurality of luminescent layers on the first electrode; and forming a second electrode on the plurality of luminescent layers.

Abstract: A CD-SEM (critical dimension-scanning electron microscope) system may utilize a technique for characterizing and reducing shrinkage carryover due to CD-SEM measurements. The system may identify the affects of CD-SEM measurements on the resist and adjust the operating parameters for a particular resist to avoid or significantly reduce shrinkage carryover. In this manner, the system may obtain more reliable CD measurements and avoid damage to the measured feature.

Abstract: A conductive photolithographic film and method of forming a device using the conductive photolithographic film. The method includes depositing a conductive photolithographic film on a top surface of a substrate; and patterning the conductive photolithographic film to create a desired circuit pattern using a lithographic process. The conductive photolithographic film comprising about 50% to about 60% of a mixture of epoxy acrylate, a thermal curing agent, and a conductive polymer; about 20% to about 30% of a lithographic reactive component; about 10% to about 15% of a photo-active material; and about 3% to about 5% of additives that enhance conductivity of the conductive photolithographic polymer.

Abstract: Antireflective compositions characterized by the presence of an Si-containing polymer having pendant chromophore moieties are useful antireflective coating/hardmask compositions in lithographic processes. These compositions provide outstanding optical, mechanical and etch selectivity properties while being applicable using spin-on application techniques. The compositions are especially useful in lithographic processes used to configure underlying material layers on a substrate, especially metal or semiconductor layers.

Abstract: The invention relates to a method of structuring of a substrate by providing a polymerization starter layer on the substrate, applying a radiation field on the polymerization starter layer for selectively reducing a density of polymerization starters of the polymerization starter layer, applying monomers and then polymerizing of the monomers, the polymerization being initiated by the starters of the polymerization starter layer, and structuring the substrate using the polymerized monomers as a mask.

Abstract: The presently disclosed invention provides for the fabrication of porous anodic alumina (PAA) films on a wide variety of substrates. The substrate comprises a wafer layer and may further include an adhesion layer deposited on the wafer layer. An anodic alumina template is formed on the substrate. When a rigid substrate such as Si is used, the resulting anodic alumina film is more tractable, easily grown on extensive areas in a uniform manner, and manipulated without danger of cracking. The substrate can be manipulated to obtain free-standing alumina templates of high optical quality and substantially flat surfaces PAA films can also be grown this way on patterned and non-planar surfaces. Furthermore, under certain conditions the resulting PAA is missing the barrier layer (partially or completely) and the bottom of the pores can be readily accessed electrically.

Abstract: A phase shift mask manufacturing method comprises the steps of processing a light-shielding layer over a transparent substrate into a predetermined light-shielding pattern, forming a resist film on the predetermined light-shielding pattern, performing writing on the resist film based on writing data and developing the resist film, thereby forming a resist pattern, and etching an underlying layer using the predetermined light-shielding pattern and the resist pattern as a mask, thereby forming recesses, that serve as phase shift portions, in the underlying layer. The writing data includes a portion where pattern data corresponding to at least the two recesses adjacent to each other through a light-shielding portion in the predetermined light-shielding pattern are combined into one pattern data.

Abstract: A photosensitive resin composition suitable for forming a thick film and an ultra-thick film used for forming a thick resist pattern used in the process of forming a magnetic pole on a magnetic head and a bump, which comprises (A) an alkali soluble novolak resin, (B) an alkali soluble acrylic resin, (C) an acetal compound, and (D) an acid generator.

Abstract: In a method for manufacturing a printed circuit board with a thin film capacitor embedded therein, a conductive metal is sputtered via a first mask to form a lower electrode. A dielectric material is sputtered via a second mask to form a dielectric layer. The conductive metal is sputtered via a third mask to form an upper electrode. An insulating layer is stacked on a stack body with the upper electrode formed therein and via holes are perforated from a top surface of the insulating layer to a top surface of the lower electrode and from the top surface of the insulating layer to a top surface of the upper electrode formed on the substrate. Also, the stack body with the via holes formed therein is electrolytically and electrolessly plated.

Abstract: A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.

Abstract: A method of manufacturing a TFT array panel for a LCD disclosers that the gate electrode wiring, transparent conducting electrode, and the first electrode of the storage capacity are formed while the first mask is processing. Then, the selective deposition method is used to process the growth of the first metal wiring. This, therefore, can reduce the numbers of the mask processes. Further, the metal deposition with photo-resist lift-off step is used to implement the layout of the second metal wiring for the consequent transmission lines in the manufacturing process. Finally, the process of the passivation layer deposition is used to implement associated circuits of a TFT array panel for a LCD. The TFT array panel for a LCD for manufacturing circuits can simplify the manufacturing process and reduce the cost.