Making Electrical Device Patents (Class 430/311)
  • Patent number: 12687668
    Abstract: Disclosed herein are systems and methods for fabricating nanostructures on a substrate that can be used in eyepieces for displays, e.g., in head wearable devices. Fabricating and/or etching such a substrate can include submerging the substrate in a bath and applying ultrasonication to the bath for a first time period. The ultrasonication applied to the first bath can agitate the fluid to provide a substantially uniform first reactive environment across the surface of the substrate. The substrate can be submerged in a second bath and ultrasonication can be applied to the second bath for a second time period. The ultrasonication applied to the second bath can agitate the fluid to provide a substantially uniform second reactive environment across the surface of the substrate. A predetermined amount of material can be removed from the surface of the substrate during the second time period to produce an etched substrate.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: July 21, 2026
    Assignee: Magic Leap, Inc.
    Inventors: Vikramjit Singh, Lorenzo Mcdonald, Frank Y. Xu
  • Patent number: 12685180
    Abstract: A semiconductor device includes a semiconductor substrate having a surface with a metal wiring on the surface, an insulating film that covers the surface of the semiconductor substrate, and a plurality of electrodes disposed on the insulating film and having mutually same planar shapes. The insulating film has a plurality of opening portions formed to face respective bottom surfaces of the plurality of electrodes and expose the metal wiring. The plurality of opening portions includes a first opening portion having a first planar configuration and a second opening portion having a second planar configuration different from the first planar configuration.
    Type: Grant
    Filed: August 25, 2023
    Date of Patent: July 14, 2026
    Assignee: LAPIS TECHNOLOGY CO., LTD.
    Inventor: Osamu Koike
  • Patent number: 12679092
    Abstract: A liquid discharge head includes: multiple nozzles; multiple individual chambers respectively communicating with the multiple nozzles; a common chamber communicating with each of the multiple individual chambers; multiple fluid restrictors between each of the multiple individual chambers and the common chamber; and multiple actuators driven to cause a liquid in the multiple individual chambers to be discharged from the multiple nozzles, a meniscus formed at each of the multiple nozzles has a natural period of vibration different from each of: a resonant period of the common chamber; half of the resonant period of the common chamber; and a quarter of the resonant period of the common chamber.
    Type: Grant
    Filed: October 19, 2023
    Date of Patent: July 14, 2026
    Assignee: RICOH COMPANY, LTD.
    Inventors: Yukio Otome, Tomoaki Murakami
  • Patent number: 12673345
    Abstract: This application provides a coating system, and relates to the technical field of coating. The coating system may include a coating head, a feeding apparatus, and a valve. The coating head may be equipped with at least two dispensing cavities independent of each other. Each dispensing cavity may include a coating opening. The feeding apparatus may be connected to the dispensing cavity, and the feeding apparatus may be configured to feed a slurry to the dispensing cavity. The valve may be disposed between at least one dispensing cavity and the feeding apparatus, and configured to implement communication or disconnection between a corresponding dispensing cavity and the feeding apparatus.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: July 7, 2026
    Assignee: CONTEMPORARY AMPEREX TECHNOLOGY (HONG KONG) LIMITED
    Inventors: Siying Huang, Yaohui Wang, Yinxiang Lin, Chao Guo, Peng Jin, Jinlong Liu
  • Patent number: 12669476
    Abstract: Provided are a method of manufacturing a semiconductor device in which the purity of a chemical liquid containing an organic solvent is more easily managed, a method of washing a semiconductor manufacturing apparatus, and a simpler method of measuring the cleanliness of a washing solution. A method of manufacturing a semiconductor device has Step 1 of bringing an oscillator into contact with a chemical liquid containing an organic solvent as a main component to obtain the amount of change in the resonance frequency of the oscillator resulting from the contact with the chemical liquid, Step 2 of confirming whether or not the amount of change in the resonance frequency of the chemical liquid falls within a permissible range of the amount of change in the resonance frequency based on the preset purity of the chemical liquid, and Step 3 of using the chemical liquid confirmed in Step 2 in manufacturing a semiconductor device.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: June 30, 2026
    Assignee: FUJIFILM Corporation
    Inventors: Akihiko Ohtsu, Yukihisa Kawada, Naotsugu Muro, Masahiro Yoshidome, Tetsuya Kamimura, Ryo Saito
  • Patent number: 12666540
    Abstract: A wiring substrate includes insulating layers including a first insulating layer and a second insulating layer, conductive layers including a first conductive layer including a pad and a second conductive layer, a coating film covering the first conductive layer including the pad and improving adhesion between the first conductive layer and the second insulating layer, and a via conductor formed in a through hole penetrating through the second insulating layer and the coating film on the pad and connecting the pad and the second conductive layer. The pad has a surface formed such that a root mean square roughness of the surface is in a range of 0.10 ?m to 0.23 ?m, and a peeling part is formed between the pad and the second insulating layer such that the peeling part is formed within 15 ?m around an outer edge of the through hole on the surface of the pad.
    Type: Grant
    Filed: April 10, 2024
    Date of Patent: June 23, 2026
    Assignee: IBIDEN CO., LTD.
    Inventors: Kentaro Wada, Koji Kondo, Kenji Kunieda, Masashi Umetsu, Yuta Okaga
  • Patent number: 12655277
    Abstract: A resin composition including a resin R including a repeating unit having a partial structure of Formula (I) or (II): where QA is an ester bond shown in the Formula (I), RA is a substituent group, n1 is any of integers 1 to 5, * is a bonding site with a remainder of the repeating unit, and ** is a bonding site with a phenyl group in the Formula (I); where QB is a linking group or a single bond other than the ester bond of QA in Formula (I), RB is a substituent group, with at least one RB being a hydroxyl group, n2 is any of integers 1 to 5, and * is a bonding site with a remainder of the repeating unit.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: June 16, 2026
    Assignee: TOPPAN Inc.
    Inventors: Hanae Tagami, Shigeki Furukawa
  • Patent number: 12656679
    Abstract: A compound represented by Formula (1): wherein X is a group having a valency of r; each R1 is independently an organic group comprising an acid-labile group; m is an integer greater than or equal to 1; k is an integer from 1 to 5; and r is an integer from 2 to 10, wherein the compound is non-polymeric, and wherein Ar1, L1, L2, R2, and R3 are as defined herein.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: June 16, 2026
    Assignee: DUPONT ELECTRONIC MATERIALS INTERNATIONAL, LLC
    Inventors: Li Cui, Emad Aqad, Yinjie Cen, Conner A. Hoelzel, James F. Cameron, Jong Keun Park, Suzanne M. Coley, Choong-Bong Lee
  • Patent number: 12656689
    Abstract: Methods and systems for assembling electron spin and charge to possess one or more properties of a topological plasmonic spin texture array for performing lithography that is not limited by an optical system's diffraction limit are disclosed. According to one embodiment, the method includes defining a polarization of an optical field of light and a corresponding coupling-structure geometry. The method includes providing a coupling structure having the defined coupling-structure geometry in a metallic material, the coupling structure defining a region of the metallic material. The method includes directing light having the defined polarization to a center of the region, forming a lattice of plasmonic merons having a finer contrast resolution than a diffraction or reflection based resolution determined by Abbe limit based on the defined polarization of the optical field.
    Type: Grant
    Filed: August 19, 2022
    Date of Patent: June 16, 2026
    Assignees: University of Pittsburgh—Of the Commonwealth System of Higher Education, The Trustees of Columbia University In the City of New York
    Inventors: Hrvoje Petek, Zhikang Zhou, Atreyie Ghosh, Sena Yang, Tianyi Wang, Chen-Bin Huang, Yanan Dai
  • Patent number: 12652762
    Abstract: A method for manufacturing a wiring board, including: forming a resist layer on a seed layer comprising a metal provided on a support body; forming a pattern including an opening to which the seed layer is exposed in the resist layer by light exposure and development of the resist layer; and forming a copper plating layer on the seed layer exposed into the opening by electrolytic plating, in this order. The arithmetic mean roughness Ra of the surface of the seed layer on a side opposite to the support body is 0.05 ?m or more and 0.30 ?m or less.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: June 9, 2026
    Inventors: Kei Togasaki, Kazuyuki Mitsukura, Masaya Toba, Kenichi Iwashita, Keishi Ono, Mao Narita
  • Patent number: 12650645
    Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate. The photoresist layer includes a photoresist composition including a polymer. The polymer includes a monomer unit having a pendant sensitizer and crosslinking group, and a monomer unit having a pendant acid labile group. The photoresist layer is selectively exposed to actinic radiation, and the selectively exposed photoresist layer is developed.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: June 9, 2026
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Chien-Chih Chen
  • Patent number: 12645137
    Abstract: A mask blanks substrate having a flatness of a calculation surface of 100 nm or less when a calculation region passing through central portions of first and second main surfaces and extending in a horizontal direction is set, a first region surface is cut out, a second region surface is cut out by setting a reference plane and a rotation axis and rotating the substrate by 180°, least square planes are calculated, the first and second region surfaces are converted into height maps to positions on the least square planes, the height map of the to second region surface is set as a reverse height map by symmetrically moving the height map, and a map of a calculated height obtained by adding heights of the height map of the first region surface and the reverse height map of the second region surface is set as the calculation surface.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: June 2, 2026
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Tomoaki Sugiyama, Daijitsu Harada, Harunobu Matsui, Naoki Yarita, Masaki Takeuchi
  • Patent number: 12645151
    Abstract: A method includes detecting data associated with a patterning device and/or a lithographic apparatus, performing an action from a plurality of actions when a determination not to proceed is made, and performing the action on the patterning device and/or a lithographic apparatus.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: June 2, 2026
    Assignee: ASML Netherlands B.V.
    Inventors: Bram Paul Theodoor Van Goch, Johan Gertrudis Cornelis Kunnen, Sae Na Na
  • Patent number: 12645136
    Abstract: An extreme ultraviolet (EUV) mask, includes a substrate, a reflective multilayer stack on the substrate, and a single layer or multi-layer capping feature on the reflective multilayer stack. The capping feature includes a capping layer or capping layers including a material having an amorphous structure. Other described embodiments include capping layer(s) that contain element(s) having a first solid carbon solubility less than about 3. In multilayer capping feature embodiments, element(s) of the respective capping layers have different solid carbon solubility properties.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: June 2, 2026
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsin-Chang Lee, Pei-Cheng Hsu, Wei-Hao Lee, Ping-Hsun Lin, Ta-Cheng Lien, Ching-Fang Yu
  • Patent number: 12637635
    Abstract: To provide a means capable of sufficiently removing organic residues present on the surface of a polishing object after polishing containing silicon oxide or polysilicon. A surface treatment composition contains a polymer having a constituent unit represented by Formula (1) below and water and is used for treating the surface of a polishing object after polishing, in which, in Formula (1) above, R1 is a hydrocarbon group having 1 to 5 carbon atoms and R2 is a hydrogen atom or a hydrocarbon group having 1 to 3 carbon atoms.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: May 26, 2026
    Assignee: FUJIMI INCORPORATED
    Inventors: Tsutomu Yoshino, Shogo Onishi, Yasuto Ishida
  • Patent number: 12638771
    Abstract: A method of manufacturing a semiconductor device includes forming a multilayer photoresist stack over a substrate, in which the multilayer photoresist stack has a first photoresist layer and a second photoresist layer over the first photoresist layer, and the second photoresist layer is less reactive to hydrogen than the first photoresist layer, exposing the multilayer photoresist stack to an EUV radiation, and developing the exposed multilayer photoresist stack.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: May 26, 2026
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: An-Ren Zi, Cheng-Han Wu, Ching-Yu Chang
  • Patent number: 12641906
    Abstract: Some embodiments relate to an integrated chip including a semiconductor substrate and a pixel array comprising a plurality of photodetectors in the semiconductor substrate. The pixel array further comprises a plurality of transistors on a frontside of the semiconductor substrate. A backside ground (BSGD) structure extends into a backside of the semiconductor substrate, opposite the frontside, and further surrounding the pixel array along a periphery of the pixel array. The BSGD structure has a first sloped sidewall extending from a bottom surface of the BSGD structure that is recessed into the semiconductor substrate.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: May 26, 2026
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Huang, Chen-Hsien Lin, Shyh-Fann Ting
  • Patent number: 12638781
    Abstract: A system, software application, and method for optical device metrology of optical device patterns formed from lithography stitching are provided. In one example, the method includes creating a stitched design file comprising images of a plurality of masks; defining target coordinates for each of the plurality of masks in the stitched design file; defining an alignment mark for the stitched design file; capturing images of an optical device pattern at each of the target coordinates; comparing the captured images of the optical device pattern at each of the target coordinates to virtual images of the stitched design file at each of the target coordinates; and determining whether the optical device pattern at each of the target coordinates meets a threshold value.
    Type: Grant
    Filed: June 9, 2023
    Date of Patent: May 26, 2026
    Assignee: Applied Materials, Inc.
    Inventors: Yongan Xu, Jin Xu, Ludovic Godet
  • Patent number: 12628340
    Abstract: A photolithographic exposure method for a memory. In a photolithographic process for making a memory, when exposure is performed by using a mask, regions with different exposure dimension requirements on the memory are divided into different exposure groups. Regions with the same exposure resolution requirement are divided into the same group. Different exposure modes of exposure that are capable of correspondingly satisfying resolution requirements of each group are performed to different groups during exposure. During exposure, different illumination modes are adopted to perform exposure. Firstly, a first exposure mode is adopted to perform exposure to a memory array cell exposure group, then a wafer is kept stationary on a supporting platform, and then a second exposure mode is adopted to perform exposure to the other structure exposure group; after the exposure of all groups is completed, one-step development is performed to complete pattern transfer.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: May 12, 2026
    Assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corporation
    Inventor: Lei Wang
  • Patent number: 12618900
    Abstract: Wafer level electron beam prober systems, devices, and techniques, are described herein related to providing wafer level testing for fabricated device structures. Such wafer level testing contacts a first side of a die of a wafer with a probe to provide test signals to the die under test and performs e-beam imaging of the first side of the die while the test signals are provided to the die under test.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: May 5, 2026
    Assignee: Intel Corporation
    Inventors: Xianghong Tong, Martin Von Haartman, Zhiyong Ma, Jennifer J. Huening, Hyuk Ju Ryu, Christopher Morgan, Shuai Zhao, Ramune Nagisetty, Tuyen K. Tran, Wen-Hsien Chuang
  • Patent number: 12617970
    Abstract: A compound is described having following formula: (I) Also described is a mixture of compounds comprising the reaction product of i) a urethane compound comprising a perfluorooxyalkyl moiety and at least two (meth)acryl groups; and ii) a silane compound comprising hydrolysable groups and a group selected from amine or mercapto group; wherein i) and ii) are reacted at an equivalent ratio of excess compound i) such that (meth)acryl groups remain unreacted. Methods and articles are also described.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: May 5, 2026
    Assignee: 3M Innovative Properties Company
    Inventors: Thomas P. Klun, Matthew R.D. Smith, Henrik B. van Lengerich, Kayla C. Niccum, Christopher S. Lyons
  • Patent number: 12616073
    Abstract: A 3D semiconductor device including: a first level with first transistors, a single-crystal layer and at least one metal layer which includes interconnects between the first transistors forming first control circuits with a plurality of sense amplifiers; the first metal layer(s) overlaid by a second metal layer which is overlaid by a second level which includes first memory-cells which include second transistors with a metal-gate, overlaid by a third level which includes second memory cells which include third transistors which control the data written to second memory cells; a fourth metal layer overlaying a third metal layer which overlays the third level; where third transistor gate locations are aligned to second transistor gate locations within greater than 0.2 nm error, the first transistors or the second transistors comprise at least two FinFet transistors, and two of the FinFet transistors each have different threshold voltages.
    Type: Grant
    Filed: June 22, 2025
    Date of Patent: April 28, 2026
    Assignee: Monolithic 3D Inc.
    Inventors: Zvi Or-Bach, Brian Cronquist
  • Patent number: 12607945
    Abstract: A position measuring method includes an image capturing element for capturing an image of an alignment mark. The method includes first processing of setting processing areas on the image capturing element for capturing an image of the alignment mark and performing position measurement processing, and second processing of calculating a position of the alignment mark on the basis of the processing areas set in the first processing. The position of the alignment mark is calculated using a plurality of the processing areas set by shifting the processing areas from each other in units of one pixel of the image capturing element.
    Type: Grant
    Filed: August 21, 2024
    Date of Patent: April 21, 2026
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Nozomu Hayashi
  • Patent number: 12604466
    Abstract: The manufacturing method of a semiconductor device includes providing a word line structure and a hard mask stack on the word line structure. The word line structure includes an active area, a word line, an isolation structure and a protection layer, the word line covers a portion of the active area, the isolation structure is adjacent to the active area and the word line, and the protection layer covers the active area, the word line, and the isolation structure. A first photolithography process is performed to etch the hard mask stack by using a photomask along a first direction. A second photolithography process is performed to etch the hard mask stack by using a photomask along a second direction. A protection pillar covering the portion of the active area by etching the protection layer is formed by using the hard mask stack as a mask.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: April 14, 2026
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Sheng Chieh Tsai
  • Patent number: 12600820
    Abstract: A photocurable composition can comprise a polymerizable material and a photoinitiator, wherein the polymerizable material may comprise at least one silicon-containing monomer having a structure of formula (1) with R1, R2: —O—Si(CH3)3, alkyl, aryl, or alkylaryl; R3, R4: —O—Si(CH3)3, alkyl, aryl, or alkylaryl; R5: C1-C5-alkyl, aryl, alkylaryl; R6: —R5-X, or X, or —O—Si(CH3)3, or alkyl, or aryl, or alkylaryl; X: acrylate or methacrylate; and n: 0-4. The amount of silicon (Si) in the photocurable composition can be at least 15 wt % based on the total weight of the photocurable composition.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: April 14, 2026
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Fen Wan, Weijun Liu
  • Patent number: 12596303
    Abstract: A resist composition comprising a base polymer comprising repeat units having a salt structure consisting of a sulfonic acid anion bonded to a polymer backbone and a sulfonium cation having an acid labile group of triple bond-bearing tertiary ester type as the acid generator exhibits a high sensitivity and reduced LWR or improved CDU.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: April 7, 2026
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Jun Hatakeyama, Masahiro Fukushima
  • Patent number: 12597107
    Abstract: A tamper-evident glass and methods of using the tamper-evident glass are provided herein. The tamper-evident glass comprising at least a first plurality of tamper-evident elements, which may be unique or near unique to each manufacturing of tamper-evident glass. The initial state of tamper-evident glass and positioning of the plurality of tamper-evident elements may be mapped through digital scanning to create a digital file of the current state of the tamper-evident glass. The tamper-evident glass may be scanned again to create a new digital file for comparison and to determine if a tampering event has occurred. The tamper-evident elements may include any combination of inorganic fluorescent material, crystals grown through nucleation and crystallization, or added colorants.
    Type: Grant
    Filed: December 19, 2023
    Date of Patent: April 7, 2026
    Assignee: Honeywell Federal Manufacturing & Technologies, LLC
    Inventors: Rachel Leigh Grodsky, Richard Brow, Melissa Malone Teague
  • Patent number: 12591173
    Abstract: Provided are a substrate with a multilayer reflective film, a reflective mask blank, a reflective mask, and a method for manufacturing a semiconductor device, having high resistance to an etching gas used for etching an absorber film and/or an etching mask film and capable of suppressing occurrence of blister. A substrate with a multilayer reflective film 100 comprises a substrate 10, a multilayer reflective film 12 formed on the substrate 10, and a protective film 14 formed on the multilayer reflective film 12. The protective film 14 comprises ruthenium (Ru), rhodium (Rh), and at least one additive element selected from the group consisting of titanium (Ti), zirconium (Zr), yttrium (Y), niobium (Nb), vanadium (V), and hafnium (Hf).
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: March 31, 2026
    Assignee: HOYA CORPORATION
    Inventors: Kota Suzuki, Masanori Nakagawa, Takahiro Onoue
  • Patent number: 12591175
    Abstract: Disclosed is a substrate treating apparatus including a support unit that supports and rotates a substrate, a heating unit including a laser irradiator that irradiates laser light in a pattern formed in the substrate, a movement module that changes a location of the laser irradiator by moving the heating unit, and a controller that controls the support unit and the heating unit, the movement module moves the heating unit between a heating location, at which the laser light is irradiated to the substrate, and a standby location that deviates from the substrate, and the movement module rotates and linearly moves the heating unit.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: March 31, 2026
    Assignee: SEMES CO., LTD.
    Inventors: Hyun Yoon, Ki Hoon Choi, Hyo Won Yang, Tae Hee Kim, In Ki Jung
  • Patent number: 12585188
    Abstract: R1aR2bSi(R3)4-(a+b)??(1) A composition for a silicon-containing resist underlying film and for forming a resist underlying film that can be removed by a conventional method employing dry etching, but also by a method employing wet etching using a chemical liquid in a step for processing a semiconductor substrate or the like; and a composition for forming a resist underlying film for lithography and for forming a resist underlying film that has excellent storage stability and produces less residue in a dry etching step. A composition for forming a resist underlying film, the composition including a hydrolysis condensate of a hydrolysable silane mixture containing an alkyltrialkoxy silane and a hydrolysable silane of formula (1), wherein the contained amount of the alkyltrialkoxy silane in the mixture is 0 mol % or more but less than 40 mol % with respect to the total amount by mole of all of the hydrolysable silane contained in the mixture.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: March 24, 2026
    Assignee: NISSAN CHEMICAL CORPORATION
    Inventors: Shuhei Shigaki, Ken Ishibashi, Wataru Shibayama
  • Patent number: 12585203
    Abstract: In order to provide a determining apparatus capable of determining whether there is a foreign substance on a substrate stage with suppressing a decrease in productivity of an apparatus, the determining apparatus according to the present invention is configured to determine a state of a surface of each of a first substrate stage and a second substrate stage based on a first detection result of a substrate surface of a substrate mounted on the first substrate stage and a second detection result of the substrate surface of the substrate mounted on the second substrate stage.
    Type: Grant
    Filed: August 16, 2023
    Date of Patent: March 24, 2026
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takahiro Yamamoto, Mitsuru Inose
  • Patent number: 12577466
    Abstract: Development of resists are useful, for example, to form a patterning mask in the context of high-resolution patterning. Development can be accomplished using an organic vapor such as a carboxylic acid. In some implementations, the organic vapor is trifluoroacetic acid. In some implementations, the organic vapor is hexafluoro-acetylacetone. A metal-containing resist film such as an EUV-sensitive organo-metal oxide may be deposited on a semiconductor substrate using a dry or wet deposition technique. The metal-containing resist film on the semiconductor substrate may be developed using the organic vapor, or residue of metal-containing resist material formed on surfaces of a process chamber may be removed using the organic vapor.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: March 17, 2026
    Assignee: Lam Research Corporation
    Inventors: Dries Dictus, Chenghao Wu, Eric Calvin Hansen, Timothy William Weidman
  • Patent number: 12563876
    Abstract: A display panel includes: a backplane, light-emitting devices, first electrodes, and connection traces. The backplane includes a first surface, a second surface opposite thereto, and side surfaces connecting the two surfaces. At least one of the side surfaces is a selected side surface. The light-emitting devices are disposed on the first surface. The first electrodes are disposed on the first surface and are proximate to the selected side surface. Each connection trace includes a first trace segment, a second trace segment, and a third trace segment that are connected in sequence. The first trace segment is disposed on the first surface, and the first trace segment is electrically connected to a first electrode. The second trace segment is disposed on the selected side surface. The third trace segment is disposed on the second surface, and is configured to be electrically connected to a flexible printed circuit.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: February 24, 2026
    Assignees: BOE MLED Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lili Wang, Chao Liu, Ming Zhai, Jing Wang, Sha Feng, Mingming Jia, Shaofei Guo, Bao Fu, Qiuhua Meng, Qi Qi, Lingyun Shi, Haiwei Sun
  • Patent number: 12554199
    Abstract: A resist topcoat composition and a method of forming patterns utilizing the resist topcoat composition are disclosed. The resist topcoat composition includes an acrylic polymer comprising a structural unit comprising a hydroxy group and a fluorine; a mixture comprising a first acid compound comprising at least one fluorine; and a second acid compound different from the first acid compound and comprising at least one fluorine, the first acid compound and the second acid compound are each independently selected from a sulfonic acid compound and a sulfonimide compound, the first acid compound and the second acid compound being in a weight ratio of about 1:0.1 to about 1:50; and a solvent.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: February 17, 2026
    Assignees: Samsung SDI Co., Ltd., Samsung Electronics Co., Ltd.
    Inventors: Ran Namgung, Hyeon Park, Minsoo Kim, Daeseok Song, Minki Chon, Jun Soo Kim, Hyun-Woo Kim, Hyun-Ji Song, Young Joo Choi, Suk-Koo Hong
  • Patent number: 12554200
    Abstract: A maskless exposure device includes: a light source for emitting a beam, a light modulator for modulating the beam according to an exposure pattern, an optical system for transferring the modulated beam onto a substrate in the form of a beam spot array, a position determining unit for generating relative position data between the beam spot array and the substrate, and a control unit for controlling the light modulator based on the position data of the position determining unit. The beam spot array includes alignment areas and out-of-alignment areas which are alternately disposed, on/off-spots which overlap the alignment areas, and neutral spots which overlap the out-of-alignment areas and at which the substrate is not irradiated with the beam, and a distance between on/off-spots adjacent to each other at a first point in time is different from a distance between on/off-spots adjacent to each other at a second point in time.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: February 17, 2026
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sang Hyun Yun, Kab Jong Seo
  • Patent number: 12547066
    Abstract: Some embodiments include a reticle which includes first pattern features and second pattern features. A first optimal dose of actinic radiation is associated with the first pattern features and a second optimal dose of the actinic radiation is associated with the second pattern features. The second pattern features are larger than the first pattern features. Each of the second pattern features has a configuration which includes a central region laterally surrounded by an outer region, with the central region being of different opacity than the outer region. The configurations of the second pattern features balance the second optimal dose of the actinic radiation to be within about 5% of the first optimal dose of the actinic radiation. Some embodiments include photo-processing methods.
    Type: Grant
    Filed: December 19, 2023
    Date of Patent: February 10, 2026
    Assignee: Micron Technology, Inc.
    Inventors: Chung-Yi Lee, Reha M. Bafrali
  • Patent number: 12548736
    Abstract: Provided is an apparatus for processing a substrate, which includes a chamber having a processing space in which a process of depositing a thin-film on a substrate is performed and a structure which is installed to expose at least one surface to the processing space and in which a coating layer made of a polymer forming at least one of covalent bond and double bond at an end tail is formed on the surface exposed to the processing space. Thus, the substrate processing apparatus in accordance with an exemplary embodiment may restrict or prevent particle generation and substrate pollution generation caused by a thin-film deposited in the chamber. Also, a period of cleaning the chamber and a structure or a component in the chamber may be extended. Thus, a product yield rate and an apparatus operation efficiency may improve.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: February 10, 2026
    Assignee: JUSUNG ENGINEERING CO., LTD.
    Inventors: Won Tae Cho, Chul Joo Hwang
  • Patent number: 12541155
    Abstract: Aspects of the present disclosure provide an inspection system, which can include an image module and processing circuitry. The imaging module can image a wafer with a first light beam and a second light beam. The first light beam can be coaxially aligned with the second light beam, and image a first pattern located on a front side of a wafer to form a first image. The second light beam can image a second pattern located below the first pattern to form a second image via quantum tunneling imaging or infrared transmission imaging. The second light beam can have power sufficient to pass through at least a portion of a thickness of the wafer and reach the second pattern. The processing circuitry can perform image analysis on the first image and the second image to calculate an overlay value of the first and second patterns and/or defects of the wafer.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: February 3, 2026
    Assignee: Tokyo Electron Limited
    Inventors: Anton J. Devilliers, Anthony R. Schepis, David Conklin
  • Patent number: 12541147
    Abstract: An imprinting apparatus comprises a first carrier for carrying a flexible stamp having an imprinting pattern and a second carrier movable relative to the first carrier and configured to carry a substrate having a resist layer. The second carrier comprises a chuck and an interface plate over the chuck, wherein the interface plate comprises an array of openings for receiving already-imprinted areas of one side of a substrate while an opposite side of the substrate is to be imprinted. The chuck comprises a fluid passage arrangement for coupling to the openings of the array.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: February 3, 2026
    Assignee: Koninklijke Philips N.V.
    Inventors: Didier Mathijs Maria Justina Petit, Marcus Antonius Verschuuren, Jens Udo Barendt
  • Patent number: 12538761
    Abstract: Disclosed are a semiconductor photoresist composition and a method of forming patterns using the semiconductor photoresist composition. The semiconductor photoresist composition includes an organometallic compound represented by Chemical Formula 1 and a solvent and a method of forming patterns using the same.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: January 27, 2026
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Kyungsoo Moon, Eunmi Kang, Jaehyun Kim, Jimin Kim, Taeho Kim, Changsoo Woo, Hwansung Cheon, Seungyong Chae, Seung Han
  • Patent number: 12522621
    Abstract: Patterning compositions are described based on organo tin dodecamers with hydrocarbyl ligands, oxo ligands, hydroxo ligands and carboxylato ligands. Alternative dodecamer embodiments have organo tin ligands in place of hydrocarbyl ligands. The organo tin ligands can be incorporated into the dodecamers from a monomer with the structure (RCC)3SnQ, where R is a hydrocarbyl group and Q is a alkyl tin moiety with a carbon bonded to the Sn atom of the monomer and with a Sn bonded as a replacement of a quaternary carbon atom with bonds to 4 carbon atoms. Some or all of the carboxylato and hydroxyl ligands can be replaced with fluoride ions. Good EUV patterning results are obtained with the dodecamer based patterning compositions.
    Type: Grant
    Filed: July 22, 2024
    Date of Patent: January 13, 2026
    Assignee: Inpria Corporation
    Inventors: Brian J. Cardineau, William Earley, Stephen T. Meyers, Kai Jiang, Jeremy T. Anderson
  • Patent number: 12517431
    Abstract: A pattern forming method produces a pattern having excellent LER performance. Additionally, an actinic ray-sensitive or radiation-sensitive composition and a method for manufacturing an electronic device, which relate to the pattern forming method are disclosed. The pattern forming method includes: exposing a resist film, the resist film including an acid-decomposable group a which reacts to generate a polar group having a pKa of 6.0 or more, an acid-decomposable group b which reacts to generate a polar group having a pKa of less than 6.0, and a photoacid-generating component, a first heating step for reacting at least a part of the acid-decomposable group a with an acid to generate the polar group having a pKa of 6.0 or more, a second heating step for reacting at least a part of the acid-decomposable group b to generate the polar group having a pKa of less than 6.0, and a development step.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: January 6, 2026
    Assignee: FUJIFILM Corporation
    Inventors: Hironori Oka, Michihiro Shirakawa, Mitsuhiro Fujita, Kazunari Yagi
  • Patent number: 12520425
    Abstract: Three-dimensional (3D) devices that include at least two electrically isolated planes of electrically conductive traces and methods of making the same. The 3D device includes an upper level, a lower level electrically isolated from the upper level, and one or more pedestal portions joining the upper level and the lower level. The pedestal portions comprise an undercut. The undercut defines an upper level overhang that is configured to define a mask region to prevent conductive material from being deposited below the undercut.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: January 6, 2026
    Assignee: DUJUD LLC
    Inventor: Reza Abbaspour
  • Patent number: 12512430
    Abstract: Disclosed herein is a metallization method, comprising (a) forming on a first surface of a substrate an underlayer from an underlayer composition comprising: a first polymer comprising an acid-labile group, and a sensitizing group, wherein (i) the first polymer comprises the sensitizing group or (ii) a compound that is distinct from the first polymer comprises the sensitizing group; wherein the underlayer has a first thickness; (b) forming on the underlayer a photoresist layer from a photoresist composition comprising: a second polymer comprising an acid-labile group, and a photoacid generator; wherein the photoresist layer has a second thickness; (c) pattern-wise exposing the photoresist layer to activating radiation; (d) developing the exposed photoresist layer with a basic developer.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: December 30, 2025
    Assignees: DUPONT ELECTRONIC MATERIALS INTERNATIONAL, LLC, DDP SPECIALTY PRODUCTS TAIWAN CO., LTD.
    Inventors: Mitsuru Haga, Ching-Lung Chen
  • Patent number: 12510824
    Abstract: An actinic ray-sensitive or radiation-sensitive resin composition contains (A) a resin having a polarity that increases by an action of an acid, (B) a photoacid generator, (P) an amine oxide, and (D) an acid diffusion control agent provided that acid diffusion control agents corresponding to the amine oxide are excluded, in which a content of the amine oxide (P) is from 0.01 ppm to 1,000 ppm with respect to a total mass of the actinic ray-sensitive or radiation-sensitive resin composition, and a mass ratio of the acid diffusion control agent (D) to the amine oxide (P) is more than 1 and 10,000 or less.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: December 30, 2025
    Assignee: FUJIFILM Corporation
    Inventors: Naoya Hatakeyama, Yasunori Yonekuta, Takamitsu Tomiga, Kohei Higashi, Fumihiro Yoshino
  • Patent number: 12507515
    Abstract: A light-emitting module includes: a plurality of light-emitting elements; a first substrate having an upper surface that includes an element mounting region on which the light-emitting elements are mounted, the first substrate including a plurality of first terminals; a second substrate having an upper surface that includes a substrate mounting region on which the first substrate is mounted, the second substrate including a plurality of second terminals; a plurality of wires each connected to corresponding ones of the first terminals and the second terminals; a light-shielding covering member disposed outward of the element mounting region so as to cover the plurality of wires; and a light-transmissive first projection disposed along the element mounting region between the element mounting region and the first terminals so as to be in contact with the covering member.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: December 23, 2025
    Assignee: NICHIA CORPORATION
    Inventors: Kensuke Yamaoka, Kenji Ozeki
  • Patent number: 12498644
    Abstract: A method for identifying pixels corresponding to an imprint field edge. Generating a set of pixel patterns, each pixel pattern from the set of pixel patterns including edge pixels predicted to be near the imprint field edge of a test imprint field and central pixels corresponding to a center portion of the test imprint field, wherein the edge pixels are turned on, each pixel pattern from the set of pixel patterns having different edge pixels selected and imprinting the test imprint field with a spatially modulated light source that is modulated with at least one pixel pattern from the set of pixel patterns.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: December 16, 2025
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mehul N. Patel
  • Patent number: 12494368
    Abstract: Photoresists and methods of forming and using the same are disclosed. In an embodiment, a method includes spin-on coating a first hard mask layer over a target layer; depositing a photoresist layer over the first hard mask layer using chemical vapor deposition or atomic layer deposition, the photoresist layer being deposited using one or more organometallic precursors; heating the photoresist layer to cause cross-linking between the one or more organometallic precursors; exposing the photoresist layer to patterned energy; heating the photoresist layer to cause de-crosslinking in the photoresist layer forming a de-crosslinked portion of the photoresist layer; and removing the de-crosslinked portion of the photoresist layer.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: December 9, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Cheng Liu, Yi-Chen Kuo, Yen-Yu Chen, Jr-Hung Li, Tze-Liang Lee
  • Patent number: 12485420
    Abstract: The present disclosure is related to a method of producing a microfluidic sorting apparatus. The method includes providing an injection-molded substrate comprising a network of channels; bonding an insulating film to an upper surface of the substrate to cover the network of channels; and depositing a conductive film on the insulating film. The substrate can be separated from the conductive film.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: December 2, 2025
    Assignee: Verily Life Sciences LLC
    Inventors: Saurabh Vyawahare, Andrew Homyk, Michael Brundage, Srinivas Hanasoge, Junjia Ding
  • Patent number: 12481222
    Abstract: The invention relates to a method and a device for the exposure of a photosensitive coating.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: November 25, 2025
    Assignee: EV GROUP E. THALLNER GMBH
    Inventors: Bernhard Thallner, Boris Povazay, Tobias Zenger, Thomas Uhrmann