Abstract: A method according to the present disclosure includes providing a substrate, depositing an underlayer over the substrate, depositing a photoresist layer over the underlayer, exposing a portion of the photoresist layer and a portion of the underlayer to a radiation source according to a pattern, baking the photoresist layer and underlayer, and developing the exposed portion of the photoresist layer to transfer the pattern to the photoresist layer. The underlayer includes a polymer backbone, a polarity switchable group, a cross-linkable group bonded to the polymer backbone, and photoacid generator. The polarity switchable group includes a first end group bonded to the polymer backbone, a second end group including fluorine, and an acid labile group bonded between the first end group and the second end group. The exposing decomposes the photoacid generator to generate an acidity moiety that detaches the second end group from the polymer backbone during the baking.

Abstract: An electrical energy power source comprises a casing made by micro-bonding an upper ceramic wafer and a lower ceramic wafer to the opposed surfaces of a ceramic ring. The upper and lower ceramic wafers have respective first and second conductive pathways extends therethrough. A first current collector supporting a first active material layer contacts the upper ceramic wafer and the first conductive pathway, and a second current collector supporting a second, opposite polarity active material layer contacts the lower ceramic wafer and the second conductive pathway. A separator resides between the first and second active materials, and an electrolyte filled into the casing through a fill port activates the active materials. The first and second conductive pathways serve as opposite polarity terminals for the power source.

Abstract: The present disclosure relates to the technical field of semiconductors, and provides a method of forming a photoresist pattern, and a photoresist structure. The method of forming a photoresist pattern includes: forming a photoresist structure on a target layer, where the photoresist structure includes a photoresist layer provided on the target layer, and an optical wave transmission layer provided on the photoresist layer; and performing exposure processing on the photoresist structure in a first medium, to form an exposure image in the photoresist layer, where the optical wave transmission layer is configured to improve lithographic resolution of the photoresist layer.

Abstract: According to one embodiment, a display device manufacturing method includes forming a first lower electrode of a first sub-pixel, a second lower electrode of a second sub-pixel, and a third lower electrode of a third sub-pixel, forming a first thin film, forming a negative first resist, removing the first thin film of the second sub-pixel and the third sub-pixel using the first resist as a mask, forming a second thin film, forming a negative second resist, removing the second thin film of the third sub-pixel using the second resist as a mask, forming a positive third resist, removing the second thin film of the first sub-pixel using the third resist as a mask.

Abstract: A semiconductor device, and a method of manufacturing the semiconductor device, includes: a gate structure including conductive layers and insulating layers, which are alternately stacked; a channel structure including a first channel structure and a second channel structure aligned in a first direction, and the channel structure penetrating the gate structure, a first cutting structure extending in a second direction, the first cutting structure disposed between the first channel structure and the second channel structure; a contact pad including a first contact pad in contact with an upper surface of the first channel structure, and a second contact pad in contact with an upper surface of the second channel structure; a second cutting structure in contact with an upper surface of the first cutting structure and disposed between the first contact pad and the second contact pad, wherein the first contact pad has a critical dimension greater than a critical dimension of the upper surface of the first channel s

Abstract: A method includes forming a protective layer over a substrate edge and a photoresist over a substrate. Protective layer removed and photoresist exposed to radiation. Protective layer made of composition including acid generator and polymer having pendant acid-labile groups.

Abstract: Fabrication methods are provided for transforming two-dimensional films into three-dimensional structures based on rolling-up kirigami techniques. In an example, a method includes forming a first layer of a first material on a portion of a substrate, forming a second layer of a second material on the first layer and a second portion of the substrate, and forming a third layer of a third material on a first portion of the second layer. A pattern is formed into the third layer when forming the third layer. The example method further includes transforming at least a portion of the third layer into a three-dimensional structure based in part on removing a second portion of the second layer and at least a portion of the first layer.

Abstract: New lithographic compositions for use as EUV adhesion layers are provided. The present invention provides methods of fabricating microelectronics structures using those compositions as well as structures formed by those methods. The method involves utilizing an adhesion layer immediately below the photoresist layer. The adhesion layer can either be directly applied to the substrate, or it can be applied to any intermediate layer(s) that may be applied to the substrate, such as an alpha-carbon, spin-on carbon, spin-on silicon hardmask, metal hardmask, or deposited silicon layer. The preferred adhesion layers are formed from spin-coatable, polymeric compositions. The inventive method improves adhesion and reduces or eliminates pattern collapse issues.

Abstract: The present invention prevents edge collapse of an electrode layer of a laminated body included in an all-solid-state battery. A method of producing an all-solid-state battery includes: a laminated body forming step of forming a laminated body (310) including (i) a positive electrode layer (302), (ii) a negative electrode layer (304) having a polarity opposite of a polarity of the positive electrode layer (302); and (iii) a solid-electrolyte layer (303) disposed between the positive electrode layer (302) and the negative electrode layer (304); and a cutoff step of cutting off an outer peripheral edge of the laminated body (310) so as to form a laminated body containing a powder material.

Abstract: A rinse process is described for processing an initially patterned structure formed with an organometallic radiation sensitive material, in which the rinse process can remove portions of the composition remaining after pattern development to make the patterned structure more uniform such that a greater fraction of patterned structures can meet specifications. The radiation sensitive material can comprise alkyl tin oxide hydroxide compositions. The rinsing process can be effectively used to improve patterning of fine structures using extreme ultraviolet light.

Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.

Abstract: In an opto-electric hybrid board, an electric circuit part E is provided on a first surface side of an insulative layer, and includes pads for mounting an optical element, pads for a driving device for the optical element, and electrical interconnect lines Y including interconnect line portions A connecting the pads. A metal reinforcement layer and an optical waveguide W partially overlapping the metal reinforcement layer are provided on a second surface side of the insulative layer. A portion of the metal reinforcement layer which faces the interconnect line portions A on the opposite side of the insulative layer therefrom is removed to form an opening. This opto-electric hybrid board is capable of transmitting higher-frequency electric signals because the influence of the metal reinforcement layer on electrical properties is suppressed.

Abstract: A method of manufacturing a semiconductor device includes forming a photoresist underlayer including a photoresist underlayer composition over a semiconductor substrate and forming a photoresist layer comprising a photoresist composition over the photoresist underlayer. The photoresist layer is selectively exposed to actinic radiation, and the photoresist layer is developed to form a pattern in the photoresist layer. The photoresist underlayer composition includes: a first polymer having one or more of pendant acid-labile groups and pendant epoxy groups, a second polymer having one or more crosslinking groups, an acid generator, a quencher or photodecomposable base, and a solvent. The photoresist underlayer composition includes 0 wt. % to 10 wt. % of the quencher or photodecomposable base based on a total weight of the first and second polymers.

Abstract: A probe tip according to an embodiment of the disclosure may include: a first plating layer including a first metal; a second plating layer disposed on one surface of the first plating layer and including a second metal of a material different from that of the first metal; and a third plating layer disposed on one surface of the second plating layer and including the first metal, wherein each of the first plating layer, the second plating layer, and the third plating layer extends in a length direction of the probe tip, and wherein the first plating layer, the second plating layer, and the third plating layer are stacked in a thickness direction of the probe tip.

Abstract: A method of fabricating an organic optoelectronic device comprises positioning a patterning layer over a substrate, etching the patterning layer using a photolithographic process to create an etched patterning layer, positioning a layer of an organic material over the etched patterning layer, and removing at least a portion of the etched patterning layer and at least a portion of the layer of the organic material to create a patterned organic layer over the substrate.

Abstract: An object of the present disclosure is to implement a coloring pattern with a constant illuminance value on an electrode substrate to thereby increase display reliability and lifetime while reducing delamination of the hole transport layer (HTL) in the post-process. That is, when the roughness of the pattern after post-baking treatment is low, it may cause delamination of the hole transport layer (HTL) and a decrease in lifetime due to defective pixels, and thus a certain roughness can be obtained by minimizing the surface flow by leaving the substrate at a high temperature during post-baking treatment according to the present disclosure.

Abstract: A method for manufacturing an energy storage device. A stack is provided on a substrate. The stack comprises a first electrode layer, a second electrode layer, and an electrolyte layer between the first electrode layer and the second electrode layer. The method includes forming a first groove, a second groove, and a third groove in a first side of the stack opposite to a second side of the stack on the substrate. The first groove has a first depth and a first surface comprising a first exposed surface of the second electrode layer. The second groove has a second depth different from the first depth and a second surface comprising an exposed surface of the first electrode layer. The third groove has a third depth substantially the same as the first depth and a third surface comprising a second exposed surface of the second electrode layer.

Abstract: Porous liquid-filtering membranes having a repeatable distribution of pores of a small dimension are provided, as well as pillar templates that are used to produce such liquid filtering membranes. Also disclosed are methods of making and using the pillar templates to make porous liquid filtering membranes.

Abstract: A display device includes a substrate including an emission area and a non-emission area; a circuit element layer formed on the substrate and having circuit elements disposed thereon; an overcoat layer covering the circuit element layer; an auxiliary electrode formed on the overcoat layer in the non-emission area and composed of multiple layers with a reflective layer in between; an electron transport layer covering the auxiliary electrode; and a cathode electrode formed on the electron transport layer, wherein the auxiliary electrode includes an electrode hole passing through the multiple layers, and the reflective layer includes at least one protrusion protruding toward inside from a sidewall of the electrode hole and contacting the cathode electrode.

Abstract: A display panel and a display device.

Abstract: The present invention relates to a polyimide film showing a low stress change rate on a silicon wafer. The present invention can minimize cracks which are formed due to the stress change of polyimide, in a process for depositing an inorganic film on a polyimide substrate at a high temperature, and thus can reduce electrical property degradation such as a recoverable residual image and decrease in current of a flexible display.

Abstract: According to one embodiment, an original plate for imprint lithography has a first surface side having a patterned portion thereon. The patterned portion includes a groove having a bottom surface recessed from a first surface to a first depth, and a columnar portion on the bottom surface and protruding from the bottom surface to extend beyond the first surface. The original plate may be used to form replica templates by imprint lithography processes. The replica templates can be used in semiconductor device manufacturing processes or the like.

Abstract: A display panel includes: a substrate comprising a first display area and a second display area surrounded by the first display area; an insulating layer including an organic insulating material; a plurality of first light-emitting elements in the first display area; a plurality of second light-emitting elements in the second display area, the second light-emitting elements comprising light-emitting elements separated from one another to define transmission areas; and a photorefractive portion in each of the transmission areas.

Abstract: A method for manufacturing a cured product pattern of a curable composition includes the steps of, in sequence, depositing a droplet of the curable composition onto a substrate; bringing a mold having an uneven pattern formed in a surface thereof into contact with the curable composition; curing the curable composition; and releasing a cured product of the curable composition from the mold. The mold has a recess having a bottom surface and a stair structure arranged to form an opening surface that becomes wider from the bottom surface toward the surface of the mold. In the contact step, the curable composition comes into contact with the stair portion after a top of the droplet comes into contact with the bottom surface.

Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.

Abstract: A semiconductor device of an embodiment includes first and second structures arranged in a first hierarchy, in which the first and second structures are repeatedly arranged in a first direction along a plane of the first hierarchy, and a distance between geometric centers of the first and second structures in a minimum unit of repetition of the first and second structures differs between a first position and a second position in the first direction.

Abstract: A packaging semiconductor device, such as a fan-out Wafer-Level Packaging (FOWLP) device, is fabricated by providing a semiconductor device (20) having conductive patterns (22) disposed on a first surface and then forming, on the conductive patterns, photoresist islands (24) having a first predetermined shape defined by a first critical width dimension and a minimum height dimension so that a subsequently-formed dielectric polymer layer (26) surrounds but does not cover each photoresist island (24), thereby allowing each photoresist island to be selectively removed from the one or more conductive patterns to form one or more via openings (28) in the dielectric polymer layer such that each via opening has a second predetermined shape which matches at least part of the first predetermined shape of the photoresist islands.

Abstract: A touch panel including a liquid crystal panel, a first polarizer, touch units, and a second polarizer is provided. The liquid crystal panel includes a first substrate, a second substrate, an active array, and a liquid crystal layer. Each of the touch units includes a first electrode extending along a first extending direction and a second electrode extending along a second extending direction. The first electrode includes two of first touch electrodes electrically connected to each other. Each of the first touch electrodes has a first deviation amount in the second extending direction. The second electrode includes two of second touch electrodes electrically connected to each other. Each of the second touch electrodes has a second deviation amount in the first extending direction. The two of the second touch electrodes and the two of the first touch electrodes have four overlapping points.

Abstract: An optical waveguide includes a core extending in a transmission direction of light, a clad covering the core along the transmission direction, and a mixing layer containing a material for the core and a material for the clad on the interface between the core and the clad, and the mixing layer includes a plurality of regions each having a different thickness in the transmission direction.

Abstract: The invention provides: a composition for forming an organic film, the composition having high filterability and enabling formation of an organic film which has high pattern-curving resistance, and which prevents a high-aspect line pattern particularly finer than 40 nm from line collapse and twisting after dry etching; a method for forming an organic film and a patterning process which use the composition; and a substrate for manufacturing a semiconductor device, including the organic film formed on the substrate. The composition for forming an organic film includes a condensate (A), which is a condensation product of dihydroxynaphthalene shown by the following formula (1) and a condensation agent, or a derivative of the condensate (A). A sulfur content among constituent elements contained in the condensate (A) or the derivative of the condensate (A) is 100 ppm or less in terms of mass.

Abstract: An exposure apparatus that scans and exposes each of a plurality of areas on a glass substrate, by irradiating the substrate with an illumination light via a projection optical system and relatively driving the substrate with respect to the illumination light, is equipped with: a substrate holder that levitates and supports a first area of the substrate; a substrate carrier that holds the glass substrate levitated and supported by the substrate holder; an X coarse movement stage that drives the substrate holder; an X voice coil motor that drives the substrate carrier; and a controller that controls the X coarse movement stage and the X voice coil motor so that the substrate holder and the substrate carrier are driven, respectively, in scanning exposure. Accordingly, an exposure apparatus with improved position controllability of an object can be provided.

Abstract: Disclosed herein are coated copper particles formed of copper cores that are surface coated with a coating composition comprising one or more conductive oxides. Further disclosed herein are electrically conductive adhesives (ECA) comprising: (a) organic binder, (b) surface coated copper particles, and optional (c) solvent.

Abstract: Optical control modules for integrated circuit device patterning and reticles and methods including the same. The methods include exposing, via a reticle, initial and subsequent reticle exposure fields on a surface of a semiconductor substrate. The initial and subsequent reticle exposure fields pattern corresponding array regions and margin regions on the semiconductor substrate. The initial and subsequent reticle exposure fields partially overlap such that an initial optical control module (OCM), which is patterned during exposure of the initial reticle exposure field, and a subsequent OCM, which is patterned during exposure of the subsequent reticle exposure field, both are positioned within a single control module die. The reticles include reticles that can be utilized during the methods or that can form the integrated circuit devices. The integrated circuit devices include integrated circuit devices formed utilizing the methods or the reticles.

Abstract: A composition for forming a resist underlayer film that has a high dry etching rate, functions as an anti-reflective coating during exposure, and fills a recess having a narrow space and a high aspect ratio. A composition for forming a resist underlayer film has a copolymer having a structural unit of following formula (1), a cross-linkable compound, a cross-linking catalyst, and a solvent: wherein R1 and R2 are each independently a C1-3 alkylene group or a single bond, Z is an —O— group, a —S— group, or a —S—S— group, and Ar is an arylene group. The copolymer is synthesized by a reaction of a carboxyl group of a dicarboxylic acid compound having an —O— group, a —S— group, or a —S—S— group with an epoxy group of a diglycidyl ether compound having an arylene group.

Abstract: Multiple model functions may be calculated by detecting alignment marks on a semiconductor wafer structure. The model functions may be combined to determine a combined model function by using a weight function that assigns a different weight to each of basis functions of the model functions. Thus, even when asymmetry of alignment marks or overlay marks has high dependency on a horizontal location on a wafer, reliability of exposure process is insured.

Abstract: A radiation-sensitive resin composition includes a first compound represented by formula (1), a first polymer comprising an acid-labile group, and a radiation-sensitive acid generator other than the first compound. The radiation-sensitive acid generator includes an onium salt compound. In the formula (1), n is 2 or 3; m is 1 or 2; Y+ represents a monovalent radiation-sensitive onium cation; and L represents a single bond or an organic group having a valency of n. L includes linking moieties each linking two of the carboxylate groups in formula (1). Number of atom(s) included in a linking moiety having a minimum number of bonds among the linking moieties is 0 to 10. In a case where L represents a single bond, n is 2, and in a case where n is 2, m is 1.

Abstract: Some embodiments include provision of a mass of semiconductor material having a first region and a second region. A first pattern set is formed to extend across the first region, and a third pattern set is formed to extend across the second region. The first pattern set includes first lines and first trenches between the first lines. The third pattern set includes alignment marks. The first trenches are utilized to form rails from the semiconductor material within the first region. The alignment marks are parallel to the rails. A second pattern set is formed to extend across the first region, and a fourth pattern set is formed to extend across the second region. The second pattern set includes first openings, and the fourth pattern set includes second openings. The first openings are utilized to subdivide the rails into pillars. The second openings transform the alignment marks into an overlay pattern.

Abstract: A semiconductor structure is provided that contains a non-volatile battery which controls gate bias and has increased output voltage retention and voltage resolution. The semiconductor structure may include a semiconductor substrate including at least one channel region that is positioned between source/drain regions. A gate dielectric material is located on the channel region of the semiconductor substrate. A battery stack is located on the gate dielectric material. The battery stack includes, a cathode current collector located on the gate dielectric material, a cathode material located on the cathode current collector, a first ion diffusion barrier material located on the cathode material, an electrolyte located on the first ion diffusion barrier material, a second ion diffusion barrier material located on the electrolyte, an anode region located on the second ion diffusion barrier material, and an anode current collector located on the anode region.

Abstract: Techniques are disclosed for realizing a two-dimensional target lithography feature/pattern by decomposing (splitting) it into multiple unidirectional target features that, when aggregated, substantially (e.g., fully) represent the original target feature without leaving an unrepresented remainder (e.g., a whole-number quantity of unidirectional target features). The unidirectional target features may be arbitrarily grouped such that, within a grouping, all unidirectional target features share a common target width value. Where multiple such groupings are provided, individual groupings may or may not have the same common target width value. In some cases, a series of reticles is provided, each reticle having a mask pattern correlating to a grouping of unidirectional target features. Exposure of a photoresist material via the aggregated series of reticles substantially (e.g., fully) produces the original target feature/pattern.

Abstract: A touch substrate manufactured by three-dimensional printing and a method for manufacturing the same are disclosed. The method for manufacturing the touch substrate works together with a three-dimensional printer. The three-dimensional printer includes a first nozzle, a second nozzle, and a light source. The method includes the steps of: jetting a photocuring material by the first nozzle and exposing the photocuring material to the light source to form a base layer; jetting a conductive material on the base layer by the second nozzle and exposing the conductive material to the light source to form a touch electrode layer; and jetting the photocuring material on the base layer and the touch electrode layer by the first nozzle and exposing the photocuring material to the light source to form a protective layer. The touch electrode layer is embedded between the base layer and the protective layer.

Abstract: The present application relates to a method for examining at least one element of a photolithographic mask for an extreme ultraviolet (EUV) wavelength range, wherein the method includes the steps of: (a) examining the at least one element with light in the EUV wavelength range; and (b) determining the behavior of the at least one element in the EUV wavelength range.

Abstract: A manufacturing method of a circuit substrate is provided. A substrate is provided. A positive photoresist layer is coated on the substrate. Once exposure process is performed on the positive photoresist layer disposed on the substrate so as to simultaneously form concaves with at least two different depths.

Abstract: The present invention provides an overlay mark, including a substrate and plural sets of first pattern block and second pattern block. A first direction and a second direction are defined on the substrate, wherein the first direction and the second direction are perpendicular to each other. In each set, the first pattern block is rotational symmetrical to the second pattern block. Each first pattern block includes a big frame and plural small frame. Each second pattern block includes a big frame and plural small frame. The width of the big frame is greater than three times of the width of the small frame. The present invention further provides a method for evaluating the stability of a semiconductor manufacturing process.

Abstract: An organic light-emitting diode (OLED) touch-control substrate is provided. The organic light-emitting diode (OLED) touch-control substrate comprises a plurality of OLEDs, each of the OLEDs having a first electrode, a second electrode and a light-emitting layer between the first electrode and the second electrode; a plurality of first touch-control electrodes disposed in a same layer with the first electrodes and insulated from the first electrode lines; and a plurality of second touch-control electrodes disposed in a same layer with the second electrodes and insulated from the second electrode lines and the first touch-control electrodes.

Abstract: Provided are a photocurable composition for imprints, having good releasability and temporal stability of the releasability, a pattern forming method, and a method for manufacturing a device. This photocurable composition for imprints includes a monofunctional chained aliphatic (meth)acrylate (A1) not containing a fluorine atom, a bifunctional or higher polyfunctional (meth)acrylate (A2) not containing a fluorine atom, a monofunctional (meth)acrylate (B) containing a fluorine atom, a photopolymerization initiator (C), and a non-polymerizable compound (D) having a polyoxyalkylene structure in a proportion of 1% to 5% by mass, in which the monofunctional chained aliphatic (meth)acrylate (A1) not containing a fluorine atom has a boiling point of 100° C. to 200° C. at a pressure of 0.67 kPa, and the monofunctional (meth)acrylate (B) containing a fluorine atom has a boiling point of 100° C. to 200° C. at a pressure of 0.67 kPa.

Abstract: An optimization method for overlay error compensation is disclosed.

Abstract: A battery built-in board includes a battery component comprising a battery and an insulation part covering the battery, a first insulation layer in which the battery component is placed, and a second insulation layer formed on the first insulation layer and covering the battery component. Rigidity of the insulation part is lower than that of the first insulation layer and the second insulation layer.

Abstract: A silicon carbide based MOS integrated circuit is monolithically integrated with a suspended piezoelectric aluminum nitride member to form a high-temperature-capable hybrid MEMS-over-MOS structure. In the integrated structure, a post-MOS passivation layer of silicon carbide is deposited over the MOS passivation and overlain by a structural layer of the MEMS device. Electrical contact to refractory metal conductors of the MOS integrated circuit is provided by tungsten vias that are formed so as to pass vertically through the structural layer and the post-MOS passivation layer.

Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus for assigning feature colors for a multiple patterning process are provided. The apparatus receives integrated circuit layout information including a set of features and an assigned color of a plurality of colors for each feature of a first subset of features of the set of features. In addition, the apparatus performs color decomposition on a second subset of features to assign colors to features in the second subset of features. The second subset of features includes features in the set of features that are not included in the first subset of features with an assigned color.

Abstract: An in-cell touch display panel, a driving method thereof and a display device are provided. The display panel includes a common electrode layer and a plurality of touch sensing electrodes. The common electrode layer comprises a plurality of first touch driving electrodes and a plurality of second touch driving electrodes that are configured for loading of common electrode signals in a display period and for loading of touch signals in a touch period. The second touch driving electrodes include a plurality of second touch driving sub-electrodes. Projections of the touch sensing electrodes on an array substrate are at gaps of the second touch driving sub-electrodes that are adjacent within the second touch driving electrodes. With this display panel, the touch sensitivity can be enhanced.